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author | Andrew Waterman <andrew@sifive.com> | 2021-02-04 02:22:48 -0800 |
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committer | Andrew Waterman <andrew@sifive.com> | 2021-02-04 03:01:59 -0800 |
commit | d87a21ac8aa6fefdc435722c4620d2a9410fef5d (patch) | |
tree | a1d06b41afa629dceea18223aa41cbffd3d50873 | |
parent | 805f7146206f664fe63af9a4012775081f44816c (diff) | |
download | riscv-isa-sim-d87a21ac8aa6fefdc435722c4620d2a9410fef5d.zip riscv-isa-sim-d87a21ac8aa6fefdc435722c4620d2a9410fef5d.tar.gz riscv-isa-sim-d87a21ac8aa6fefdc435722c4620d2a9410fef5d.tar.bz2 |
Refactor headers
-rw-r--r-- | riscv/abstract_device.h | 15 | ||||
-rw-r--r-- | riscv/debug_module.h | 4 | ||||
-rw-r--r-- | riscv/devices.h | 10 | ||||
-rw-r--r-- | riscv/dts.h | 1 | ||||
-rw-r--r-- | riscv/processor.h | 2 | ||||
-rw-r--r-- | riscv/riscv.mk.in | 1 |
6 files changed, 22 insertions, 11 deletions
diff --git a/riscv/abstract_device.h b/riscv/abstract_device.h new file mode 100644 index 0000000..559c64f --- /dev/null +++ b/riscv/abstract_device.h @@ -0,0 +1,15 @@ +#ifndef _RISCV_ABSTRACT_DEVICE_H +#define _RISCV_ABSTRACT_DEVICE_H + +#include "decode.h" +#include <cstdint> +#include <cstddef> + +class abstract_device_t { + public: + virtual bool load(reg_t addr, size_t len, uint8_t* bytes) = 0; + virtual bool store(reg_t addr, size_t len, const uint8_t* bytes) = 0; + virtual ~abstract_device_t() {} +}; + +#endif diff --git a/riscv/debug_module.h b/riscv/debug_module.h index 2bcdba4..bfcc0a7 100644 --- a/riscv/debug_module.h +++ b/riscv/debug_module.h @@ -4,9 +4,11 @@ #include <set> -#include "devices.h" +#include "abstract_device.h" +#include "mmu.h" class sim_t; +class bus_t; typedef struct { // Size of program_buffer in 32-bit words, as exposed to the rest of the diff --git a/riscv/devices.h b/riscv/devices.h index 5837227..e0850f2 100644 --- a/riscv/devices.h +++ b/riscv/devices.h @@ -4,21 +4,13 @@ #include "decode.h" #include "mmio_plugin.h" #include "int_map.h" -#include <cstdlib> -#include <string> +#include "abstract_device.h" #include <map> #include <vector> #include <utility> class processor_t; -class abstract_device_t { - public: - virtual bool load(reg_t addr, size_t len, uint8_t* bytes) = 0; - virtual bool store(reg_t addr, size_t len, const uint8_t* bytes) = 0; - virtual ~abstract_device_t() {} -}; - class bus_t : public abstract_device_t { public: bool load(reg_t addr, size_t len, uint8_t* bytes); diff --git a/riscv/dts.h b/riscv/dts.h index 090bb7c..1c3a54d 100644 --- a/riscv/dts.h +++ b/riscv/dts.h @@ -2,6 +2,7 @@ #ifndef _RISCV_DTS_H #define _RISCV_DTS_H +#include "devices.h" #include "processor.h" #include "mmu.h" #include <string> diff --git a/riscv/processor.h b/riscv/processor.h index 2e4e4a9..b906f7d 100644 --- a/riscv/processor.h +++ b/riscv/processor.h @@ -4,8 +4,8 @@ #include "decode.h" #include "config.h" -#include "devices.h" #include "trap.h" +#include "abstract_device.h" #include <string> #include <vector> #include <unordered_map> diff --git a/riscv/riscv.mk.in b/riscv/riscv.mk.in index aa0c301..d19e9f6 100644 --- a/riscv/riscv.mk.in +++ b/riscv/riscv.mk.in @@ -10,6 +10,7 @@ riscv_install_prog_srcs = \ riscv_CFLAGS = -fPIC riscv_hdrs = \ + abstract_device.h \ common.h \ decode.h \ devices.h \ |