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author | Tim Newsome <tim@sifive.com> | 2017-09-21 11:48:31 -0700 |
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committer | Andrew Waterman <aswaterman@gmail.com> | 2017-09-21 11:48:31 -0700 |
commit | c471f5d84e2fc27e3eb4c2997635d3f2c83d7818 (patch) | |
tree | 8a6a1e86878f80d996ec8119f6e68f340da7f358 | |
parent | 8969a855132a27769dd6399566dc86ac32b26e76 (diff) | |
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Fix comment typo. (#126)
-rw-r--r-- | riscv/execute.cc | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/riscv/execute.cc b/riscv/execute.cc index 303effe..41425d9 100644 --- a/riscv/execute.cc +++ b/riscv/execute.cc @@ -154,7 +154,7 @@ void processor_t::step(size_t n) // This figures out where to jump to in the switch statement size_t idx = _mmu->icache_index(pc); - // This gets the cached decoded instruction form the MMU. If the MMU + // This gets the cached decoded instruction from the MMU. If the MMU // does not have the current pc cached, it will refill the MMU and // return the correct entry. ic_entry->data.func is the C++ function // corresponding to the instruction. |