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AgeCommit message (Expand)AuthorFilesLines
2011-02-15[xcc,opcodes,pk,sim] krste's re-renaming spreeAndrew Waterman40-93/+93
2011-02-15[xcc,sim,opcodes] removed mtflh/mffl/mffhAndrew Waterman4-24/+0
2011-02-04[sim,pk] added interrupt-pending field to cause regAndrew Waterman5-13/+13
2011-02-02[sim,xcc,opcodes] added back mtflh.dAndrew Waterman3-5/+11
2011-02-02[opcodes,pk,sim,xcc] synci now bombs whole icacheAndrew Waterman1-9/+9
2011-02-01[xcc,opcodes,pk,sim] cleanup to FP ISAAndrew Waterman10-137/+114
2011-02-01[sim] added nearest/ties to max magnitude rounding modeAndrew Waterman1-3/+7
2011-01-26[sim] changed divide-by-0 semanticsAndrew Waterman2-9/+8
2011-01-25[sim,opcodes] add mulhsu instructionAndrew Waterman2-1/+14
2011-01-25[opcodes,pk,sim,xcc] great renumbering of 2011, part deuxAndrew Waterman4-536/+529
2011-01-20[sim, pk, xcc, opcodes] great instruction renaming of 2011Andrew Waterman84-151/+186
2011-01-18[opcodes, sim, xcc] made *w insns illegal in RV32Andrew Waterman59-137/+155
2011-01-17[opcodes, pk, sim, xcc] removed nor, normalized macros to addiAndrew Waterman2-6/+0
2011-01-11[sim] fix jalr bugAndrew Waterman1-1/+1
2011-01-03[opcodes,pk,sim,xcc] flip fields to favor little endianYunsup Lee2-162/+166
2010-12-27[sim] fixed some compiler warningsAndrew Waterman5-4/+5
2010-12-27[sim] cleaned up handling of link registerAndrew Waterman2-1/+2
2010-11-21[sim] handle integer division overflowAndrew Waterman8-12/+32
2010-11-21[opcodes, pk, sim, xcc] Tweaked FP encodingAndrew Waterman67-347/+94
2010-11-21[opcodes] generate latex and verilog correctlyAndrew Waterman1-67/+67
2010-11-21[pk] various PK cleanups/speedupsAndrew Waterman2-0/+2
2010-11-21[xcc, sim, pk, opcodes] new instruction encoding!Andrew Waterman167-513/+517
2010-11-21[xcc, sim, pk] link register is now x1Andrew Waterman2-1/+6
2010-11-21[opcodes, pk, sim, xcc] made jumps shorter and PC-relativeAndrew Waterman2-35/+4
2010-10-26[sim] removed unnecessary trap in mfcr instructionAndrew Waterman1-3/+0
2010-10-26[sim,xcc] fixed minor bugs related to tp/cr29Andrew Waterman1-3/+0
2010-10-26[pk,sim,xcc] get rid of at register, introduce tp registerYunsup Lee4-6/+2
2010-10-25[sim,xcc,pk,opcodes] static rounding modes for FP insnsAndrew Waterman38-46/+353
2010-10-15[pk, sim] added FPU emulation support to proxy kernelAndrew Waterman4-2/+29
2010-10-11[sim] added writeback tracingAndrew Waterman1-2/+26
2010-10-07[xcc] modified opcodes for better FP decode mappingAndrew Waterman1-27/+19
2010-10-05[opcodes] added code field back to syscall/breakAndrew Waterman1-2/+2
2010-10-05[xcc] removed CEXC field from FSRAndrew Waterman1-15/+5
2010-10-05[xcc,sim] eliminated vectored trapsAndrew Waterman5-7/+13
2010-10-02[sim, xcc] changed cvt/trunc to use GPRs for int argsAndrew Waterman16-16/+24
2010-10-02[xcc, sim] mff now uses rs2 for dataAndrew Waterman5-49/+49
2010-09-28[opcodes, sim, xcc] added mffl.d instructionAndrew Waterman2-108/+115
2010-09-23[xcc, sim] eliminated zero-extended immediatesAndrew Waterman4-6/+5
2010-09-22[sim] fixed bug in which shift operands were reversedAndrew Waterman6-6/+6
2010-09-20[xcc, sim] changed instruction format so imm12 subs for rs2Andrew Waterman145-243/+245
2010-09-13[xcc, sim] replaced ble/bleu with bge/bgeuAndrew Waterman5-11/+11
2010-09-12[sim] renamed sllv to sll (same for other shifts)Andrew Waterman7-29/+29
2010-09-12[xcc, sim] moved shamt field and renamed shiftsAndrew Waterman14-87/+72
2010-09-12[xcc, sim] branches now are next-PC-based, not PC-basedAndrew Waterman3-8/+8
2010-09-11[xcc] fixed broken 32-bit FP ABIAndrew Waterman1-0/+0
2010-09-10[sim, xcc] Added mffh.d/mtflh.d; fixed FP ABI for 32-bitAndrew Waterman4-5/+9
2010-09-10[sim, pk] cleaned up exception vectors and FP exc flagsAndrew Waterman3-15/+24
2010-09-10[opcodes,xcc,sim] mffh.d,mtfh.d added (broken commit)Yunsup Lee3-147/+148
2010-09-09[opcodes,sim,xcc] move opcodes for 3 source instructionsYunsup Lee1-56/+67
2010-09-09Revert "[xcc, sim] added slei/sleui in lieu of slti/sltiu"Andrew Waterman5-4/+4