Age | Commit message (Collapse) | Author | Files | Lines | |
---|---|---|---|---|---|
2011-06-19 | temporary undoing of renaming | Andrew Waterman | 1 | -0/+2 | |
2011-06-12 | [sim] renamed to riscv-isa-run | Andrew Waterman | 1 | -2/+0 | |
2011-06-11 | [xcc] instructions now set PC explicitly | Andrew Waterman | 1 | -1/+1 | |
2010-09-20 | [xcc, sim] changed instruction format so imm12 subs for rs2 | Andrew Waterman | 1 | -1/+1 | |
2010-07-28 | [sim,xcc] Changed instruction format to RISC-V | Andrew Waterman | 1 | -1/+1 | |
Massive changes to gcc, binutils to support new instruction encoding. Simulator reflects these changes. | |||||
2010-07-18 | Reorganized directory structure | Andrew Waterman | 1 | -0/+2 | |
Moved cross-compiler to /xcc/ rather than / Added ISA sim in /sim/ Added Proxy Kernel in /pk/ (to be cleaned up) Added opcode map to /opcodes/ (ditto) Added documentation to /doc/ |