diff options
| author | Andrew Waterman <waterman@s141.Millennium.Berkeley.EDU> | 2010-09-12 17:03:47 -0700 |
|---|---|---|
| committer | Andrew Waterman <waterman@s141.Millennium.Berkeley.EDU> | 2010-09-12 17:03:47 -0700 |
| commit | ab2da3ad68de01bb862fb0af88348677ed0b4336 (patch) | |
| tree | 49bbafa222361ac8e9337baa4db1f313d4e29710 /riscv | |
| parent | 8edc1451b26e5124e761f8715ad268c3750539b4 (diff) | |
| download | spike-ab2da3ad68de01bb862fb0af88348677ed0b4336.zip spike-ab2da3ad68de01bb862fb0af88348677ed0b4336.tar.gz spike-ab2da3ad68de01bb862fb0af88348677ed0b4336.tar.bz2 | |
[xcc, sim] branches now are next-PC-based, not PC-based
Diffstat (limited to 'riscv')
| -rw-r--r-- | riscv/decode.h | 4 | ||||
| -rw-r--r-- | riscv/execute.h | 12 | ||||
| -rw-r--r-- | riscv/insns/rdnpc.h (renamed from riscv/insns/rdpc.h) | 0 |
3 files changed, 8 insertions, 8 deletions
diff --git a/riscv/decode.h b/riscv/decode.h index e22a05a..ddf4eca 100644 --- a/riscv/decode.h +++ b/riscv/decode.h @@ -141,8 +141,8 @@ union insn_t #define SIMM ((int32_t)((uint32_t)insn.itype.imm<<(32-IMM_BITS))>>(32-IMM_BITS)) #define SHAMT insn.rtype.shamt #define TARGET insn.jtype.target -#define BRANCH_TARGET (pc + (SIMM << BRANCH_ALIGN_BITS)) -#define JUMP_TARGET ((pc & ~((1<<(TARGET_BITS+JUMP_ALIGN_BITS))-1)) + (TARGET << JUMP_ALIGN_BITS)) +#define BRANCH_TARGET (npc + (SIMM << BRANCH_ALIGN_BITS)) +#define JUMP_TARGET ((npc & ~((1<<(TARGET_BITS+JUMP_ALIGN_BITS))-1)) + (TARGET << JUMP_ALIGN_BITS)) #define require_supervisor if(!(sr & SR_S)) throw trap_privileged_instruction #define require64 if(gprlen != 64) throw trap_illegal_instruction diff --git a/riscv/execute.h b/riscv/execute.h index 9a50b99..ae2511f 100644 --- a/riscv/execute.h +++ b/riscv/execute.h @@ -176,6 +176,11 @@ switch((insn.bits >> 0x19) & 0x7f) #include "insns/sgninj_d.h" break; } + if((insn.bits & 0xfe007fe0) == 0xd0006060) + { + #include "insns/div_d.h" + break; + } if((insn.bits & 0xfe007fe0) == 0xd0006820) { #include "insns/c_eq_d.h" @@ -246,11 +251,6 @@ switch((insn.bits >> 0x19) & 0x7f) #include "insns/sqrt_d.h" break; } - if((insn.bits & 0xfe007fe0) == 0xd0006060) - { - #include "insns/div_d.h" - break; - } if((insn.bits & 0xfe0fffe0) == 0xd00064c0) { #include "insns/cvt_d_w.h" @@ -984,7 +984,7 @@ switch((insn.bits >> 0x19) & 0x7f) { if((insn.bits & 0xffffffe0) == 0xf6001000) { - #include "insns/rdpc.h" + #include "insns/rdnpc.h" break; } #include "insns/unimp.h" diff --git a/riscv/insns/rdpc.h b/riscv/insns/rdnpc.h index 95e528a..95e528a 100644 --- a/riscv/insns/rdpc.h +++ b/riscv/insns/rdnpc.h |