diff options
author | Yunsup Lee <yunsup@cs.berkeley.edu> | 2011-04-04 01:16:10 -0700 |
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committer | Yunsup Lee <yunsup@cs.berkeley.edu> | 2011-04-04 02:10:14 -0700 |
commit | 9e58791c6b405ad4b2252e295b392152828cfefb (patch) | |
tree | 49790238c4a163c0acc83ded926dd944c4c2ef50 /riscv | |
parent | c17b57db55f3615cb543ad1d6082e27b27614933 (diff) | |
download | spike-9e58791c6b405ad4b2252e295b392152828cfefb.zip spike-9e58791c6b405ad4b2252e295b392152828cfefb.tar.gz spike-9e58791c6b405ad4b2252e295b392152828cfefb.tar.bz2 |
[opcodes,pk,sim,xcc] add vector mem instructions
Diffstat (limited to 'riscv')
-rw-r--r-- | riscv/execute.h | 208 | ||||
-rw-r--r-- | riscv/insns/fld_v.h | 0 | ||||
-rw-r--r-- | riscv/insns/fldst_v.h | 0 | ||||
-rw-r--r-- | riscv/insns/flw_v.h | 0 | ||||
-rw-r--r-- | riscv/insns/flwst_v.h | 0 | ||||
-rw-r--r-- | riscv/insns/fsd_v.h | 0 | ||||
-rw-r--r-- | riscv/insns/fsdst_v.h | 0 | ||||
-rw-r--r-- | riscv/insns/fsw_v.h | 0 | ||||
-rw-r--r-- | riscv/insns/fswst_v.h | 0 | ||||
-rw-r--r-- | riscv/insns/lb_v.h | 0 | ||||
-rw-r--r-- | riscv/insns/lbst_v.h | 0 | ||||
-rw-r--r-- | riscv/insns/lbu_v.h | 0 | ||||
-rw-r--r-- | riscv/insns/lbust_v.h | 0 | ||||
-rw-r--r-- | riscv/insns/ld_v.h | 0 | ||||
-rw-r--r-- | riscv/insns/ldst_v.h | 0 | ||||
-rw-r--r-- | riscv/insns/lh_v.h | 0 | ||||
-rw-r--r-- | riscv/insns/lhst_v.h | 0 | ||||
-rw-r--r-- | riscv/insns/lhu_v.h | 0 | ||||
-rw-r--r-- | riscv/insns/lhust_v.h | 0 | ||||
-rw-r--r-- | riscv/insns/lw_v.h | 0 | ||||
-rw-r--r-- | riscv/insns/lwst_v.h | 0 | ||||
-rw-r--r-- | riscv/insns/lwu_v.h | 0 | ||||
-rw-r--r-- | riscv/insns/lwust_v.h | 0 | ||||
-rw-r--r-- | riscv/insns/sb_v.h | 0 | ||||
-rw-r--r-- | riscv/insns/sbst_v.h | 0 | ||||
-rw-r--r-- | riscv/insns/sd_v.h | 0 | ||||
-rw-r--r-- | riscv/insns/sdst_v.h | 0 | ||||
-rw-r--r-- | riscv/insns/sh_v.h | 0 | ||||
-rw-r--r-- | riscv/insns/shst_v.h | 0 | ||||
-rw-r--r-- | riscv/insns/sw_v.h | 0 | ||||
-rw-r--r-- | riscv/insns/swst_v.h | 0 |
31 files changed, 208 insertions, 0 deletions
diff --git a/riscv/execute.h b/riscv/execute.h index 9883a97..c9c17a0 100644 --- a/riscv/execute.h +++ b/riscv/execute.h @@ -88,6 +88,214 @@ switch((insn.bits >> 0x0) & 0x7f) } break; } + case 0xb: + { + switch((insn.bits >> 0x7) & 0x7) + { + case 0x0: + { + if((insn.bits & 0x1ffff) == 0x80b) + { + #include "insns/lbst_v.h" + break; + } + if((insn.bits & 0xf8000fff) == 0xc0b) + { + #include "insns/sbst_v.h" + break; + } + if((insn.bits & 0x3fffff) == 0xb) + { + #include "insns/lb_v.h" + break; + } + if((insn.bits & 0xf83e0fff) == 0x40b) + { + #include "insns/sb_v.h" + break; + } + #include "insns/unimp.h" + } + case 0x1: + { + if((insn.bits & 0x1ffff) == 0x88b) + { + #include "insns/lhst_v.h" + break; + } + if((insn.bits & 0x3fffff) == 0x8b) + { + #include "insns/lh_v.h" + break; + } + if((insn.bits & 0xf83e0fff) == 0x48b) + { + #include "insns/sh_v.h" + break; + } + if((insn.bits & 0xf8000fff) == 0xc8b) + { + #include "insns/shst_v.h" + break; + } + #include "insns/unimp.h" + } + case 0x2: + { + if((insn.bits & 0x3fffff) == 0x10b) + { + #include "insns/lw_v.h" + break; + } + if((insn.bits & 0xf8000fff) == 0xd0b) + { + #include "insns/swst_v.h" + break; + } + if((insn.bits & 0xf83e0fff) == 0x50b) + { + #include "insns/sw_v.h" + break; + } + if((insn.bits & 0x1ffff) == 0x90b) + { + #include "insns/lwst_v.h" + break; + } + #include "insns/unimp.h" + } + case 0x3: + { + if((insn.bits & 0x3fffff) == 0x18b) + { + #include "insns/ld_v.h" + break; + } + if((insn.bits & 0x1ffff) == 0x98b) + { + #include "insns/ldst_v.h" + break; + } + if((insn.bits & 0xf83e0fff) == 0x58b) + { + #include "insns/sd_v.h" + break; + } + if((insn.bits & 0xf8000fff) == 0xd8b) + { + #include "insns/sdst_v.h" + break; + } + #include "insns/unimp.h" + } + case 0x4: + { + if((insn.bits & 0x3fffff) == 0x20b) + { + #include "insns/lbu_v.h" + break; + } + if((insn.bits & 0x1ffff) == 0xa0b) + { + #include "insns/lbust_v.h" + break; + } + #include "insns/unimp.h" + } + case 0x5: + { + if((insn.bits & 0x1ffff) == 0xa8b) + { + #include "insns/lhust_v.h" + break; + } + if((insn.bits & 0x3fffff) == 0x28b) + { + #include "insns/lhu_v.h" + break; + } + #include "insns/unimp.h" + } + case 0x6: + { + if((insn.bits & 0x3fffff) == 0x30b) + { + #include "insns/lwu_v.h" + break; + } + if((insn.bits & 0x1ffff) == 0xb0b) + { + #include "insns/lwust_v.h" + break; + } + #include "insns/unimp.h" + } + default: + { + #include "insns/unimp.h" + } + } + break; + } + case 0xf: + { + switch((insn.bits >> 0x7) & 0x7) + { + case 0x2: + { + if((insn.bits & 0xf8000fff) == 0xd0f) + { + #include "insns/fswst_v.h" + break; + } + if((insn.bits & 0xf83e0fff) == 0x50f) + { + #include "insns/fsw_v.h" + break; + } + if((insn.bits & 0x3fffff) == 0x10f) + { + #include "insns/flw_v.h" + break; + } + if((insn.bits & 0x1ffff) == 0x90f) + { + #include "insns/flwst_v.h" + break; + } + #include "insns/unimp.h" + } + case 0x3: + { + if((insn.bits & 0x3fffff) == 0x18f) + { + #include "insns/fld_v.h" + break; + } + if((insn.bits & 0xf83e0fff) == 0x58f) + { + #include "insns/fsd_v.h" + break; + } + if((insn.bits & 0xf8000fff) == 0xd8f) + { + #include "insns/fsdst_v.h" + break; + } + if((insn.bits & 0x1ffff) == 0x98f) + { + #include "insns/fldst_v.h" + break; + } + #include "insns/unimp.h" + } + default: + { + #include "insns/unimp.h" + } + } + break; + } case 0x13: { switch((insn.bits >> 0x7) & 0x7) diff --git a/riscv/insns/fld_v.h b/riscv/insns/fld_v.h new file mode 100644 index 0000000..e69de29 --- /dev/null +++ b/riscv/insns/fld_v.h diff --git a/riscv/insns/fldst_v.h b/riscv/insns/fldst_v.h new file mode 100644 index 0000000..e69de29 --- /dev/null +++ b/riscv/insns/fldst_v.h diff --git a/riscv/insns/flw_v.h b/riscv/insns/flw_v.h new file mode 100644 index 0000000..e69de29 --- /dev/null +++ b/riscv/insns/flw_v.h diff --git a/riscv/insns/flwst_v.h b/riscv/insns/flwst_v.h new file mode 100644 index 0000000..e69de29 --- /dev/null +++ b/riscv/insns/flwst_v.h diff --git a/riscv/insns/fsd_v.h b/riscv/insns/fsd_v.h new file mode 100644 index 0000000..e69de29 --- /dev/null +++ b/riscv/insns/fsd_v.h diff --git a/riscv/insns/fsdst_v.h b/riscv/insns/fsdst_v.h new file mode 100644 index 0000000..e69de29 --- /dev/null +++ b/riscv/insns/fsdst_v.h diff --git a/riscv/insns/fsw_v.h b/riscv/insns/fsw_v.h new file mode 100644 index 0000000..e69de29 --- /dev/null +++ b/riscv/insns/fsw_v.h diff --git a/riscv/insns/fswst_v.h b/riscv/insns/fswst_v.h new file mode 100644 index 0000000..e69de29 --- /dev/null +++ b/riscv/insns/fswst_v.h diff --git a/riscv/insns/lb_v.h b/riscv/insns/lb_v.h new file mode 100644 index 0000000..e69de29 --- /dev/null +++ b/riscv/insns/lb_v.h diff --git a/riscv/insns/lbst_v.h b/riscv/insns/lbst_v.h new file mode 100644 index 0000000..e69de29 --- /dev/null +++ b/riscv/insns/lbst_v.h diff --git a/riscv/insns/lbu_v.h b/riscv/insns/lbu_v.h new file mode 100644 index 0000000..e69de29 --- /dev/null +++ b/riscv/insns/lbu_v.h diff --git a/riscv/insns/lbust_v.h b/riscv/insns/lbust_v.h new file mode 100644 index 0000000..e69de29 --- /dev/null +++ b/riscv/insns/lbust_v.h diff --git a/riscv/insns/ld_v.h b/riscv/insns/ld_v.h new file mode 100644 index 0000000..e69de29 --- /dev/null +++ b/riscv/insns/ld_v.h diff --git a/riscv/insns/ldst_v.h b/riscv/insns/ldst_v.h new file mode 100644 index 0000000..e69de29 --- /dev/null +++ b/riscv/insns/ldst_v.h diff --git a/riscv/insns/lh_v.h b/riscv/insns/lh_v.h new file mode 100644 index 0000000..e69de29 --- /dev/null +++ b/riscv/insns/lh_v.h diff --git a/riscv/insns/lhst_v.h b/riscv/insns/lhst_v.h new file mode 100644 index 0000000..e69de29 --- /dev/null +++ b/riscv/insns/lhst_v.h diff --git a/riscv/insns/lhu_v.h b/riscv/insns/lhu_v.h new file mode 100644 index 0000000..e69de29 --- /dev/null +++ b/riscv/insns/lhu_v.h diff --git a/riscv/insns/lhust_v.h b/riscv/insns/lhust_v.h new file mode 100644 index 0000000..e69de29 --- /dev/null +++ b/riscv/insns/lhust_v.h diff --git a/riscv/insns/lw_v.h b/riscv/insns/lw_v.h new file mode 100644 index 0000000..e69de29 --- /dev/null +++ b/riscv/insns/lw_v.h diff --git a/riscv/insns/lwst_v.h b/riscv/insns/lwst_v.h new file mode 100644 index 0000000..e69de29 --- /dev/null +++ b/riscv/insns/lwst_v.h diff --git a/riscv/insns/lwu_v.h b/riscv/insns/lwu_v.h new file mode 100644 index 0000000..e69de29 --- /dev/null +++ b/riscv/insns/lwu_v.h diff --git a/riscv/insns/lwust_v.h b/riscv/insns/lwust_v.h new file mode 100644 index 0000000..e69de29 --- /dev/null +++ b/riscv/insns/lwust_v.h diff --git a/riscv/insns/sb_v.h b/riscv/insns/sb_v.h new file mode 100644 index 0000000..e69de29 --- /dev/null +++ b/riscv/insns/sb_v.h diff --git a/riscv/insns/sbst_v.h b/riscv/insns/sbst_v.h new file mode 100644 index 0000000..e69de29 --- /dev/null +++ b/riscv/insns/sbst_v.h diff --git a/riscv/insns/sd_v.h b/riscv/insns/sd_v.h new file mode 100644 index 0000000..e69de29 --- /dev/null +++ b/riscv/insns/sd_v.h diff --git a/riscv/insns/sdst_v.h b/riscv/insns/sdst_v.h new file mode 100644 index 0000000..e69de29 --- /dev/null +++ b/riscv/insns/sdst_v.h diff --git a/riscv/insns/sh_v.h b/riscv/insns/sh_v.h new file mode 100644 index 0000000..e69de29 --- /dev/null +++ b/riscv/insns/sh_v.h diff --git a/riscv/insns/shst_v.h b/riscv/insns/shst_v.h new file mode 100644 index 0000000..e69de29 --- /dev/null +++ b/riscv/insns/shst_v.h diff --git a/riscv/insns/sw_v.h b/riscv/insns/sw_v.h new file mode 100644 index 0000000..e69de29 --- /dev/null +++ b/riscv/insns/sw_v.h diff --git a/riscv/insns/swst_v.h b/riscv/insns/swst_v.h new file mode 100644 index 0000000..e69de29 --- /dev/null +++ b/riscv/insns/swst_v.h |