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| author | Andrew Waterman <waterman@s144.Millennium.Berkeley.EDU> | 2010-10-26 13:46:15 -0700 |
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| committer | Andrew Waterman <waterman@s144.Millennium.Berkeley.EDU> | 2010-10-26 13:46:15 -0700 |
| commit | 5f0b1c3e7b693e5aefd74bfedd4bf1c09f910785 (patch) | |
| tree | 28801ab830dc1ec7ab92ae6f0360b5ae3db99d44 /riscv | |
| parent | 78bc7d988509ef8364cb39f96d29f8a615bb10f1 (diff) | |
| download | spike-5f0b1c3e7b693e5aefd74bfedd4bf1c09f910785.zip spike-5f0b1c3e7b693e5aefd74bfedd4bf1c09f910785.tar.gz spike-5f0b1c3e7b693e5aefd74bfedd4bf1c09f910785.tar.bz2 | |
[sim,xcc] fixed minor bugs related to tp/cr29
Diffstat (limited to 'riscv')
| -rw-r--r-- | riscv/insns/mtcr.h | 3 |
1 files changed, 0 insertions, 3 deletions
diff --git a/riscv/insns/mtcr.h b/riscv/insns/mtcr.h index df56ecd..859f3e4 100644 --- a/riscv/insns/mtcr.h +++ b/riscv/insns/mtcr.h @@ -3,7 +3,4 @@ switch(insn.rtype.rs2) case 0: set_fsr(RS1); break; - - case 29: - throw trap_illegal_instruction; } |