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| author | Andrew Waterman <waterman@s141.Millennium.Berkeley.EDU> | 2010-08-24 02:18:23 -0700 |
|---|---|---|
| committer | Andrew Waterman <waterman@s141.Millennium.Berkeley.EDU> | 2010-08-24 02:18:23 -0700 |
| commit | f04bbaa997c5cf16d595ee452267d65cacb735fd (patch) | |
| tree | 744177a239fcdbe5517465c2648412b6cdc12ea6 /riscv/processor.h | |
| parent | 3e18d4ccc0af9d72e692889533638d1c9568ea38 (diff) | |
| download | spike-f04bbaa997c5cf16d595ee452267d65cacb735fd.zip spike-f04bbaa997c5cf16d595ee452267d65cacb735fd.tar.gz spike-f04bbaa997c5cf16d595ee452267d65cacb735fd.tar.bz2 | |
[sim] privileged mode support for 32-bit operation
Diffstat (limited to 'riscv/processor.h')
| -rw-r--r-- | riscv/processor.h | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/riscv/processor.h b/riscv/processor.h index 8c64d6d..f2024ff 100644 --- a/riscv/processor.h +++ b/riscv/processor.h @@ -39,7 +39,7 @@ private: // functions void set_sr(uint32_t val); void set_fsr(uint32_t val); - void take_trap(trap_t t); + void take_trap(trap_t t, bool noisy); void disasm(insn_t insn, reg_t pc); friend class sim_t; |