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| author | Andrew Waterman <waterman@s141.Millennium.Berkeley.EDU> | 2011-01-18 17:51:52 -0800 |
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| committer | Andrew Waterman <waterman@s141.Millennium.Berkeley.EDU> | 2011-01-18 17:51:52 -0800 |
| commit | 21ce327f5d60d6805b5d9328b68f7ad2c261a859 (patch) | |
| tree | 22ee7ac3dfb4d00662ff6f0d1f057481efc67772 /riscv/insns/srli.h | |
| parent | 5ddec097b858aafe783eb3aff551d00e9c8c8a37 (diff) | |
| download | spike-21ce327f5d60d6805b5d9328b68f7ad2c261a859.zip spike-21ce327f5d60d6805b5d9328b68f7ad2c261a859.tar.gz spike-21ce327f5d60d6805b5d9328b68f7ad2c261a859.tar.bz2 | |
[opcodes, sim, xcc] made *w insns illegal in RV32
now generic variants behave differently in RV32 and RV64.
Diffstat (limited to 'riscv/insns/srli.h')
| -rw-r--r-- | riscv/insns/srli.h | 10 |
1 files changed, 8 insertions, 2 deletions
diff --git a/riscv/insns/srli.h b/riscv/insns/srli.h index e0d8ae0..5378fd1 100644 --- a/riscv/insns/srli.h +++ b/riscv/insns/srli.h @@ -1,2 +1,8 @@ -require64; -RD = RS1 >> SHAMT; +if(xpr64) + RD = RS1 >> SHAMT; +else +{ + if(SHAMT & 0x20) + throw trap_illegal_instruction; + RD = sext32((uint32_t)RS1 >> SHAMT); +} |