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| author | Andrew Waterman <andrew@sifive.com> | 2023-01-19 17:16:13 -0800 |
|---|---|---|
| committer | Andrew Waterman <andrew@sifive.com> | 2023-01-19 17:24:00 -0800 |
| commit | a875da544dac211099ca9768368cda2a3976a674 (patch) | |
| tree | cd7b3bd6bc7ffec70f763e7856088f3562ae94ad | |
| parent | a3a663c1e4cf42f34c05537a8a4f5f4980fa4ba1 (diff) | |
| download | spike-a875da544dac211099ca9768368cda2a3976a674.zip spike-a875da544dac211099ca9768368cda2a3976a674.tar.gz spike-a875da544dac211099ca9768368cda2a3976a674.tar.bz2 | |
Support all 64 PMP registers
| -rw-r--r-- | riscv/processor.h | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/riscv/processor.h b/riscv/processor.h index a8ccac0..7c4c24f 100644 --- a/riscv/processor.h +++ b/riscv/processor.h @@ -136,7 +136,7 @@ struct state_t mseccfg_csr_t_p mseccfg; - static const int max_pmp = 16; + static const int max_pmp = 64; pmpaddr_csr_t_p pmpaddr[max_pmp]; float_csr_t_p fflags; |