aboutsummaryrefslogtreecommitdiff
diff options
context:
space:
mode:
authorAndrew Waterman <andrew@sifive.com>2022-10-19 17:36:57 -0700
committerAndrew Waterman <andrew@sifive.com>2022-10-19 21:12:25 -0700
commit5cdb39484c531814a6640c1ec976a61d2ad21333 (patch)
tree1a48557d14789a25bc7e17f07112faecdc4bbea0
parenta09b88d4abb8fe3015c3921c7468e78b7f09da15 (diff)
downloadspike-5cdb39484c531814a6640c1ec976a61d2ad21333.zip
spike-5cdb39484c531814a6640c1ec976a61d2ad21333.tar.gz
spike-5cdb39484c531814a6640c1ec976a61d2ad21333.tar.bz2
Template-ize hypervisor loads and stores
-rw-r--r--riscv/insns/hlv_b.h2
-rw-r--r--riscv/insns/hlv_bu.h2
-rw-r--r--riscv/insns/hlv_d.h2
-rw-r--r--riscv/insns/hlv_h.h2
-rw-r--r--riscv/insns/hlv_hu.h2
-rw-r--r--riscv/insns/hlv_w.h2
-rw-r--r--riscv/insns/hlv_wu.h2
-rw-r--r--riscv/insns/hlvx_hu.h2
-rw-r--r--riscv/insns/hlvx_wu.h2
-rw-r--r--riscv/insns/hsv_b.h2
-rw-r--r--riscv/insns/hsv_d.h2
-rw-r--r--riscv/insns/hsv_h.h2
-rw-r--r--riscv/insns/hsv_w.h2
-rw-r--r--riscv/mmu.h35
14 files changed, 28 insertions, 33 deletions
diff --git a/riscv/insns/hlv_b.h b/riscv/insns/hlv_b.h
index 2ccb046..308d038 100644
--- a/riscv/insns/hlv_b.h
+++ b/riscv/insns/hlv_b.h
@@ -1,4 +1,4 @@
require_extension('H');
require_novirt();
require_privilege(get_field(STATE.hstatus->read(), HSTATUS_HU) ? PRV_U : PRV_S);
-WRITE_RD(MMU.guest_load_int8(RS1));
+WRITE_RD(MMU.guest_load<int8_t>(RS1));
diff --git a/riscv/insns/hlv_bu.h b/riscv/insns/hlv_bu.h
index 560f94a..1fe4d6a 100644
--- a/riscv/insns/hlv_bu.h
+++ b/riscv/insns/hlv_bu.h
@@ -1,4 +1,4 @@
require_extension('H');
require_novirt();
require_privilege(get_field(STATE.hstatus->read(), HSTATUS_HU) ? PRV_U : PRV_S);
-WRITE_RD(MMU.guest_load_uint8(RS1));
+WRITE_RD(MMU.guest_load<uint8_t>(RS1));
diff --git a/riscv/insns/hlv_d.h b/riscv/insns/hlv_d.h
index f432b65..8e92ce3 100644
--- a/riscv/insns/hlv_d.h
+++ b/riscv/insns/hlv_d.h
@@ -2,4 +2,4 @@ require_extension('H');
require_rv64;
require_novirt();
require_privilege(get_field(STATE.hstatus->read(), HSTATUS_HU) ? PRV_U : PRV_S);
-WRITE_RD(MMU.guest_load_int64(RS1));
+WRITE_RD(MMU.guest_load<int64_t>(RS1));
diff --git a/riscv/insns/hlv_h.h b/riscv/insns/hlv_h.h
index 4cb07e9..f2e14c4 100644
--- a/riscv/insns/hlv_h.h
+++ b/riscv/insns/hlv_h.h
@@ -1,4 +1,4 @@
require_extension('H');
require_novirt();
require_privilege(get_field(STATE.hstatus->read(), HSTATUS_HU) ? PRV_U : PRV_S);
-WRITE_RD(MMU.guest_load_int16(RS1));
+WRITE_RD(MMU.guest_load<int16_t>(RS1));
diff --git a/riscv/insns/hlv_hu.h b/riscv/insns/hlv_hu.h
index adec2f0..f7f12ef 100644
--- a/riscv/insns/hlv_hu.h
+++ b/riscv/insns/hlv_hu.h
@@ -1,4 +1,4 @@
require_extension('H');
require_novirt();
require_privilege(get_field(STATE.hstatus->read(), HSTATUS_HU) ? PRV_U : PRV_S);
-WRITE_RD(MMU.guest_load_uint16(RS1));
+WRITE_RD(MMU.guest_load<uint16_t>(RS1));
diff --git a/riscv/insns/hlv_w.h b/riscv/insns/hlv_w.h
index b2e102f..72f69ea 100644
--- a/riscv/insns/hlv_w.h
+++ b/riscv/insns/hlv_w.h
@@ -1,4 +1,4 @@
require_extension('H');
require_novirt();
require_privilege(get_field(STATE.hstatus->read(), HSTATUS_HU) ? PRV_U : PRV_S);
-WRITE_RD(MMU.guest_load_int32(RS1));
+WRITE_RD(MMU.guest_load<int32_t>(RS1));
diff --git a/riscv/insns/hlv_wu.h b/riscv/insns/hlv_wu.h
index 1f921c0..854269f 100644
--- a/riscv/insns/hlv_wu.h
+++ b/riscv/insns/hlv_wu.h
@@ -2,4 +2,4 @@ require_extension('H');
require_rv64;
require_novirt();
require_privilege(get_field(STATE.hstatus->read(), HSTATUS_HU) ? PRV_U : PRV_S);
-WRITE_RD(MMU.guest_load_uint32(RS1));
+WRITE_RD(MMU.guest_load<uint32_t>(RS1));
diff --git a/riscv/insns/hlvx_hu.h b/riscv/insns/hlvx_hu.h
index 3eb699c..95dcb20 100644
--- a/riscv/insns/hlvx_hu.h
+++ b/riscv/insns/hlvx_hu.h
@@ -1,4 +1,4 @@
require_extension('H');
require_novirt();
require_privilege(get_field(STATE.hstatus->read(), HSTATUS_HU) ? PRV_U : PRV_S);
-WRITE_RD(MMU.guest_load_x_uint16(RS1));
+WRITE_RD(MMU.guest_load_x<uint16_t>(RS1));
diff --git a/riscv/insns/hlvx_wu.h b/riscv/insns/hlvx_wu.h
index 33e2fa1..c751ba5 100644
--- a/riscv/insns/hlvx_wu.h
+++ b/riscv/insns/hlvx_wu.h
@@ -1,4 +1,4 @@
require_extension('H');
require_novirt();
require_privilege(get_field(STATE.hstatus->read(), HSTATUS_HU) ? PRV_U : PRV_S);
-WRITE_RD(sext_xlen(MMU.guest_load_x_uint32(RS1)));
+WRITE_RD(sext_xlen(MMU.guest_load_x<uint32_t>(RS1)));
diff --git a/riscv/insns/hsv_b.h b/riscv/insns/hsv_b.h
index 15f6a26..d56483f 100644
--- a/riscv/insns/hsv_b.h
+++ b/riscv/insns/hsv_b.h
@@ -1,4 +1,4 @@
require_extension('H');
require_novirt();
require_privilege(get_field(STATE.hstatus->read(), HSTATUS_HU) ? PRV_U : PRV_S);
-MMU.guest_store_uint8(RS1, RS2);
+MMU.guest_store<uint8_t>(RS1, RS2);
diff --git a/riscv/insns/hsv_d.h b/riscv/insns/hsv_d.h
index 83c3376..ed7f5bb 100644
--- a/riscv/insns/hsv_d.h
+++ b/riscv/insns/hsv_d.h
@@ -2,4 +2,4 @@ require_extension('H');
require_rv64;
require_novirt();
require_privilege(get_field(STATE.hstatus->read(), HSTATUS_HU) ? PRV_U : PRV_S);
-MMU.guest_store_uint64(RS1, RS2);
+MMU.guest_store<uint64_t>(RS1, RS2);
diff --git a/riscv/insns/hsv_h.h b/riscv/insns/hsv_h.h
index eaa2a2c..596f168 100644
--- a/riscv/insns/hsv_h.h
+++ b/riscv/insns/hsv_h.h
@@ -1,4 +1,4 @@
require_extension('H');
require_novirt();
require_privilege(get_field(STATE.hstatus->read(), HSTATUS_HU) ? PRV_U : PRV_S);
-MMU.guest_store_uint16(RS1, RS2);
+MMU.guest_store<uint16_t>(RS1, RS2);
diff --git a/riscv/insns/hsv_w.h b/riscv/insns/hsv_w.h
index 0d2c3d4..f011e2d 100644
--- a/riscv/insns/hsv_w.h
+++ b/riscv/insns/hsv_w.h
@@ -1,4 +1,4 @@
require_extension('H');
require_novirt();
require_privilege(get_field(STATE.hstatus->read(), HSTATUS_HU) ? PRV_U : PRV_S);
-MMU.guest_store_uint32(RS1, RS2);
+MMU.guest_store<uint32_t>(RS1, RS2);
diff --git a/riscv/mmu.h b/riscv/mmu.h
index 4d9e1e1..9858f55 100644
--- a/riscv/mmu.h
+++ b/riscv/mmu.h
@@ -84,6 +84,16 @@ public:
return load<T>(addr, RISCV_XLATE_LR);
}
+ template<typename T>
+ T guest_load(reg_t addr) {
+ return load<T>(addr, RISCV_XLATE_VIRT);
+ }
+
+ template<typename T>
+ T guest_load_x(reg_t addr) {
+ return load<T>(addr, RISCV_XLATE_VIRT|RISCV_XLATE_VIRT_HLVX);
+ }
+
// template for functions that load an aligned value from memory
#define load_func(type, prefix, xlate_flags) \
type##_t ALWAYS_INLINE prefix##_##type(reg_t addr) { return load<type##_t>(addr, xlate_flags); }
@@ -94,26 +104,12 @@ public:
load_func(uint32, load, 0)
load_func(uint64, load, 0)
- // load value from guest memory at aligned address; zero extend to register width
- load_func(uint8, guest_load, RISCV_XLATE_VIRT)
- load_func(uint16, guest_load, RISCV_XLATE_VIRT)
- load_func(uint32, guest_load, RISCV_XLATE_VIRT)
- load_func(uint64, guest_load, RISCV_XLATE_VIRT)
- load_func(uint16, guest_load_x, RISCV_XLATE_VIRT|RISCV_XLATE_VIRT_HLVX)
- load_func(uint32, guest_load_x, RISCV_XLATE_VIRT|RISCV_XLATE_VIRT_HLVX)
-
// load value from memory at aligned address; sign extend to register width
load_func(int8, load, 0)
load_func(int16, load, 0)
load_func(int32, load, 0)
load_func(int64, load, 0)
- // load value from guest memory at aligned address; sign extend to register width
- load_func(int8, guest_load, RISCV_XLATE_VIRT)
- load_func(int16, guest_load, RISCV_XLATE_VIRT)
- load_func(int32, guest_load, RISCV_XLATE_VIRT)
- load_func(int64, guest_load, RISCV_XLATE_VIRT)
-
#ifndef RISCV_ENABLE_COMMITLOG
# define WRITE_MEM(addr, value, size) ((void)(addr), (void)(value), (void)(size))
#else
@@ -138,6 +134,11 @@ public:
WRITE_MEM(addr, val, sizeof(T));
}
+ template<typename T>
+ void guest_store(reg_t addr, T val) {
+ store(addr, val, RISCV_XLATE_VIRT);
+ }
+
// template for functions that store an aligned value to memory
#define store_func(type, prefix, xlate_flags) \
void ALWAYS_INLINE prefix##_##type(reg_t addr, type##_t val) { store(addr, val, xlate_flags); }
@@ -194,12 +195,6 @@ public:
store_func(uint32, store, 0)
store_func(uint64, store, 0)
- // store value to guest memory at aligned address
- store_func(uint8, guest_store, RISCV_XLATE_VIRT)
- store_func(uint16, guest_store, RISCV_XLATE_VIRT)
- store_func(uint32, guest_store, RISCV_XLATE_VIRT)
- store_func(uint64, guest_store, RISCV_XLATE_VIRT)
-
// perform an atomic memory operation at an aligned address
amo_func(uint32)
amo_func(uint64)