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| author | Andrew Waterman <waterman@s141.Millennium.Berkeley.EDU> | 2010-10-05 17:35:22 -0700 |
|---|---|---|
| committer | Andrew Waterman <waterman@s141.Millennium.Berkeley.EDU> | 2010-10-05 17:35:22 -0700 |
| commit | 2d58d46c890b17d94c969e428c748e7fb367e462 (patch) | |
| tree | a55c3c98fe452db07195fb8a9f8b69fbfc60dc10 | |
| parent | a359d7b81adb7f1ca371822bd2df3bac7cda99ba (diff) | |
| download | spike-2d58d46c890b17d94c969e428c748e7fb367e462.zip spike-2d58d46c890b17d94c969e428c748e7fb367e462.tar.gz spike-2d58d46c890b17d94c969e428c748e7fb367e462.tar.bz2 | |
[xcc] removed CEXC field from FSR
| -rw-r--r-- | riscv/decode.h | 20 |
1 files changed, 5 insertions, 15 deletions
diff --git a/riscv/decode.h b/riscv/decode.h index 125ba76..9a0632a 100644 --- a/riscv/decode.h +++ b/riscv/decode.h @@ -47,9 +47,8 @@ const int JUMP_ALIGN_BITS = 1; #define FP_RD_0 1 #define FP_RD_DN 2 #define FP_RD_UP 3 -#define FP_RD_NMM 4 -#define FSR_RD_SHIFT 10 -#define FSR_RD (0x7 << FSR_RD_SHIFT) +#define FSR_RD_SHIFT 5 +#define FSR_RD (0x3 << FSR_RD_SHIFT) #define FPEXC_NX 0x01 #define FPEXC_UF 0x02 @@ -57,14 +56,6 @@ const int JUMP_ALIGN_BITS = 1; #define FPEXC_DZ 0x02 #define FPEXC_NV 0x10 -#define FSR_CEXC_SHIFT 5 -#define FSR_NVC (FPEXC_NV << FSR_CEXC_SHIFT) -#define FSR_OFC (FPEXC_OF << FSR_CEXC_SHIFT) -#define FSR_UFC (FPEXC_UF << FSR_CEXC_SHIFT) -#define FSR_DZC (FPEXC_DZ << FSR_CEXC_SHIFT) -#define FSR_NXC (FPEXC_NX << FSR_CEXC_SHIFT) -#define FSR_CEXC (FSR_NVC | FSR_OFC | FSR_UFC | FSR_DZC | FSR_NXC) - #define FSR_AEXC_SHIFT 0 #define FSR_NVA (FPEXC_NV << FSR_AEXC_SHIFT) #define FSR_OFA (FPEXC_OF << FSR_AEXC_SHIFT) @@ -73,7 +64,7 @@ const int JUMP_ALIGN_BITS = 1; #define FSR_NXA (FPEXC_NX << FSR_AEXC_SHIFT) #define FSR_AEXC (FSR_NVA | FSR_OFA | FSR_UFA | FSR_DZA | FSR_NXA) -#define FSR_ZERO ~(FSR_RD | FSR_AEXC | FSR_CEXC) +#define FSR_ZERO ~(FSR_RD | FSR_AEXC) // note: bit fields are in little-endian order struct itype_t @@ -150,9 +141,8 @@ union insn_t #define require64 if(gprlen != 64) throw trap_illegal_instruction #define require_fp if(!(sr & SR_EF)) throw trap_fp_disabled #define cmp_trunc(reg) (reg_t(reg) << (64-gprlen)) -#define set_fp_exceptions ({ set_fsr((fsr & ~FSR_CEXC) | \ - (softfloat_exceptionFlags << FSR_AEXC_SHIFT) | \ - (softfloat_exceptionFlags << FSR_CEXC_SHIFT)); \ +#define set_fp_exceptions ({ set_fsr(fsr | \ + (softfloat_exceptionFlags << FSR_AEXC_SHIFT)); \ softfloat_exceptionFlags = 0; }) static inline sreg_t sext32(int32_t arg) |