Merge pull request #491 from chihminchao/rvv-fix-2020-06-18

Rvv fix 2020 06 18

3 files changed, 4 insertions, 4 deletions

diff --git a/riscv/execute.cc b/riscv/execute.cc
index e5513d8..7e89cd1 100644
--- a/riscv/execute.cc
+++ b/riscv/execute.cc
@@ -109,8 +109,8 @@ static void commit_log_print_insn(processor_t *p, reg_t pc, insn_t insn)
     if (!show_vec && (is_vreg || is_vec)) {
         fprintf(log_file, " e%ld %s%ld l%ld",
                 p->VU.vsew,
-                p->VU.vflmul < 0 ? "mf" : "m",
-                p->VU.vflmul < 0 ? (reg_t)(1 / p->VU.vflmul) : (reg_t)p->VU.vflmul,
+                p->VU.vflmul < 1 ? "mf" : "m",
+                p->VU.vflmul < 1 ? (reg_t)(1 / p->VU.vflmul) : (reg_t)p->VU.vflmul,
                 p->VU.vl);
         show_vec = true;
     }
diff --git a/riscv/insns/vl1r_v.h b/riscv/insns/vl1r_v.h
index 61e8765..9289634 100644
--- a/riscv/insns/vl1r_v.h
+++ b/riscv/insns/vl1r_v.h
@@ -2,7 +2,7 @@
 require_vector_novtype(true);
 const reg_t baseAddr = RS1;
 const reg_t vd = insn.rd();
-for (reg_t i = 0; i < P.VU.vlenb; ++i) {
+for (reg_t i = P.VU.vstart; i < P.VU.vlenb; ++i) {
   auto val = MMU.load_uint8(baseAddr + i);
   P.VU.elt<uint8_t>(vd, i, true) = val;
 }
diff --git a/riscv/insns/vs1r_v.h b/riscv/insns/vs1r_v.h
index 20dcece..5ccbd5f 100644
--- a/riscv/insns/vs1r_v.h
+++ b/riscv/insns/vs1r_v.h
@@ -2,7 +2,7 @@
 require_vector_novtype(true);
 const reg_t baseAddr = RS1;
 const reg_t vs3 = insn.rd();
-for (reg_t i = 0; i < P.VU.vlenb; ++i) {
+for (reg_t i = P.VU.vstart; i < P.VU.vlenb; ++i) {
   auto val = P.VU.elt<uint8_t>(vs3, i);
   MMU.store_uint8(baseAddr + i, val);
 }