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| author | Yunsup Lee <yunsup@cs.berkeley.edu> | 2011-10-18 17:14:44 -0700 |
|---|---|---|
| committer | Yunsup Lee <yunsup@cs.berkeley.edu> | 2011-10-18 17:14:44 -0700 |
| commit | fa079e1858580c22295f4a643af43a4adfc81788 (patch) | |
| tree | d8262b5b38dd6712ec9d01a4b9e18846d84ad050 | |
| parent | ed8a77d328a85affe0d5d7a5cf631f64236fe895 (diff) | |
| parent | 4f3f70f6b7a115ddb159953df5f5cb4261260685 (diff) | |
| download | spike-fa079e1858580c22295f4a643af43a4adfc81788.zip spike-fa079e1858580c22295f4a643af43a4adfc81788.tar.gz spike-fa079e1858580c22295f4a643af43a4adfc81788.tar.bz2 | |
Merge branch 'master' of github.com:ucb-bar/riscv-isa-sim
| -rw-r--r-- | riscv/insns/vf.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/riscv/insns/vf.h b/riscv/insns/vf.h index 7779645..d1527b3 100644 --- a/riscv/insns/vf.h +++ b/riscv/insns/vf.h @@ -3,6 +3,7 @@ for (int i=0; i<VL; i++) { uts[i]->pc = RS1+SIMM; uts[i]->utmode = true; + uts[i]->run = true; while (uts[i]->utmode) uts[i]->step(1, false); // XXX } |