diff options
| -rw-r--r-- | npcm8xx/image.c | 37 |
1 files changed, 27 insertions, 10 deletions
diff --git a/npcm8xx/image.c b/npcm8xx/image.c index f799774..7a2da61 100644 --- a/npcm8xx/image.c +++ b/npcm8xx/image.c @@ -1,7 +1,7 @@ /* * Boot image parsing and loading. * - * Copyright 2022 Google LLC + * Copyright 2020 Google LLC * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. @@ -21,10 +21,16 @@ #define SPI0CS0 0x80000000 #define CLK 0xf0801000 #define FIU0 0xfb000000 + #define CLK_CLKSEL 0x04 #define CLK_CLKSEL_DEFAULT 0x1f18fc9 + #define FIU_DRD_CFG 0x00 +#define UBOOT_TAG 0x4c42544f4f42550aULL /* .UBOOTBL */ +#define UBOOT_MAGIC 0x1400000a +#define UBOOT_SIZE 0xb0000 + /* * This structure must reside at offset 0x100 in SRAM. * @@ -70,17 +76,28 @@ void copy_boot_image(uintptr_t dest_addr, uintptr_t src_addr, int32_t len) } } -uintptr_t load_boot_image(void) +static uint32_t search_and_load_uboot(uintptr_t end) { - uintptr_t dest_addr = 0x8000; + uintptr_t addr; + uintptr_t src_addr, dest_addr; + uint32_t size; + for (addr = 0; addr < end; addr += 0x100) { + src_addr = SPI0CS0 + addr; + if ((*(uint64_t *)src_addr == UBOOT_TAG) && + (*(uint32_t *)(src_addr + 0x200) == UBOOT_MAGIC)) { + dest_addr = image_read_u32(src_addr, 0x1f8); + size = image_read_u32(src_addr, 0x1fc); + copy_boot_image(dest_addr, src_addr, size); + return dest_addr; + } + } + return 0; +} + +uintptr_t load_boot_image(void) +{ /* Set CLKSEL to similar values as NPCM7XX */ reg_write(CLK, CLK_CLKSEL, CLK_CLKSEL_DEFAULT); - - /* Load the U-BOOT image to DRAM */ - copy_boot_image(dest_addr, SPI0CS0 + 0x20200, 0xa6e80); - /* Set FIU to use 4 byte mode, similar to what TIP does in reality. */ - reg_write(FIU0, FIU_DRD_CFG, 0x0301100b); - - return dest_addr; + return search_and_load_uboot(0x200000) + 0x200; } |