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| author | Tom Rini <trini@konsulko.com> | 2021-05-14 21:34:20 -0400 |
|---|---|---|
| committer | Tom Rini <trini@konsulko.com> | 2021-07-07 19:52:23 -0400 |
| commit | a8571337d78093d2aff25add22df5cdc4e30f8a9 (patch) | |
| tree | 50301d40ffc2cac1a6c368901f6c0170a14d98e4 /drivers/ddr | |
| parent | 5fe4c0cc6e80cffb6fb91a3c35a8adb6ce4e0e2b (diff) | |
| download | u-boot-a8571337d78093d2aff25add22df5cdc4e30f8a9.zip u-boot-a8571337d78093d2aff25add22df5cdc4e30f8a9.tar.gz u-boot-a8571337d78093d2aff25add22df5cdc4e30f8a9.tar.bz2 | |
ppc: Remove MPC8541CDS board
This board has not been converted to CONFIG_DM_PCI by the deadline and is
also missing conversion to CONFIG_DM. Remove it. As this is the only
MPC8541 target left, remove that architecture support as well.
Cc: Priyanka Jain <priyanka.jain@nxp.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Diffstat (limited to 'drivers/ddr')
| -rw-r--r-- | drivers/ddr/fsl/ctrl_regs.c | 2 | ||||
| -rw-r--r-- | drivers/ddr/fsl/mpc85xx_ddr_gen1.c | 2 |
2 files changed, 2 insertions, 2 deletions
diff --git a/drivers/ddr/fsl/ctrl_regs.c b/drivers/ddr/fsl/ctrl_regs.c index c849ef3..b800344 100644 --- a/drivers/ddr/fsl/ctrl_regs.c +++ b/drivers/ddr/fsl/ctrl_regs.c @@ -1866,7 +1866,7 @@ static void set_ddr_sdram_clk_cntl(fsl_ddr_cfg_regs_t *ddr, unsigned int clk_adjust; /* Clock adjust */ unsigned int ss_en = 0; /* Source synchronous enable */ -#if defined(CONFIG_ARCH_MPC8541) || defined(CONFIG_ARCH_MPC8555) +#if defined(CONFIG_ARCH_MPC8555) /* Per FSL Application Note: AN2805 */ ss_en = 1; #endif diff --git a/drivers/ddr/fsl/mpc85xx_ddr_gen1.c b/drivers/ddr/fsl/mpc85xx_ddr_gen1.c index 572f370..c642a5b 100644 --- a/drivers/ddr/fsl/mpc85xx_ddr_gen1.c +++ b/drivers/ddr/fsl/mpc85xx_ddr_gen1.c @@ -48,7 +48,7 @@ void fsl_ddr_set_memctl_regs(const fsl_ddr_cfg_regs_t *regs, out_be32(&ddr->timing_cfg_2, regs->timing_cfg_2); out_be32(&ddr->sdram_mode, regs->ddr_sdram_mode); out_be32(&ddr->sdram_interval, regs->ddr_sdram_interval); -#if defined(CONFIG_ARCH_MPC8555) || defined(CONFIG_ARCH_MPC8541) +#if defined(CONFIG_ARCH_MPC8555) out_be32(&ddr->sdram_clk_cntl, regs->ddr_sdram_clk_cntl); #endif |