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author | Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com> | 2020-04-22 02:08:06 +0300 |
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committer | Alexey Brodkin <abrodkin@synopsys.com> | 2020-04-27 11:20:26 +0300 |
commit | b84aa4cc1dfd7b077e1a49a8a96c68c0c4fd28a5 (patch) | |
tree | d56a896d2323ee83b6454c26b68312b03246ae7f /board/synopsys | |
parent | e31fdd8170df7e43d3accdcb47f7a3820e7306a3 (diff) | |
download | u-boot-b84aa4cc1dfd7b077e1a49a8a96c68c0c4fd28a5.zip u-boot-b84aa4cc1dfd7b077e1a49a8a96c68c0c4fd28a5.tar.gz u-boot-b84aa4cc1dfd7b077e1a49a8a96c68c0c4fd28a5.tar.bz2 |
ARC: HSDK-4xD: print info about HDMI clocks
HSDK-4xD has HDMI working so let's print info about HDMI clocks.
Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
Diffstat (limited to 'board/synopsys')
-rw-r--r-- | board/synopsys/hsdk/hsdk.c | 11 |
1 files changed, 7 insertions, 4 deletions
diff --git a/board/synopsys/hsdk/hsdk.c b/board/synopsys/hsdk/hsdk.c index 577893d..45bc5eb 100644 --- a/board/synopsys/hsdk/hsdk.c +++ b/board/synopsys/hsdk/hsdk.c @@ -985,7 +985,8 @@ static int do_hsdk_clock_print_all(cmd_tbl_t *cmdtp, int flag, int argc, soc_clk_ctl("eth-clk", NULL, CLK_PRINT | CLK_MHZ); soc_clk_ctl("usb-clk", NULL, CLK_PRINT | CLK_MHZ); soc_clk_ctl("sdio-clk", NULL, CLK_PRINT | CLK_MHZ); -/* soc_clk_ctl("hdmi-sys-clk", NULL, CLK_PRINT | CLK_MHZ); */ + if (is_board_match_runtime(T_BOARD_HSDK_4XD)) + soc_clk_ctl("hdmi-sys-clk", NULL, CLK_PRINT | CLK_MHZ); soc_clk_ctl("gfx-core-clk", NULL, CLK_PRINT | CLK_MHZ); soc_clk_ctl("gfx-dma-clk", NULL, CLK_PRINT | CLK_MHZ); soc_clk_ctl("gfx-cfg-clk", NULL, CLK_PRINT | CLK_MHZ); @@ -1003,9 +1004,11 @@ static int do_hsdk_clock_print_all(cmd_tbl_t *cmdtp, int flag, int argc, printf("\n"); /* HDMI clock domain */ -/* soc_clk_ctl("hdmi-pll", NULL, CLK_PRINT | CLK_MHZ); */ -/* soc_clk_ctl("hdmi-clk", NULL, CLK_PRINT | CLK_MHZ); */ -/* printf("\n"); */ + if (is_board_match_runtime(T_BOARD_HSDK_4XD)) { + soc_clk_ctl("hdmi-pll", NULL, CLK_PRINT | CLK_MHZ); + soc_clk_ctl("hdmi-clk", NULL, CLK_PRINT | CLK_MHZ); + printf("\n"); + } /* TUN clock domain */ soc_clk_ctl("tun-pll", NULL, CLK_PRINT | CLK_MHZ); |