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authorTom Rini <trini@konsulko.com>2021-08-27 08:33:02 -0400
committerTom Rini <trini@konsulko.com>2021-08-27 08:33:02 -0400
commitb9cb74a5aa256fc34a1b2b9dd847a985b91f34f6 (patch)
treea618344b253ec3164848e797a2636bbd8f060223 /arch/arm/dts/zynq-zc706.dts
parent7bfa565453ec5f63668a3464da21629055c3053f (diff)
parent229cb5c6ba3469cbc4a0bcc69389fe61c51fd3b4 (diff)
downloadu-boot-WIP/27Aug2021.zip
u-boot-WIP/27Aug2021.tar.gz
u-boot-WIP/27Aug2021.tar.bz2
Merge tag 'xilinx-for-v2021.10-rc3' of https://gitlab.denx.de/u-boot/custodians/u-boot-microblazeWIP/27Aug2021
Xilinx changes for v2021.10-rc3 xilinx: - Disable CONFIG_ARCH_FIXUP_FDT_MEMORY - Print information about cpu via soc drivers and enable DISPLAY_CPUINFO - Wire infrastructure for DTB_RESELECT and MULTI_DTB_FIT zynq: - Wire single QSPI - Use power-source instead of io-standard properties - Enable nor on zc770-xm012 zynqmp: - Change handling around multi_boot() - Setup offset for u-boot.itb in spi - Generate run time dfu_alt_info for capsule update - Use explicit values for enums (zynqmp_firmware.h) - Enable RTC/SHA1/BUTTON/BUTTON_GPIO command - Disable WDT driver by default - Bind usb/scsi via preboot because of EFI - DT updates/fixes - Add soc driver - Fix SPL SPI boot mode versal: - Add soc driver sdhci: - Update tap delay programming for zynq_sdhci driver cmd: - Fix RTC uclass handling in date command - Update pwm help message - Update reset help message watchdog: - Fix wwdt compilation rtc: - Deal with seq alias in rtc uclass - Add zynqmp RTC driver fdt: - Add kernel-doc for fdt_fixup_memory_banks()
Diffstat (limited to 'arch/arm/dts/zynq-zc706.dts')
-rw-r--r--arch/arm/dts/zynq-zc706.dts26
1 files changed, 17 insertions, 9 deletions
diff --git a/arch/arm/dts/zynq-zc706.dts b/arch/arm/dts/zynq-zc706.dts
index 84729e9..cb919e4 100644
--- a/arch/arm/dts/zynq-zc706.dts
+++ b/arch/arm/dts/zynq-zc706.dts
@@ -151,7 +151,7 @@
conf {
groups = "ethernet0_0_grp";
slew-rate = <0>;
- io-standard = <4>;
+ power-source = <4>;
};
conf-rx {
@@ -174,7 +174,7 @@
conf-mdio {
groups = "mdio0_0_grp";
slew-rate = <0>;
- io-standard = <1>;
+ power-source = <1>;
bias-disable;
};
};
@@ -188,7 +188,7 @@
conf {
groups = "gpio0_7_grp", "gpio0_46_grp", "gpio0_47_grp";
slew-rate = <0>;
- io-standard = <1>;
+ power-source = <1>;
};
conf-pull-up {
@@ -212,7 +212,7 @@
groups = "i2c0_10_grp";
bias-pull-up;
slew-rate = <0>;
- io-standard = <1>;
+ power-source = <1>;
};
};
@@ -225,7 +225,7 @@
conf {
groups = "sdio0_2_grp";
slew-rate = <0>;
- io-standard = <1>;
+ power-source = <1>;
bias-disable;
};
@@ -239,7 +239,7 @@
bias-high-impedance;
bias-pull-up;
slew-rate = <0>;
- io-standard = <1>;
+ power-source = <1>;
};
mux-wp {
@@ -252,7 +252,7 @@
bias-high-impedance;
bias-pull-up;
slew-rate = <0>;
- io-standard = <1>;
+ power-source = <1>;
};
};
@@ -265,7 +265,7 @@
conf {
groups = "uart1_10_grp";
slew-rate = <0>;
- io-standard = <1>;
+ power-source = <1>;
};
conf-rx {
@@ -288,7 +288,7 @@
conf {
groups = "usb0_0_grp";
slew-rate = <0>;
- io-standard = <1>;
+ power-source = <1>;
};
conf-rx {
@@ -307,6 +307,14 @@
&qspi {
u-boot,dm-pre-reloc;
status = "okay";
+ num-cs = <1>;
+ flash@0 {
+ compatible = "n25q128a11", "jedec,spi-nor";
+ reg = <0x0>;
+ spi-tx-bus-width = <1>;
+ spi-rx-bus-width = <4>;
+ spi-max-frequency = <50000000>;
+ };
};
&sdhci0 {