Merge tag 'next-20220328' of https://source.denx.de/u-boot/custodians/u-boot-video into nextWIP/28Mar2022

 - drop old CFB code
 - drop CONFIG_LCD_BMP_RLE8

98 files changed, 29 insertions, 6669 deletions

diff --git a/README b/README
index 805c8f0..3322f06 100644
--- a/README
+++ b/README
@@ -970,24 +970,6 @@ The following options need to be configured:
 - Keyboard Support:
 		See Kconfig help for available keyboard drivers.
 
-- Video support:
-		CONFIG_FSL_DIU_FB
-		Enable the Freescale DIU video driver.	Reference boards for
-		SOCs that have a DIU should define this macro to enable DIU
-		support, and should also define these other macros:
-
-			CONFIG_SYS_DIU_ADDR
-			CONFIG_VIDEO
-			CONFIG_CFB_CONSOLE
-			CONFIG_VIDEO_SW_CURSOR
-			CONFIG_VGA_AS_SINGLE_DEVICE
-			CONFIG_VIDEO_BMP_LOGO
-
-		The DIU driver will look for the 'video-mode' environment
-		variable, and if defined, enable the DIU as a console during
-		boot.  See the documentation file doc/README.video for a
-		description of this variable.
-
 - LCD Support:	CONFIG_LCD
 
 		Define this to enable LCD support (for output to LCD
@@ -1062,10 +1044,6 @@ The following options need to be configured:
 		If CONFIG_LCD_ROTATION is not defined, the console will be
 		initialized with 0degree rotation.
 
-		CONFIG_LCD_BMP_RLE8
-
-		Support drawing of RLE8-compressed bitmaps on the LCD.
-
 - MII/PHY support:
 		CONFIG_PHY_CLOCK_FREQ (ppc4xx)
 
diff --git a/arch/arm/cpu/armv7/ls102xa/soc.c b/arch/arm/cpu/armv7/ls102xa/soc.c
index c131d92..728efc4 100644
--- a/arch/arm/cpu/armv7/ls102xa/soc.c
+++ b/arch/arm/cpu/armv7/ls102xa/soc.c
@@ -174,10 +174,6 @@ int arch_soc_init(void)
 	out_be32(&scfg->qspi_cfg, SCFG_QSPI_CLKSEL);
 #endif
 
-#ifdef CONFIG_VIDEO_FSL_DCU_FB
-	out_be32(&scfg->pixclkcr, SCFG_PIXCLKCR_PXCKEN);
-#endif
-
 	/* Configure Little endian for SAI, ASRC and SPDIF */
 	out_be32(&scfg->endiancr, SCFG_ENDIANCR_LE);
 
diff --git a/arch/arm/include/asm/arch-ls102xa/config.h b/arch/arm/include/asm/arch-ls102xa/config.h
index 86a4e1f..3b1d9a3 100644
--- a/arch/arm/include/asm/arch-ls102xa/config.h
+++ b/arch/arm/include/asm/arch-ls102xa/config.h
@@ -88,7 +88,6 @@
 #define CONFIG_SYS_FSL_ESDHC_BE
 #define CONFIG_SYS_FSL_WDOG_BE
 #define CONFIG_SYS_FSL_DSPI_BE
-#define CONFIG_SYS_FSL_DCU_BE
 #define CONFIG_SYS_FSL_SEC_MON_LE
 #define CONFIG_SYS_FSL_SFP_VER_3_2
 #define CONFIG_SYS_FSL_SFP_BE
diff --git a/arch/arm/include/asm/mach-imx/mx5_video.h b/arch/arm/include/asm/mach-imx/mx5_video.h
index dc6aa00c..b55c0fe 100644
--- a/arch/arm/include/asm/mach-imx/mx5_video.h
+++ b/arch/arm/include/asm/mach-imx/mx5_video.h
@@ -6,12 +6,7 @@
 #ifndef __MX5_VIDEO_H
 #define __MX5_VIDEO_H
 
-#ifdef CONFIG_VIDEO
-void lcd_enable(void);
-void setup_iomux_lcd(void);
-#else
 static inline void lcd_enable(void) { }
 static inline void setup_iomux_lcd(void) { }
-#endif
 
 #endif
diff --git a/arch/arm/mach-nexell/include/mach/display_dev.h b/arch/arm/mach-nexell/include/mach/display_dev.h
index 77eb614..f24fb17 100644
--- a/arch/arm/mach-nexell/include/mach/display_dev.h
+++ b/arch/arm/mach-nexell/include/mach/display_dev.h
@@ -8,16 +8,12 @@
 #ifndef _NX__DISPLAY_DEV_H_
 #define _NX__DISPLAY_DEV_H_
 
-#if defined CONFIG_VIDEO || defined CONFIG_DM_VIDEO
-#include <video_fb.h>
-#elif defined CONFIG_LCD
+#if !defined(CONFIG_DM_VIDEO) && defined(CONFIG_LCD)
 #include <lcd.h>
 #endif
 
 struct nx_display_dev {
-#if defined CONFIG_VIDEO || defined CONFIG_DM_VIDEO
-	GraphicDevice graphic_device;
-#elif defined CONFIG_LCD
+#if !defined(CONFIG_DM_VIDEO) && defined(CONFIG_LCD)
 	vidinfo_t *panel_info;
 #endif
 	unsigned long base;
diff --git a/board/aristainetos/aristainetos.c b/board/aristainetos/aristainetos.c
index f13fa11..19af596 100644
--- a/board/aristainetos/aristainetos.c
+++ b/board/aristainetos/aristainetos.c
@@ -39,7 +39,6 @@
 #include <power/regulator.h>
 #include <power/da9063_pmic.h>
 #include <splash.h>
-#include <video_fb.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 
diff --git a/board/freescale/common/Makefile b/board/freescale/common/Makefile
index 0ddfb59..f13965d 100644
--- a/board/freescale/common/Makefile
+++ b/board/freescale/common/Makefile
@@ -44,16 +44,12 @@ ifndef CONFIG_RAMBOOT_PBL
 obj-$(CONFIG_FSL_FIXED_MMC_LOCATION)	+= sdhc_boot.o
 endif
 
-obj-$(CONFIG_FSL_DIU_CH7301)	+= diu_ch7301.o
-
 ifdef CONFIG_ARM
 obj-$(CONFIG_DEEP_SLEEP)		+= arm_sleep.o
 else
 obj-$(CONFIG_DEEP_SLEEP)		+= mpc85xx_sleep.o
 endif
 
-obj-$(CONFIG_FSL_DCU_SII9022A)    += dcu_sii9022a.o
-
 obj-$(CONFIG_TARGET_MPC8548CDS)	+= cds_pci_ft.o
 
 obj-$(CONFIG_TARGET_MPC8536DS)	+= ics307_clk.o
diff --git a/board/freescale/common/dcu_sii9022a.c b/board/freescale/common/dcu_sii9022a.c
deleted file mode 100644
index 9137d24..0000000
--- a/board/freescale/common/dcu_sii9022a.c
+++ /dev/null
@@ -1,248 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0+
-/*
- * Copyright 2014 Freescale Semiconductor, Inc.
- * Copyright 2019 NXP
- */
-
-#include <asm/io.h>
-#include <common.h>
-#include <fsl_dcu_fb.h>
-#include <i2c.h>
-#include <linux/fb.h>
-
-#define PIXEL_CLK_LSB_REG		0x00
-#define PIXEL_CLK_MSB_REG		0x01
-#define VERT_FREQ_LSB_REG		0x02
-#define VERT_FREQ_MSB_REG		0x03
-#define TOTAL_PIXELS_LSB_REG		0x04
-#define TOTAL_PIXELS_MSB_REG		0x05
-#define TOTAL_LINES_LSB_REG		0x06
-#define TOTAL_LINES_MSB_REG		0x07
-#define TPI_INBUS_FMT_REG		0x08
-#define TPI_INPUT_FMT_REG		0x09
-#define TPI_OUTPUT_FMT_REG		0x0A
-#define TPI_SYS_CTRL_REG		0x1A
-#define TPI_PWR_STAT_REG		0x1E
-#define TPI_AUDIO_HANDING_REG		0x25
-#define TPI_AUDIO_INTF_REG		0x26
-#define TPI_AUDIO_FREQ_REG		0x27
-#define TPI_SET_PAGE_REG		0xBC
-#define TPI_SET_OFFSET_REG		0xBD
-#define TPI_RW_ACCESS_REG		0xBE
-#define TPI_TRANS_MODE_REG		0xC7
-
-#define TPI_INBUS_CLOCK_RATIO_1		(1 << 6)
-#define TPI_INBUS_FULL_PIXEL_WIDE	(1 << 5)
-#define TPI_INBUS_RISING_EDGE		(1 << 4)
-#define TPI_INPUT_CLR_DEPTH_8BIT	(0 << 6)
-#define TPI_INPUT_VRANGE_EXPAN_AUTO	(0 << 2)
-#define TPI_INPUT_CLR_RGB		(0 << 0)
-#define TPI_OUTPUT_CLR_DEPTH_8BIT	(0 << 6)
-#define TPI_OUTPUT_VRANGE_COMPRE_AUTO	(0 << 2)
-#define TPI_OUTPUT_CLR_HDMI_RGB		(0 << 0)
-#define TPI_SYS_TMDS_OUTPUT		(0 << 4)
-#define TPI_SYS_AV_NORAML		(0 << 3)
-#define TPI_SYS_AV_MUTE			(1 << 3)
-#define TPI_SYS_DVI_MODE		(0 << 0)
-#define TPI_SYS_HDMI_MODE		(1 << 0)
-#define TPI_PWR_STAT_MASK		(3 << 0)
-#define TPI_PWR_STAT_D0			(0 << 0)
-#define TPI_AUDIO_PASS_BASIC		(0 << 0)
-#define TPI_AUDIO_INTF_I2S		(2 << 6)
-#define TPI_AUDIO_INTF_NORMAL		(0 << 4)
-#define TPI_AUDIO_TYPE_PCM		(1 << 0)
-#define TPI_AUDIO_SAMP_SIZE_16BIT	(1 << 6)
-#define TPI_AUDIO_SAMP_FREQ_44K		(2 << 3)
-#define TPI_SET_PAGE_SII9022A		0x01
-#define TPI_SET_OFFSET_SII9022A		0x82
-#define TPI_RW_EN_SRC_TERMIN		(1 << 0)
-#define TPI_TRANS_MODE_ENABLE		(0 << 7)
-
-/* Programming of Silicon SIi9022a HDMI Transmitter */
-int dcu_set_dvi_encoder(struct fb_videomode *videomode)
-{
-	u8 temp;
-	u16 temp1, temp2;
-	u32 temp3;
-#if CONFIG_IS_ENABLED(DM_I2C)
-	struct udevice *dev;
-	int ret;
-
-	ret = i2c_get_chip_for_busnum(CONFIG_SYS_I2C_DVI_BUS_NUM,
-				      CONFIG_SYS_I2C_DVI_ADDR,
-				      1, &dev);
-	if (ret) {
-		printf("%s: Cannot find udev for a bus %d\n", __func__,
-		       CONFIG_SYS_I2C_DVI_BUS_NUM);
-		return ret;
-	}
-
-	/* Enable TPI transmitter mode */
-	temp = TPI_TRANS_MODE_ENABLE;
-	dm_i2c_write(dev, TPI_TRANS_MODE_REG, &temp, 1);
-
-	/* Enter into D0 state, full operation */
-	dm_i2c_read(dev, TPI_PWR_STAT_REG, &temp, 1);
-	temp &= ~TPI_PWR_STAT_MASK;
-	temp |= TPI_PWR_STAT_D0;
-	dm_i2c_write(dev, TPI_PWR_STAT_REG, &temp, 1);
-
-	/* Enable source termination */
-	temp = TPI_SET_PAGE_SII9022A;
-	dm_i2c_write(dev, TPI_SET_PAGE_REG, &temp, 1);
-	temp = TPI_SET_OFFSET_SII9022A;
-	dm_i2c_write(dev, TPI_SET_OFFSET_REG, &temp, 1);
-
-	dm_i2c_read(dev, TPI_RW_ACCESS_REG, &temp, 1);
-	temp |= TPI_RW_EN_SRC_TERMIN;
-	dm_i2c_write(dev, TPI_RW_ACCESS_REG, &temp, 1);
-
-	/* Set TPI system control */
-	temp = TPI_SYS_TMDS_OUTPUT | TPI_SYS_AV_NORAML | TPI_SYS_DVI_MODE;
-	dm_i2c_write(dev, TPI_SYS_CTRL_REG, &temp, 1);
-
-	/* Set pixel clock */
-	temp1 = PICOS2KHZ(videomode->pixclock) / 10;
-	temp = (u8)(temp1 & 0xFF);
-	dm_i2c_write(dev, PIXEL_CLK_LSB_REG, &temp, 1);
-	temp = (u8)(temp1 >> 8);
-	dm_i2c_write(dev, PIXEL_CLK_MSB_REG, &temp, 1);
-
-	/* Set total pixels per line */
-	temp1 = videomode->hsync_len + videomode->left_margin +
-		videomode->xres + videomode->right_margin;
-	temp = (u8)(temp1 & 0xFF);
-	dm_i2c_write(dev, TOTAL_PIXELS_LSB_REG, &temp, 1);
-	temp = (u8)(temp1 >> 8);
-	dm_i2c_write(dev, TOTAL_PIXELS_MSB_REG, &temp, 1);
-
-	/* Set total lines */
-	temp2 = videomode->vsync_len + videomode->upper_margin +
-		videomode->yres + videomode->lower_margin;
-	temp = (u8)(temp2 & 0xFF);
-	dm_i2c_write(dev, TOTAL_LINES_LSB_REG, &temp, 1);
-	temp = (u8)(temp2 >> 8);
-	dm_i2c_write(dev, TOTAL_LINES_MSB_REG, &temp, 1);
-
-	/* Set vertical frequency in Hz */
-	temp3 = temp1 * temp2;
-	temp3 = (PICOS2KHZ(videomode->pixclock) * 1000) / temp3;
-	temp1 = (u16)temp3 * 100;
-	temp = (u8)(temp1 & 0xFF);
-	dm_i2c_write(dev, VERT_FREQ_LSB_REG, &temp, 1);
-	temp = (u8)(temp1 >> 8);
-	dm_i2c_write(dev, VERT_FREQ_MSB_REG, &temp, 1);
-
-	/* Set TPI input bus and pixel repetition data */
-	temp = TPI_INBUS_CLOCK_RATIO_1 | TPI_INBUS_FULL_PIXEL_WIDE |
-		TPI_INBUS_RISING_EDGE;
-	dm_i2c_write(dev, TPI_INBUS_FMT_REG, &temp, 1);
-
-	/* Set TPI AVI Input format data */
-	temp = TPI_INPUT_CLR_DEPTH_8BIT | TPI_INPUT_VRANGE_EXPAN_AUTO |
-		TPI_INPUT_CLR_RGB;
-	dm_i2c_write(dev, TPI_INPUT_FMT_REG, &temp, 1);
-
-	/* Set TPI AVI Output format data */
-	temp = TPI_OUTPUT_CLR_DEPTH_8BIT | TPI_OUTPUT_VRANGE_COMPRE_AUTO |
-		TPI_OUTPUT_CLR_HDMI_RGB;
-	dm_i2c_write(dev, TPI_OUTPUT_FMT_REG, &temp, 1);
-
-	/* Set TPI audio configuration write data */
-	temp = TPI_AUDIO_PASS_BASIC;
-	dm_i2c_write(dev, TPI_AUDIO_HANDING_REG, &temp, 1);
-
-	temp = TPI_AUDIO_INTF_I2S | TPI_AUDIO_INTF_NORMAL |
-		TPI_AUDIO_TYPE_PCM;
-	dm_i2c_write(dev, TPI_AUDIO_INTF_REG, &temp, 1);
-
-	temp = TPI_AUDIO_SAMP_SIZE_16BIT | TPI_AUDIO_SAMP_FREQ_44K;
-	dm_i2c_write(dev, TPI_AUDIO_FREQ_REG, &temp, 1);
-#else
-	i2c_set_bus_num(CONFIG_SYS_I2C_DVI_BUS_NUM);
-
-	/* Enable TPI transmitter mode */
-	temp = TPI_TRANS_MODE_ENABLE;
-	i2c_write(CONFIG_SYS_I2C_DVI_ADDR, TPI_TRANS_MODE_REG, 1, &temp, 1);
-
-	/* Enter into D0 state, full operation */
-	i2c_read(CONFIG_SYS_I2C_DVI_ADDR, TPI_PWR_STAT_REG, 1, &temp, 1);
-	temp &= ~TPI_PWR_STAT_MASK;
-	temp |= TPI_PWR_STAT_D0;
-	i2c_write(CONFIG_SYS_I2C_DVI_ADDR, TPI_PWR_STAT_REG, 1, &temp, 1);
-
-	/* Enable source termination */
-	temp = TPI_SET_PAGE_SII9022A;
-	i2c_write(CONFIG_SYS_I2C_DVI_ADDR, TPI_SET_PAGE_REG, 1, &temp, 1);
-	temp = TPI_SET_OFFSET_SII9022A;
-	i2c_write(CONFIG_SYS_I2C_DVI_ADDR, TPI_SET_OFFSET_REG, 1, &temp, 1);
-
-	i2c_read(CONFIG_SYS_I2C_DVI_ADDR, TPI_RW_ACCESS_REG, 1, &temp, 1);
-	temp |= TPI_RW_EN_SRC_TERMIN;
-	i2c_write(CONFIG_SYS_I2C_DVI_ADDR, TPI_RW_ACCESS_REG, 1, &temp, 1);
-
-	/* Set TPI system control */
-	temp = TPI_SYS_TMDS_OUTPUT | TPI_SYS_AV_NORAML | TPI_SYS_DVI_MODE;
-	i2c_write(CONFIG_SYS_I2C_DVI_ADDR, TPI_SYS_CTRL_REG, 1, &temp, 1);
-
-	/* Set pixel clock */
-	temp1 = PICOS2KHZ(videomode->pixclock) / 10;
-	temp = (u8)(temp1 & 0xFF);
-	i2c_write(CONFIG_SYS_I2C_DVI_ADDR, PIXEL_CLK_LSB_REG, 1, &temp, 1);
-	temp = (u8)(temp1 >> 8);
-	i2c_write(CONFIG_SYS_I2C_DVI_ADDR, PIXEL_CLK_MSB_REG, 1, &temp, 1);
-
-	/* Set total pixels per line */
-	temp1 = videomode->hsync_len + videomode->left_margin +
-		videomode->xres + videomode->right_margin;
-	temp = (u8)(temp1 & 0xFF);
-	i2c_write(CONFIG_SYS_I2C_DVI_ADDR, TOTAL_PIXELS_LSB_REG, 1, &temp, 1);
-	temp = (u8)(temp1 >> 8);
-	i2c_write(CONFIG_SYS_I2C_DVI_ADDR, TOTAL_PIXELS_MSB_REG, 1, &temp, 1);
-
-	/* Set total lines */
-	temp2 = videomode->vsync_len + videomode->upper_margin +
-		videomode->yres + videomode->lower_margin;
-	temp = (u8)(temp2 & 0xFF);
-	i2c_write(CONFIG_SYS_I2C_DVI_ADDR, TOTAL_LINES_LSB_REG, 1, &temp, 1);
-	temp = (u8)(temp2 >> 8);
-	i2c_write(CONFIG_SYS_I2C_DVI_ADDR, TOTAL_LINES_MSB_REG, 1, &temp, 1);
-
-	/* Set vertical frequency in Hz */
-	temp3 = temp1 * temp2;
-	temp3 = (PICOS2KHZ(videomode->pixclock) * 1000) / temp3;
-	temp1 = (u16)temp3 * 100;
-	temp = (u8)(temp1 & 0xFF);
-	i2c_write(CONFIG_SYS_I2C_DVI_ADDR, VERT_FREQ_LSB_REG, 1, &temp, 1);
-	temp = (u8)(temp1 >> 8);
-	i2c_write(CONFIG_SYS_I2C_DVI_ADDR, VERT_FREQ_MSB_REG, 1, &temp, 1);
-
-	/* Set TPI input bus and pixel repetition data */
-	temp = TPI_INBUS_CLOCK_RATIO_1 | TPI_INBUS_FULL_PIXEL_WIDE |
-		TPI_INBUS_RISING_EDGE;
-	i2c_write(CONFIG_SYS_I2C_DVI_ADDR, TPI_INBUS_FMT_REG, 1, &temp, 1);
-
-	/* Set TPI AVI Input format data */
-	temp = TPI_INPUT_CLR_DEPTH_8BIT | TPI_INPUT_VRANGE_EXPAN_AUTO |
-		TPI_INPUT_CLR_RGB;
-	i2c_write(CONFIG_SYS_I2C_DVI_ADDR, TPI_INPUT_FMT_REG, 1, &temp, 1);
-
-	/* Set TPI AVI Output format data */
-	temp = TPI_OUTPUT_CLR_DEPTH_8BIT | TPI_OUTPUT_VRANGE_COMPRE_AUTO |
-		TPI_OUTPUT_CLR_HDMI_RGB;
-	i2c_write(CONFIG_SYS_I2C_DVI_ADDR, TPI_OUTPUT_FMT_REG, 1, &temp, 1);
-
-	/* Set TPI audio configuration write data */
-	temp = TPI_AUDIO_PASS_BASIC;
-	i2c_write(CONFIG_SYS_I2C_DVI_ADDR, TPI_AUDIO_HANDING_REG, 1, &temp, 1);
-
-	temp = TPI_AUDIO_INTF_I2S | TPI_AUDIO_INTF_NORMAL |
-		TPI_AUDIO_TYPE_PCM;
-	i2c_write(CONFIG_SYS_I2C_DVI_ADDR, TPI_AUDIO_INTF_REG, 1, &temp, 1);
-
-	temp = TPI_AUDIO_SAMP_SIZE_16BIT | TPI_AUDIO_SAMP_FREQ_44K;
-	i2c_write(CONFIG_SYS_I2C_DVI_ADDR, TPI_AUDIO_FREQ_REG, 1, &temp, 1);
-#endif
-
-	return 0;
-}
diff --git a/board/freescale/common/dcu_sii9022a.h b/board/freescale/common/dcu_sii9022a.h
deleted file mode 100644
index 7851775..0000000
--- a/board/freescale/common/dcu_sii9022a.h
+++ /dev/null
@@ -1,12 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0+ */
-/*
- * Copyright 2014 Freescale Semiconductor, Inc.
- */
-
-#ifndef __DCU_HDMI_SII9022A__
-#define __DCU_HDMI_SII9022A__
-
-/* Programming of Silicon SII9022A connector HDMI Transmitter*/
-int dcu_set_dvi_encoder(struct fb_videomode *videomode);
-
-#endif
diff --git a/board/freescale/common/diu_ch7301.c b/board/freescale/common/diu_ch7301.c
deleted file mode 100644
index 05e6a3a..0000000
--- a/board/freescale/common/diu_ch7301.c
+++ /dev/null
@@ -1,217 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0+
-/*
- * Copyright 2014 Freescale Semiconductor, Inc.
- * Copyright 2019 NXP
- * Authors: Priyanka Jain <Priyanka.Jain@freescale.com>
- *	    Wang Dongsheng <dongsheng.wang@freescale.com>
- *
- * This file is copied and modified from the original t1040qds/diu.c.
- * Encoder can be used in T104x and LSx Platform.
- */
-
-#include <common.h>
-#include <stdio_dev.h>
-#include <i2c.h>
-#include <linux/delay.h>
-
-#define I2C_DVI_INPUT_DATA_FORMAT_REG		0x1F
-#define I2C_DVI_PLL_CHARGE_CNTL_REG		0x33
-#define I2C_DVI_PLL_DIVIDER_REG			0x34
-#define I2C_DVI_PLL_SUPPLY_CNTL_REG		0x35
-#define I2C_DVI_PLL_FILTER_REG			0x36
-#define I2C_DVI_TEST_PATTERN_REG		0x48
-#define I2C_DVI_POWER_MGMT_REG			0x49
-#define I2C_DVI_LOCK_STATE_REG			0x4D
-#define I2C_DVI_SYNC_POLARITY_REG		0x56
-
-/*
- * Set VSYNC/HSYNC to active high. This is polarity of sync signals
- * from DIU->DVI. The DIU default is active igh, so DVI is set to
- * active high.
- */
-#define I2C_DVI_INPUT_DATA_FORMAT_VAL		0x98
-
-#define I2C_DVI_PLL_CHARGE_CNTL_HIGH_SPEED_VAL	0x06
-#define I2C_DVI_PLL_DIVIDER_HIGH_SPEED_VAL	0x26
-#define I2C_DVI_PLL_FILTER_HIGH_SPEED_VAL	0xA0
-#define I2C_DVI_PLL_CHARGE_CNTL_LOW_SPEED_VAL	0x08
-#define I2C_DVI_PLL_DIVIDER_LOW_SPEED_VAL	0x16
-#define I2C_DVI_PLL_FILTER_LOW_SPEED_VAL	0x60
-
-/* Clear test pattern */
-#define I2C_DVI_TEST_PATTERN_VAL		0x18
-/* Exit Power-down mode */
-#define I2C_DVI_POWER_MGMT_VAL			0xC0
-
-/* Monitor polarity is handled via DVI Sync Polarity Register */
-#define I2C_DVI_SYNC_POLARITY_VAL		0x00
-
-/* Programming of HDMI Chrontel CH7301 connector */
-int diu_set_dvi_encoder(unsigned int pixclock)
-{
-	int ret;
-	u8 temp;
-
-	temp = I2C_DVI_TEST_PATTERN_VAL;
-#if CONFIG_IS_ENABLED(DM_I2C)
-	struct udevice *dev;
-
-	ret = i2c_get_chip_for_busnum(CONFIG_SYS_I2C_DVI_BUS_NUM,
-				      CONFIG_SYS_I2C_DVI_ADDR,
-				      1, &dev);
-	if (ret) {
-		printf("%s: Cannot find udev for a bus %d\n", __func__,
-		       CONFIG_SYS_I2C_DVI_BUS_NUM);
-		return ret;
-	}
-	ret = dm_i2c_write(dev, I2C_DVI_TEST_PATTERN_REG, &temp, 1);
-	if (ret) {
-		puts("I2C: failed to select proper dvi test pattern\n");
-		return ret;
-	}
-	temp = I2C_DVI_INPUT_DATA_FORMAT_VAL;
-	ret = dm_i2c_write(dev, I2C_DVI_INPUT_DATA_FORMAT_REG, &temp, 1);
-	if (ret) {
-		puts("I2C: failed to select dvi input data format\n");
-		return ret;
-	}
-
-	/* Set Sync polarity register */
-	temp = I2C_DVI_SYNC_POLARITY_VAL;
-	ret = dm_i2c_write(dev, I2C_DVI_SYNC_POLARITY_REG, &temp, 1);
-	if (ret) {
-		puts("I2C: failed to select dvi syc polarity\n");
-		return ret;
-	}
-
-	/* Set PLL registers based on pixel clock rate*/
-	if (pixclock > 65000000) {
-		temp = I2C_DVI_PLL_CHARGE_CNTL_HIGH_SPEED_VAL;
-		ret = dm_i2c_write(dev, I2C_DVI_PLL_CHARGE_CNTL_REG, &temp, 1);
-		if (ret) {
-			puts("I2C: failed to select dvi pll charge_cntl\n");
-			return ret;
-		}
-		temp = I2C_DVI_PLL_DIVIDER_HIGH_SPEED_VAL;
-		ret = dm_i2c_write(dev, I2C_DVI_PLL_DIVIDER_REG, &temp, 1);
-		if (ret) {
-			puts("I2C: failed to select dvi pll divider\n");
-			return ret;
-		}
-		temp = I2C_DVI_PLL_FILTER_HIGH_SPEED_VAL;
-		ret = dm_i2c_write(dev, I2C_DVI_PLL_FILTER_REG, &temp, 1);
-		if (ret) {
-			puts("I2C: failed to select dvi pll filter\n");
-			return ret;
-		}
-	} else {
-		temp = I2C_DVI_PLL_CHARGE_CNTL_LOW_SPEED_VAL;
-		ret = dm_i2c_write(dev, I2C_DVI_PLL_CHARGE_CNTL_REG, &temp, 1);
-		if (ret) {
-			puts("I2C: failed to select dvi pll charge_cntl\n");
-			return ret;
-		}
-		temp = I2C_DVI_PLL_DIVIDER_LOW_SPEED_VAL;
-		ret = dm_i2c_write(dev, I2C_DVI_PLL_DIVIDER_REG, &temp, 1);
-		if (ret) {
-			puts("I2C: failed to select dvi pll divider\n");
-			return ret;
-		}
-		temp = I2C_DVI_PLL_FILTER_LOW_SPEED_VAL;
-		ret = dm_i2c_write(dev, I2C_DVI_PLL_FILTER_REG, &temp, 1);
-		if (ret) {
-			puts("I2C: failed to select dvi pll filter\n");
-			return ret;
-		}
-	}
-
-	temp = I2C_DVI_POWER_MGMT_VAL;
-	ret = dm_i2c_write(dev, I2C_DVI_POWER_MGMT_REG, &temp, 1);
-	if (ret) {
-		puts("I2C: failed to select dvi power mgmt\n");
-		return ret;
-	}
-#else
-	ret = i2c_write(CONFIG_SYS_I2C_DVI_ADDR, I2C_DVI_TEST_PATTERN_REG, 1,
-			&temp, 1);
-	if (ret) {
-		puts("I2C: failed to select proper dvi test pattern\n");
-		return ret;
-	}
-	temp = I2C_DVI_INPUT_DATA_FORMAT_VAL;
-	ret = i2c_write(CONFIG_SYS_I2C_DVI_ADDR, I2C_DVI_INPUT_DATA_FORMAT_REG,
-			1, &temp, 1);
-	if (ret) {
-		puts("I2C: failed to select dvi input data format\n");
-		return ret;
-	}
-
-	/* Set Sync polarity register */
-	temp = I2C_DVI_SYNC_POLARITY_VAL;
-	ret = i2c_write(CONFIG_SYS_I2C_DVI_ADDR, I2C_DVI_SYNC_POLARITY_REG, 1,
-			&temp, 1);
-	if (ret) {
-		puts("I2C: failed to select dvi syc polarity\n");
-		return ret;
-	}
-
-	/* Set PLL registers based on pixel clock rate*/
-	if (pixclock > 65000000) {
-		temp = I2C_DVI_PLL_CHARGE_CNTL_HIGH_SPEED_VAL;
-		ret = i2c_write(CONFIG_SYS_I2C_DVI_ADDR,
-				I2C_DVI_PLL_CHARGE_CNTL_REG, 1,	&temp, 1);
-		if (ret) {
-			puts("I2C: failed to select dvi pll charge_cntl\n");
-			return ret;
-		}
-		temp = I2C_DVI_PLL_DIVIDER_HIGH_SPEED_VAL;
-		ret = i2c_write(CONFIG_SYS_I2C_DVI_ADDR,
-				I2C_DVI_PLL_DIVIDER_REG, 1, &temp, 1);
-		if (ret) {
-			puts("I2C: failed to select dvi pll divider\n");
-			return ret;
-		}
-		temp = I2C_DVI_PLL_FILTER_HIGH_SPEED_VAL;
-		ret = i2c_write(CONFIG_SYS_I2C_DVI_ADDR,
-				I2C_DVI_PLL_FILTER_REG, 1, &temp, 1);
-		if (ret) {
-			puts("I2C: failed to select dvi pll filter\n");
-			return ret;
-		}
-	} else {
-		temp = I2C_DVI_PLL_CHARGE_CNTL_LOW_SPEED_VAL;
-		ret = i2c_write(CONFIG_SYS_I2C_DVI_ADDR,
-				I2C_DVI_PLL_CHARGE_CNTL_REG, 1, &temp, 1);
-		if (ret) {
-			puts("I2C: failed to select dvi pll charge_cntl\n");
-			return ret;
-		}
-		temp = I2C_DVI_PLL_DIVIDER_LOW_SPEED_VAL;
-		ret = i2c_write(CONFIG_SYS_I2C_DVI_ADDR,
-				I2C_DVI_PLL_DIVIDER_REG, 1, &temp, 1);
-		if (ret) {
-			puts("I2C: failed to select dvi pll divider\n");
-			return ret;
-		}
-		temp = I2C_DVI_PLL_FILTER_LOW_SPEED_VAL;
-		ret = i2c_write(CONFIG_SYS_I2C_DVI_ADDR,
-				I2C_DVI_PLL_FILTER_REG, 1, &temp, 1);
-		if (ret) {
-			puts("I2C: failed to select dvi pll filter\n");
-			return ret;
-		}
-	}
-
-	temp = I2C_DVI_POWER_MGMT_VAL;
-	ret = i2c_write(CONFIG_SYS_I2C_DVI_ADDR, I2C_DVI_POWER_MGMT_REG, 1,
-			&temp, 1);
-	if (ret) {
-		puts("I2C: failed to select dvi power mgmt\n");
-		return ret;
-	}
-#endif
-
-	udelay(500);
-
-	return 0;
-}
diff --git a/board/freescale/common/diu_ch7301.h b/board/freescale/common/diu_ch7301.h
deleted file mode 100644
index f35661c..0000000
--- a/board/freescale/common/diu_ch7301.h
+++ /dev/null
@@ -1,12 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0+ */
-/*
- * Copyright 2014 Freescale Semiconductor, Inc.
- */
-
-#ifndef __DIU_HDMI_CH7301__
-#define __DIU_HDMI_CH7301__
-
-/* Programming of HDMI Chrontel CH7301 connector */
-int diu_set_dvi_encoder(unsigned int pixclock);
-
-#endif
diff --git a/board/freescale/ls1021aiot/Makefile b/board/freescale/ls1021aiot/Makefile
index bec151f..587bbd7 100644
--- a/board/freescale/ls1021aiot/Makefile
+++ b/board/freescale/ls1021aiot/Makefile
@@ -3,5 +3,4 @@
 # Copyright 2016 Freescale Semiconductor, Inc.
 
 obj-y += ls1021aiot.o
-obj-$(CONFIG_VIDEO_FSL_DCU_FB) += dcu.o
 obj-$(CONFIG_ARMV7_PSCI) += psci.o
diff --git a/board/freescale/ls1021aiot/dcu.c b/board/freescale/ls1021aiot/dcu.c
deleted file mode 100644
index e4fbcbc..0000000
--- a/board/freescale/ls1021aiot/dcu.c
+++ /dev/null
@@ -1,48 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0+
-/*
- * Copyright 2016 Freescale Semiconductor, Inc.
- *
- * FSL DCU Framebuffer driver
- */
-
-#include <common.h>
-#include <fsl_dcu_fb.h>
-#include <asm/global_data.h>
-#include "div64.h"
-#include "../common/dcu_sii9022a.h"
-
-DECLARE_GLOBAL_DATA_PTR;
-
-unsigned int dcu_set_pixel_clock(unsigned int pixclock)
-{
-	unsigned long long div;
-
-	div = (unsigned long long)(gd->bus_clk / 1000);
-	div *= (unsigned long long)pixclock;
-	do_div(div, 1000000000);
-
-	return div;
-}
-
-int platform_dcu_init(struct fb_info *fbinfo,
-		      unsigned int xres, unsigned int yres,
-		      const char *port,
-		      struct fb_videomode *dcu_fb_videomode)
-{
-	const char *name;
-	unsigned int pixel_format;
-
-	if (strncmp(port, "twr_lcd", 4) == 0) {
-		name = "TWR_LCD_RGB card";
-	} else {
-		name = "HDMI";
-		dcu_set_dvi_encoder(dcu_fb_videomode);
-	}
-
-	printf("DCU: Switching to %s monitor @ %ux%u\n", name, xres, yres);
-
-	pixel_format = 32;
-	fsl_dcu_init(fbinfo, xres, yres, pixel_format);
-
-	return 0;
-}
diff --git a/board/freescale/ls1021aqds/Makefile b/board/freescale/ls1021aqds/Makefile
index 1e50e46..6503034 100644
--- a/board/freescale/ls1021aqds/Makefile
+++ b/board/freescale/ls1021aqds/Makefile
@@ -7,5 +7,4 @@
 obj-y += ls1021aqds.o
 obj-y += ddr.o
 obj-y += eth.o
-obj-$(CONFIG_VIDEO_FSL_DCU_FB) += dcu.o
 obj-$(CONFIG_ARMV7_PSCI) += psci.o
diff --git a/board/freescale/ls1021aqds/dcu.c b/board/freescale/ls1021aqds/dcu.c
deleted file mode 100644
index b5fee06..0000000
--- a/board/freescale/ls1021aqds/dcu.c
+++ /dev/null
@@ -1,110 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0+
-/*
- * Copyright 2014 Freescale Semiconductor, Inc.
- * Copyright 2019 NXP
- *
- * FSL DCU Framebuffer driver
- */
-
-#include <asm/global_data.h>
-#include <asm/io.h>
-#include <common.h>
-#include <fsl_dcu_fb.h>
-#include <i2c.h>
-#include "../common/i2c_mux.h"
-#include "div64.h"
-#include "../common/diu_ch7301.h"
-#include "ls1021aqds_qixis.h"
-
-DECLARE_GLOBAL_DATA_PTR;
-
-unsigned int dcu_set_pixel_clock(unsigned int pixclock)
-{
-	unsigned long long div;
-
-	div = (unsigned long long)(gd->bus_clk / 1000);
-	div *= (unsigned long long)pixclock;
-	do_div(div, 1000000000);
-
-	return div;
-}
-
-int platform_dcu_init(struct fb_info *fbinfo,
-		      unsigned int xres,
-		      unsigned int yres,
-		      const char *port,
-		      struct fb_videomode *dcu_fb_videomode)
-{
-	const char *name;
-	unsigned int pixel_format;
-	int ret;
-	u8 ch;
-
-	/* Mux I2C3+I2C4 as HSYNC+VSYNC */
-#if CONFIG_IS_ENABLED(DM_I2C)
-	struct udevice *dev;
-
-	/* QIXIS device mount on I2C1 bus*/
-	ret = i2c_get_chip_for_busnum(0, CONFIG_SYS_I2C_QIXIS_ADDR,
-				      1, &dev);
-	if (ret) {
-		printf("%s: Cannot find udev for a bus %d\n", __func__,
-		       0);
-		return ret;
-	}
-	ret = dm_i2c_read(dev, QIXIS_DCU_BRDCFG5, &ch, 1);
-	if (ret) {
-		printf("Error: failed to read I2C @%02x\n",
-		       CONFIG_SYS_I2C_QIXIS_ADDR);
-		return ret;
-	}
-	ch &= 0x1F;
-	ch |= 0xA0;
-	ret = dm_i2c_write(dev, QIXIS_DCU_BRDCFG5, &ch, 1);
-
-#else
-	ret = i2c_read(CONFIG_SYS_I2C_QIXIS_ADDR, QIXIS_DCU_BRDCFG5,
-		       1, &ch, 1);
-	if (ret) {
-		printf("Error: failed to read I2C @%02x\n",
-		       CONFIG_SYS_I2C_QIXIS_ADDR);
-		return ret;
-	}
-	ch &= 0x1F;
-	ch |= 0xA0;
-	ret = i2c_write(CONFIG_SYS_I2C_QIXIS_ADDR, QIXIS_DCU_BRDCFG5,
-			1, &ch, 1);
-#endif
-	if (ret) {
-		printf("Error: failed to write I2C @%02x\n",
-		       CONFIG_SYS_I2C_QIXIS_ADDR);
-		return ret;
-	}
-
-	if (strncmp(port, "hdmi", 4) == 0) {
-		unsigned long pixval;
-
-		name = "HDMI";
-
-		pixval = 1000000000 / dcu_fb_videomode->pixclock;
-		pixval *= 1000;
-
-#if !CONFIG_IS_ENABLED(DM_I2C)
-		i2c_set_bus_num(CONFIG_SYS_I2C_DVI_BUS_NUM);
-#endif
-		select_i2c_ch_pca9547(I2C_MUX_CH_CH7301,
-				      CONFIG_SYS_I2C_DVI_BUS_NUM);
-		diu_set_dvi_encoder(pixval);
-		select_i2c_ch_pca9547(I2C_MUX_CH_DEFAULT,
-				      CONFIG_SYS_I2C_DVI_BUS_NUM);
-	} else {
-		return 0;
-	}
-
-	printf("DCU: Switching to %s monitor @ %ux%u\n", name, xres, yres);
-
-	pixel_format = 32;
-	fsl_dcu_init(fbinfo, xres, yres, pixel_format);
-
-	return 0;
-}
diff --git a/board/freescale/ls1021atwr/Makefile b/board/freescale/ls1021atwr/Makefile
index d9a2f52..cfa6c0c 100644
--- a/board/freescale/ls1021atwr/Makefile
+++ b/board/freescale/ls1021atwr/Makefile
@@ -5,5 +5,4 @@
 #
 
 obj-y += ls1021atwr.o
-obj-$(CONFIG_VIDEO_FSL_DCU_FB) += dcu.o
 obj-$(CONFIG_ARMV7_PSCI) += psci.o
diff --git a/board/freescale/ls1021atwr/dcu.c b/board/freescale/ls1021atwr/dcu.c
deleted file mode 100644
index 7bf283e..0000000
--- a/board/freescale/ls1021atwr/dcu.c
+++ /dev/null
@@ -1,48 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0+
-/*
- * Copyright 2014 Freescale Semiconductor, Inc.
- *
- * FSL DCU Framebuffer driver
- */
-
-#include <common.h>
-#include <fsl_dcu_fb.h>
-#include <asm/global_data.h>
-#include "div64.h"
-#include "../common/dcu_sii9022a.h"
-
-DECLARE_GLOBAL_DATA_PTR;
-
-unsigned int dcu_set_pixel_clock(unsigned int pixclock)
-{
-	unsigned long long div;
-
-	div = (unsigned long long)(gd->bus_clk / 1000);
-	div *= (unsigned long long)pixclock;
-	do_div(div, 1000000000);
-
-	return div;
-}
-
-int platform_dcu_init(struct fb_info *fbinfo,
-		      unsigned int xres, unsigned int yres,
-		      const char *port,
-		      struct fb_videomode *dcu_fb_videomode)
-{
-	const char *name;
-	unsigned int pixel_format;
-
-	if (strncmp(port, "twr_lcd", 4) == 0) {
-		name = "TWR_LCD_RGB card";
-	} else {
-		name = "HDMI";
-		dcu_set_dvi_encoder(dcu_fb_videomode);
-	}
-
-	printf("DCU: Switching to %s monitor @ %ux%u\n", name, xres, yres);
-
-	pixel_format = 32;
-	fsl_dcu_init(fbinfo, xres, yres, pixel_format);
-
-	return 0;
-}
diff --git a/board/freescale/mx51evk/Makefile b/board/freescale/mx51evk/Makefile
index 1a9581c..808e350 100644
--- a/board/freescale/mx51evk/Makefile
+++ b/board/freescale/mx51evk/Makefile
@@ -5,4 +5,3 @@
 # (C) Copyright 2009 Freescale Semiconductor, Inc.
 
 obj-y			+= mx51evk.o
-obj-$(CONFIG_VIDEO)	+= mx51evk_video.o
diff --git a/board/freescale/mx53loco/Makefile b/board/freescale/mx53loco/Makefile
index d2ebd94..9befe42 100644
--- a/board/freescale/mx53loco/Makefile
+++ b/board/freescale/mx53loco/Makefile
@@ -4,4 +4,3 @@
 # Jason Liu <r64343@freescale.com>
 
 obj-y			+= mx53loco.o
-obj-$(CONFIG_VIDEO)	+= mx53loco_video.o
diff --git a/board/freescale/t104xrdb/Makefile b/board/freescale/t104xrdb/Makefile
index d67e941..a949501 100644
--- a/board/freescale/t104xrdb/Makefile
+++ b/board/freescale/t104xrdb/Makefile
@@ -8,7 +8,6 @@ else
 obj-y	+= t104xrdb.o
 obj-y	+= cpld.o
 obj-y	+= eth.o
-obj-$(CONFIG_FSL_DIU_FB)+= diu.o
 endif
 obj-y	+= ddr.o
 obj-y	+= law.o
diff --git a/board/freescale/t104xrdb/diu.c b/board/freescale/t104xrdb/diu.c
deleted file mode 100644
index 25c8597..0000000
--- a/board/freescale/t104xrdb/diu.c
+++ /dev/null
@@ -1,84 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0+
-/*
- * Copyright 2014 Freescale Semiconductor, Inc.
- * Author: Priyanka Jain <Priyanka.Jain@freescale.com>
- */
-
-#include <clock_legacy.h>
-#include <asm/io.h>
-#include <common.h>
-#include <command.h>
-#include <fsl_diu_fb.h>
-#include <linux/ctype.h>
-#include <video_fb.h>
-
-#include "../common/diu_ch7301.h"
-
-#include "cpld.h"
-#include "t104xrdb.h"
-
-/*
- * DIU Area Descriptor
- *
- * Note that we need to byte-swap the value before it's written to the AD
- * register. So even though the registers don't look like they're in the same
- * bit positions as they are on the MPC8610, the same value is written to the
- * AD register on the MPC8610 and on the P1022.
- */
-#define AD_BYTE_F		0x10000000
-#define AD_ALPHA_C_SHIFT	25
-#define AD_BLUE_C_SHIFT		23
-#define AD_GREEN_C_SHIFT	21
-#define AD_RED_C_SHIFT		19
-#define AD_PIXEL_S_SHIFT	16
-#define AD_COMP_3_SHIFT		12
-#define AD_COMP_2_SHIFT		8
-#define AD_COMP_1_SHIFT		4
-#define AD_COMP_0_SHIFT		0
-
-void diu_set_pixel_clock(unsigned int pixclock)
-{
-	unsigned long speed_ccb, temp;
-	u32 pixval;
-	int ret;
-
-	speed_ccb = get_bus_freq(0);
-	temp = 1000000000 / pixclock;
-	temp *= 1000;
-	pixval = speed_ccb / temp;
-
-	/* Program HDMI encoder */
-	ret = diu_set_dvi_encoder(temp);
-	if (ret) {
-		puts("Failed to set DVI encoder\n");
-		return;
-	}
-
-	/* Program pixel clock */
-	out_be32((unsigned *)CONFIG_SYS_FSL_SCFG_PIXCLK_ADDR,
-		 ((pixval << PXCK_BITS_START) & PXCK_MASK));
-
-	/* enable clock*/
-	out_be32((unsigned *)CONFIG_SYS_FSL_SCFG_PIXCLK_ADDR, PXCKEN_MASK |
-		 ((pixval << PXCK_BITS_START) & PXCK_MASK));
-}
-
-int platform_diu_init(unsigned int xres, unsigned int yres, const char *port)
-{
-	u32 pixel_format;
-	u8 sw;
-
-	/*Configure Display ouput port as HDMI*/
-	sw = CPLD_READ(sfp_ctl_status);
-	CPLD_WRITE(sfp_ctl_status , sw & ~(CPLD_DIU_SEL_DFP));
-
-	pixel_format = cpu_to_le32(AD_BYTE_F | (3 << AD_ALPHA_C_SHIFT) |
-		(0 << AD_BLUE_C_SHIFT) | (1 << AD_GREEN_C_SHIFT) |
-		(2 << AD_RED_C_SHIFT) | (8 << AD_COMP_3_SHIFT) |
-		(8 << AD_COMP_2_SHIFT) | (8 << AD_COMP_1_SHIFT) |
-		(8 << AD_COMP_0_SHIFT) | (3 << AD_PIXEL_S_SHIFT));
-
-	printf("DIU: Switching to monitor DVI @ %ux%u\n",  xres, yres);
-
-	return fsl_diu_init(xres, yres, pixel_format, 0);
-}
diff --git a/board/kosagi/novena/novena_spl.c b/board/kosagi/novena/novena_spl.c
index 3d22f20..24c0fb2 100644
--- a/board/kosagi/novena/novena_spl.c
+++ b/board/kosagi/novena/novena_spl.c
@@ -379,30 +379,7 @@ static void novena_spl_setup_iomux_uart(void)
 	imx_iomux_v3_setup_multiple_pads(uart4_pads, ARRAY_SIZE(uart4_pads));
 }
 
-/*
- * Video
- */
-#ifdef CONFIG_VIDEO
-static iomux_v3_cfg_t hdmi_pads[] = {
-	/* "Ghost HPD" pin */
-	MX6_PAD_EIM_A24__GPIO5_IO04 | MUX_PAD_CTRL(NO_PAD_CTRL),
-
-	/* LCD_PWR_CTL */
-	MX6_PAD_CSI0_DAT10__GPIO5_IO28 | MUX_PAD_CTRL(NO_PAD_CTRL),
-	/* LCD_BL_ON */
-	MX6_PAD_KEY_ROW4__GPIO4_IO15 | MUX_PAD_CTRL(NO_PAD_CTRL),
-	/* GPIO_PWM1 */
-	MX6_PAD_DISP0_DAT8__GPIO4_IO29 | MUX_PAD_CTRL(NO_PAD_CTRL),
-};
-
-static void novena_spl_setup_iomux_video(void)
-{
-	imx_iomux_v3_setup_multiple_pads(hdmi_pads, ARRAY_SIZE(hdmi_pads));
-	gpio_direction_input(NOVENA_HDMI_GHOST_HPD);
-}
-#else
 static inline void novena_spl_setup_iomux_video(void) {}
-#endif
 
 /*
  * SPL boots from uSDHC card
diff --git a/board/siemens/common/board.c b/board/siemens/common/board.c
index 5628366..85025f2 100644
--- a/board/siemens/common/board.c
+++ b/board/siemens/common/board.c
@@ -96,9 +96,6 @@ int board_init(void)
 #ifdef CONFIG_NAND_CS_INIT
 	board_nand_cs_init();
 #endif
-#ifdef CONFIG_VIDEO
-	board_video_init();
-#endif
 
 	return 0;
 }
diff --git a/board/siemens/common/factoryset.c b/board/siemens/common/factoryset.c
index fba678b..4e36a6f 100644
--- a/board/siemens/common/factoryset.c
+++ b/board/siemens/common/factoryset.c
@@ -276,13 +276,6 @@ int factoryset_read_eeprom(int i2c_addr)
 	printf("DFU USB: VID = 0x%4x, PID = 0x%4x\n", factory_dat.usb_vendor_id,
 	       factory_dat.usb_product_id);
 #endif
-#if defined(CONFIG_VIDEO)
-	if (0 <= get_factory_record_val(cp, size, (uchar *)"DISP1",
-					(uchar *)"name", factory_dat.disp_name,
-					MAX_STRING_LENGTH)) {
-		debug("display name: %s\n", factory_dat.disp_name);
-	}
-#endif
 	if (0 <= get_factory_record_val(cp, size, (uchar *)"DEV",
 					(uchar *)"num", factory_dat.serial,
 					MAX_STRING_LENGTH)) {
diff --git a/board/siemens/common/factoryset.h b/board/siemens/common/factoryset.h
index 261a217..8fa6c3b 100644
--- a/board/siemens/common/factoryset.h
+++ b/board/siemens/common/factoryset.h
@@ -17,9 +17,6 @@ struct factorysetcontainer {
 	int usb_vendor_id;
 	int usb_product_id;
 	int pxm50;
-#if defined(CONFIG_VIDEO)
-	unsigned char disp_name[MAX_STRING_LENGTH];
-#endif
 	unsigned char serial[MAX_STRING_LENGTH];
 	int version;
 	uchar asn[MAX_STRING_LENGTH];
diff --git a/board/siemens/pxm2/board.c b/board/siemens/pxm2/board.c
index de52838..47f19bc 100644
--- a/board/siemens/pxm2/board.c
+++ b/board/siemens/pxm2/board.c
@@ -28,7 +28,6 @@
 #include <asm/arch/gpio.h>
 #include <asm/arch/mmc_host_def.h>
 #include <asm/arch/sys_proto.h>
-#include "../../../drivers/video/da8xx-fb.h"
 #include <asm/io.h>
 #include <asm/emif.h>
 #include <asm/gpio.h>
@@ -243,194 +242,6 @@ int board_eth_init(struct bd_info *bis)
 }
 #endif /* #if defined(CONFIG_DRIVER_TI_CPSW) */
 
-#if defined(CONFIG_VIDEO) && !defined(CONFIG_SPL_BUILD)
-static struct da8xx_panel lcd_panels[] = {
-	/* AUO G156XW01 V1 */
-	[0] = {
-		.name = "AUO_G156XW01_V1",
-		.width = 1376,
-		.height = 768,
-		.hfp = 14,
-		.hbp = 64,
-		.hsw = 56,
-		.vfp = 1,
-		.vbp = 28,
-		.vsw = 3,
-		.pxl_clk = 60000000,
-		.invert_pxl_clk = 0,
-	},
-	/* AUO B101EVN06 V0 */
-	[1] = {
-		.name = "AUO_B101EVN06_V0",
-		.width = 1280,
-		.height = 800,
-		.hfp = 52,
-		.hbp = 84,
-		.hsw = 36,
-		.vfp = 3,
-		.vbp = 14,
-		.vsw = 6,
-		.pxl_clk = 60000000,
-		.invert_pxl_clk = 0,
-	},
-	/*
-	 * Settings from factoryset
-	 * stored in EEPROM
-	 */
-	[2] = {
-		.name = "factoryset",
-		.width = 0,
-		.height = 0,
-		.hfp = 0,
-		.hbp = 0,
-		.hsw = 0,
-		.vfp = 0,
-		.vbp = 0,
-		.vsw = 0,
-		.pxl_clk = 60000000,
-		.invert_pxl_clk = 0,
-	},
-};
-
-static const struct display_panel disp_panel = {
-	WVGA,
-	32,
-	16,
-	COLOR_ACTIVE,
-};
-
-static const struct lcd_ctrl_config lcd_cfg = {
-	&disp_panel,
-	.ac_bias		= 255,
-	.ac_bias_intrpt		= 0,
-	.dma_burst_sz		= 16,
-	.bpp			= 32,
-	.fdd			= 0x80,
-	.tft_alt_mode		= 0,
-	.stn_565_mode		= 0,
-	.mono_8bit_mode		= 0,
-	.invert_line_clock	= 1,
-	.invert_frm_clock	= 1,
-	.sync_edge		= 0,
-	.sync_ctrl		= 1,
-	.raster_order		= 0,
-};
-
-static int set_gpio(int gpio, int state)
-{
-	gpio_request(gpio, "temp");
-	gpio_direction_output(gpio, state);
-	gpio_set_value(gpio, state);
-	gpio_free(gpio);
-	return 0;
-}
-
-static int enable_backlight(void)
-{
-	set_gpio(BOARD_LCD_POWER, 1);
-	set_gpio(BOARD_BACK_LIGHT, 1);
-	set_gpio(BOARD_TOUCH_POWER, 1);
-	return 0;
-}
-
-static int enable_pwm(void)
-{
-	struct pwmss_regs *pwmss = (struct pwmss_regs *)PWMSS0_BASE;
-	struct pwmss_ecap_regs *ecap;
-	int ticks = PWM_TICKS;
-	int duty = PWM_DUTY;
-
-	ecap = (struct pwmss_ecap_regs *)AM33XX_ECAP0_BASE;
-	/* enable clock */
-	setbits_le32(&pwmss->clkconfig, ECAP_CLK_EN);
-	/* TimeStam Counter register */
-	writel(0xdb9, &ecap->tsctr);
-	/* config period */
-	writel(ticks - 1, &ecap->cap3);
-	writel(ticks - 1, &ecap->cap1);
-	setbits_le16(&ecap->ecctl2,
-		     (ECTRL2_MDSL_ECAP | ECTRL2_SYNCOSEL_MASK | 0xd0));
-	/* config duty */
-	writel(duty, &ecap->cap2);
-	writel(duty, &ecap->cap4);
-	/* start */
-	setbits_le16(&ecap->ecctl2, ECTRL2_CTRSTP_FREERUN);
-	return 0;
-}
-
-static struct dpll_regs dpll_lcd_regs = {
-	.cm_clkmode_dpll = CM_WKUP + 0x98,
-	.cm_idlest_dpll = CM_WKUP + 0x48,
-	.cm_clksel_dpll = CM_WKUP + 0x54,
-};
-
-/* no console on this board */
-int board_cfb_skip(void)
-{
-	return 1;
-}
-
-#define PLL_GET_M(v) ((v >> 8) & 0x7ff)
-#define PLL_GET_N(v) (v & 0x7f)
-
-static int get_clk(struct dpll_regs *dpll_regs)
-{
-	unsigned int val;
-	unsigned int m, n;
-	int f = 0;
-
-	val = readl(dpll_regs->cm_clksel_dpll);
-	m = PLL_GET_M(val);
-	n = PLL_GET_N(val);
-	f = (m * V_OSCK) / n;
-
-	return f;
-};
-
-int clk_get(int clk)
-{
-	return get_clk(&dpll_lcd_regs);
-};
-
-static int conf_disp_pll(int m, int n)
-{
-	struct cm_perpll *cmper = (struct cm_perpll *)CM_PER;
-	struct cm_dpll *cmdpll = (struct cm_dpll *)CM_DPLL;
-	struct dpll_params dpll_lcd = {m, n, -1, -1, -1, -1, -1};
-
-	u32 *const clk_domains[] = {
-		&cmper->lcdclkctrl,
-		0
-	};
-	u32 *const clk_modules_explicit_en[] = {
-		&cmper->lcdclkctrl,
-		&cmper->lcdcclkstctrl,
-		&cmper->epwmss0clkctrl,
-		0
-	};
-	do_enable_clocks(clk_domains, clk_modules_explicit_en, 1);
-	writel(0x0, &cmdpll->clklcdcpixelclk);
-
-	do_setup_dpll(&dpll_lcd_regs, &dpll_lcd);
-
-	return 0;
-}
-
-static int board_video_init(void)
-{
-	conf_disp_pll(24, 1);
-	if (factory_dat.pxm50)
-		da8xx_video_init(&lcd_panels[0], &lcd_cfg, lcd_cfg.bpp);
-	else
-		da8xx_video_init(&lcd_panels[1], &lcd_cfg, lcd_cfg.bpp);
-
-	enable_pwm();
-	enable_backlight();
-
-	return 0;
-}
-#endif
-
 #ifdef CONFIG_BOARD_LATE_INIT
 int board_late_init(void)
 {
diff --git a/board/siemens/rut/board.c b/board/siemens/rut/board.c
index e0f232d..a8b196a 100644
--- a/board/siemens/rut/board.c
+++ b/board/siemens/rut/board.c
@@ -37,7 +37,6 @@
 #include <linux/delay.h>
 #include "board.h"
 #include "../common/factoryset.h"
-#include "../../../drivers/video/da8xx-fb.h"
 
 /*
  * Read header information from EEPROM into global structure.
@@ -224,252 +223,6 @@ void hw_watchdog_init(void)
 }
 #endif /* defined(CONFIG_HW_WATCHDOG) */
 
-#if defined(CONFIG_VIDEO) && !defined(CONFIG_SPL_BUILD)
-static struct da8xx_panel lcd_panels[] = {
-	/* FORMIKE, 4.3", 480x800, KWH043MC17-F01 */
-	[0] = {
-		.name   = "KWH043MC17-F01",
-		.width  = 480,
-		.height = 800,
-		.hfp = 50,              /* no spec, "don't care" values */
-		.hbp = 50,
-		.hsw = 50,
-		.vfp = 50,
-		.vbp = 50,
-		.vsw = 50,
-		.pxl_clk = 35910000,    /* tCYCD=20ns, max 50MHz, 60fps */
-		.invert_pxl_clk = 1,
-	},
-	/* FORMIKE, 4.3", 480x800, KWH043ST20-F01 */
-	[1] = {
-		.name   = "KWH043ST20-F01",
-		.width  = 480,
-		.height = 800,
-		.hfp = 50,              /* no spec, "don't care" values */
-		.hbp = 50,
-		.hsw = 50,
-		.vfp = 50,
-		.vbp = 50,
-		.vsw = 50,
-		.pxl_clk = 35910000,    /* tCYCD=20ns, max 50MHz, 60fps */
-		.invert_pxl_clk = 1,
-	},
-	/* Multi-Inno, 4.3", 480x800, MI0430VT-1 */
-	[2] = {
-		.name   = "MI0430VT-1",
-		.width  = 480,
-		.height = 800,
-		.hfp = 50,              /* no spec, "don't care" values */
-		.hbp = 50,
-		.hsw = 50,
-		.vfp = 50,
-		.vbp = 50,
-		.vsw = 50,
-		.pxl_clk = 35910000,    /* tCYCD=20ns, max 50MHz, 60fps */
-		.invert_pxl_clk = 1,
-	},
-};
-
-static const struct display_panel disp_panels[] = {
-	[0] = {
-		WVGA,
-		16,	/* RGB 888 */
-		16,
-		COLOR_ACTIVE,
-	},
-	[1] = {
-		WVGA,
-		16,	/* RGB 888 */
-		16,
-		COLOR_ACTIVE,
-	},
-	[2] = {
-		WVGA,
-		24,	/* RGB 888 */
-		16,
-		COLOR_ACTIVE,
-	},
-};
-
-static const struct lcd_ctrl_config lcd_cfgs[] = {
-	[0] = {
-		&disp_panels[0],
-		.ac_bias		= 255,
-		.ac_bias_intrpt		= 0,
-		.dma_burst_sz		= 16,
-		.bpp			= 16,
-		.fdd			= 0x80,
-		.tft_alt_mode		= 0,
-		.stn_565_mode		= 0,
-		.mono_8bit_mode		= 0,
-		.invert_line_clock	= 1,
-		.invert_frm_clock	= 1,
-		.sync_edge		= 0,
-		.sync_ctrl		= 1,
-		.raster_order		= 0,
-	},
-	[1] = {
-		&disp_panels[1],
-		.ac_bias		= 255,
-		.ac_bias_intrpt		= 0,
-		.dma_burst_sz		= 16,
-		.bpp			= 16,
-		.fdd			= 0x80,
-		.tft_alt_mode		= 0,
-		.stn_565_mode		= 0,
-		.mono_8bit_mode		= 0,
-		.invert_line_clock	= 1,
-		.invert_frm_clock	= 1,
-		.sync_edge		= 0,
-		.sync_ctrl		= 1,
-		.raster_order		= 0,
-	},
-	[2] = {
-		&disp_panels[2],
-		.ac_bias		= 255,
-		.ac_bias_intrpt		= 0,
-		.dma_burst_sz		= 16,
-		.bpp			= 24,
-		.fdd			= 0x80,
-		.tft_alt_mode		= 0,
-		.stn_565_mode		= 0,
-		.mono_8bit_mode		= 0,
-		.invert_line_clock	= 1,
-		.invert_frm_clock	= 1,
-		.sync_edge		= 0,
-		.sync_ctrl		= 1,
-		.raster_order		= 0,
-	},
-
-};
-
-/* no console on this board */
-int board_cfb_skip(void)
-{
-	return 1;
-}
-
-#define PLL_GET_M(v) ((v >> 8) & 0x7ff)
-#define PLL_GET_N(v) (v & 0x7f)
-
-static struct dpll_regs dpll_lcd_regs = {
-	.cm_clkmode_dpll = CM_WKUP + 0x98,
-	.cm_idlest_dpll = CM_WKUP + 0x48,
-	.cm_clksel_dpll = CM_WKUP + 0x54,
-};
-
-static int get_clk(struct dpll_regs *dpll_regs)
-{
-	unsigned int val;
-	unsigned int m, n;
-	int f = 0;
-
-	val = readl(dpll_regs->cm_clksel_dpll);
-	m = PLL_GET_M(val);
-	n = PLL_GET_N(val);
-	f = (m * V_OSCK) / n;
-
-	return f;
-};
-
-int clk_get(int clk)
-{
-	return get_clk(&dpll_lcd_regs);
-};
-
-static int conf_disp_pll(int m, int n)
-{
-	struct cm_perpll *cmper = (struct cm_perpll *)CM_PER;
-	struct dpll_params dpll_lcd = {m, n, -1, -1, -1, -1, -1};
-#if defined(DISPL_PLL_SPREAD_SPECTRUM)
-	struct cm_wkuppll *cmwkup = (struct cm_wkuppll *)CM_WKUP;
-#endif
-
-	u32 *const clk_domains[] = {
-		&cmper->lcdclkctrl,
-		0
-	};
-	u32 *const clk_modules_explicit_en[] = {
-		&cmper->lcdclkctrl,
-		&cmper->lcdcclkstctrl,
-		&cmper->spi1clkctrl,
-		0
-	};
-	do_enable_clocks(clk_domains, clk_modules_explicit_en, 1);
-
-	do_setup_dpll(&dpll_lcd_regs, &dpll_lcd);
-
-#if defined(DISPL_PLL_SPREAD_SPECTRUM)
-	writel(0x64, &cmwkup->resv6[3]); /* 0x50 */
-	writel(0x800, &cmwkup->resv6[2]); /* 0x4c */
-	writel(readl(&cmwkup->clkmoddplldisp) | CM_CLKMODE_DPLL_SSC_EN_MASK,
-	       &cmwkup->clkmoddplldisp); /* 0x98 */
-#endif
-	return 0;
-}
-
-static int set_gpio(int gpio, int state)
-{
-	gpio_request(gpio, "temp");
-	gpio_direction_output(gpio, state);
-	gpio_set_value(gpio, state);
-	gpio_free(gpio);
-	return 0;
-}
-
-static int enable_lcd(void)
-{
-	unsigned char buf[1];
-
-	set_gpio(BOARD_LCD_RESET, 0);
-	mdelay(1);
-	set_gpio(BOARD_LCD_RESET, 1);
-	mdelay(1);
-
-	/* spi lcd init */
-	kwh043st20_f01_spi_startup(1, 0, 5000000, SPI_MODE_0);
-
-	/* backlight on */
-	buf[0] = 0xf;
-	i2c_write(0x24, 0x7, 1, buf, 1);
-	buf[0] = 0x3f;
-	i2c_write(0x24, 0x8, 1, buf, 1);
-	return 0;
-}
-
-int arch_early_init_r(void)
-{
-	enable_lcd();
-	return 0;
-}
-
-static int board_video_init(void)
-{
-	int i;
-	int anzdisp = ARRAY_SIZE(lcd_panels);
-	int display = 1;
-
-	for (i = 0; i < anzdisp; i++) {
-		if (strncmp((const char *)factory_dat.disp_name,
-			    lcd_panels[i].name,
-		    strlen((const char *)factory_dat.disp_name)) == 0) {
-			printf("DISPLAY: %s\n", factory_dat.disp_name);
-			break;
-		}
-	}
-	if (i == anzdisp) {
-		i = 1;
-		printf("%s: %s not found, using default %s\n", __func__,
-		       factory_dat.disp_name, lcd_panels[i].name);
-	}
-	conf_disp_pll(24, 1);
-	da8xx_video_init(&lcd_panels[display], &lcd_cfgs[display],
-			 lcd_cfgs[display].bpp);
-
-	return 0;
-}
-#endif /* ifdef CONFIG_VIDEO */
-
 #ifdef CONFIG_BOARD_LATE_INIT
 int board_late_init(void)
 {
diff --git a/board/socrates/socrates.c b/board/socrates/socrates.c
index f6a3cc1..3430a1e 100644
--- a/board/socrates/socrates.c
+++ b/board/socrates/socrates.c
@@ -26,7 +26,6 @@
 #include <fdt_support.h>
 #include <asm/io.h>
 #include <i2c.h>
-#include <video_fb.h>
 #include "upm_table.h"
 
 DECLARE_GLOBAL_DATA_PTR;
diff --git a/board/toradex/colibri_vf/Makefile b/board/toradex/colibri_vf/Makefile
index 6272a77..9be2cbc 100644
--- a/board/toradex/colibri_vf/Makefile
+++ b/board/toradex/colibri_vf/Makefile
@@ -3,4 +3,3 @@
 # Copyright 2013 Freescale Semiconductor, Inc.
 
 obj-y	:= colibri_vf.o
-obj-$(CONFIG_VIDEO_FSL_DCU_FB) += dcu.o
diff --git a/board/toradex/colibri_vf/colibri_vf.c b/board/toradex/colibri_vf/colibri_vf.c
index c09591e..dcef2db 100644
--- a/board/toradex/colibri_vf/colibri_vf.c
+++ b/board/toradex/colibri_vf/colibri_vf.c
@@ -19,7 +19,6 @@
 #include <asm/io.h>
 #include <env.h>
 #include <fdt_support.h>
-#include <fsl_dcu_fb.h>
 #include <g_dnl.h>
 #include <jffs2/load_kernel.h>
 #include <mtd_node.h>
@@ -205,49 +204,6 @@ static void setup_iomux_gpio(void)
 }
 #endif
 
-#ifdef CONFIG_VIDEO_FSL_DCU_FB
-static void setup_iomux_fsl_dcu(void)
-{
-	static const iomux_v3_cfg_t dcu0_pads[] = {
-		VF610_PAD_PTE0__DCU0_HSYNC,
-		VF610_PAD_PTE1__DCU0_VSYNC,
-		VF610_PAD_PTE2__DCU0_PCLK,
-		VF610_PAD_PTE4__DCU0_DE,
-		VF610_PAD_PTE5__DCU0_R0,
-		VF610_PAD_PTE6__DCU0_R1,
-		VF610_PAD_PTE7__DCU0_R2,
-		VF610_PAD_PTE8__DCU0_R3,
-		VF610_PAD_PTE9__DCU0_R4,
-		VF610_PAD_PTE10__DCU0_R5,
-		VF610_PAD_PTE11__DCU0_R6,
-		VF610_PAD_PTE12__DCU0_R7,
-		VF610_PAD_PTE13__DCU0_G0,
-		VF610_PAD_PTE14__DCU0_G1,
-		VF610_PAD_PTE15__DCU0_G2,
-		VF610_PAD_PTE16__DCU0_G3,
-		VF610_PAD_PTE17__DCU0_G4,
-		VF610_PAD_PTE18__DCU0_G5,
-		VF610_PAD_PTE19__DCU0_G6,
-		VF610_PAD_PTE20__DCU0_G7,
-		VF610_PAD_PTE21__DCU0_B0,
-		VF610_PAD_PTE22__DCU0_B1,
-		VF610_PAD_PTE23__DCU0_B2,
-		VF610_PAD_PTE24__DCU0_B3,
-		VF610_PAD_PTE25__DCU0_B4,
-		VF610_PAD_PTE26__DCU0_B5,
-		VF610_PAD_PTE27__DCU0_B6,
-		VF610_PAD_PTE28__DCU0_B7,
-	};
-
-	imx_iomux_v3_setup_multiple_pads(dcu0_pads, ARRAY_SIZE(dcu0_pads));
-}
-
-static void setup_tcon(void)
-{
-	setbits_le32(TCON0_BASE_ADDR, (1 << 29));
-}
-#endif
-
 static inline int is_colibri_vf61(void)
 {
 	struct mscm *mscm = (struct mscm *)MSCM_BASE_ADDR;
@@ -353,11 +309,6 @@ static void clock_init(void)
 			CCM_CSCDR3_NFC_PRE_DIV(3));
 	clrsetbits_le32(&ccm->cscmr2, CCM_REG_CTRL_MASK,
 			CCM_CSCMR2_RMII_CLK_SEL(2));
-
-#ifdef CONFIG_VIDEO_FSL_DCU_FB
-		setbits_le32(&ccm->ccgr1, CCM_CCGR1_TCON0_CTRL_MASK);
-		setbits_le32(&ccm->ccgr3, CCM_CCGR3_DCU0_CTRL_MASK);
-#endif
 }
 
 static void mscm_init(void)
@@ -378,11 +329,6 @@ int board_early_init_f(void)
 	setup_iomux_gpio();
 #endif
 
-#ifdef CONFIG_VIDEO_FSL_DCU_FB
-	setup_tcon();
-	setup_iomux_fsl_dcu();
-#endif
-
 	return 0;
 }
 
@@ -433,9 +379,6 @@ int checkboard(void)
 #if defined(CONFIG_OF_LIBFDT) && defined(CONFIG_OF_BOARD_SETUP)
 int ft_board_setup(void *blob, struct bd_info *bd)
 {
-#if defined(CONFIG_VIDEO_FSL_DCU_FB) && !defined(CONFIG_DM_VIDEO)
-	int ret = 0;
-#endif
 #ifdef CONFIG_FDT_FIXUP_PARTITIONS
 	static const struct node_info nodes[] = {
 		{ "fsl,vf610-nfc", MTD_DEV_TYPE_NAND, }, /* NAND flash */
@@ -445,11 +388,6 @@ int ft_board_setup(void *blob, struct bd_info *bd)
 	puts("   Updating MTD partitions...\n");
 	fdt_fixup_mtdparts(blob, nodes, ARRAY_SIZE(nodes));
 #endif
-#if defined(CONFIG_VIDEO_FSL_DCU_FB) && !defined(CONFIG_DM_VIDEO)
-	ret = fsl_dcu_fixedfb_setup(blob);
-	if (ret)
-		return ret;
-#endif
 
 	return ft_common_board_setup(blob, bd);
 }
diff --git a/board/toradex/colibri_vf/dcu.c b/board/toradex/colibri_vf/dcu.c
deleted file mode 100644
index c688ed7..0000000
--- a/board/toradex/colibri_vf/dcu.c
+++ /dev/null
@@ -1,38 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0+
-/*
- * Copyright 2017 Toradex AG
- *
- * FSL DCU platform driver
- */
-
-#include <asm/arch/crm_regs.h>
-#include <asm/io.h>
-#include <common.h>
-#include <fsl_dcu_fb.h>
-#include "div64.h"
-
-unsigned int dcu_set_pixel_clock(unsigned int pixclock)
-{
-	struct ccm_reg *ccm = (struct ccm_reg *)CCM_BASE_ADDR;
-	unsigned long long div;
-
-	clrbits_le32(&ccm->cscmr1, CCM_CSCMR1_DCU0_CLK_SEL);
-	clrsetbits_le32(&ccm->cscdr3,
-			CCM_CSCDR3_DCU0_DIV_MASK | CCM_CSCDR3_DCU0_EN,
-			CCM_CSCDR3_DCU0_DIV(0) | CCM_CSCDR3_DCU0_EN);
-	div = (unsigned long long)(PLL1_PFD2_FREQ / 1000);
-	do_div(div, pixclock);
-
-	return div;
-}
-
-int platform_dcu_init(struct fb_info *fbinfo,
-		      unsigned int xres,
-		      unsigned int yres,
-		      const char *port,
-		      struct fb_videomode *dcu_fb_videomode)
-{
-	fsl_dcu_init(fbinfo, xres, yres, 32);
-
-	return 0;
-}
diff --git a/cmd/Kconfig b/cmd/Kconfig
index 25c9fde..1d84012 100644
--- a/cmd/Kconfig
+++ b/cmd/Kconfig
@@ -1786,7 +1786,7 @@ config CMD_CONITRACE
 
 config CMD_CLS
 	bool "Enable clear screen command 'cls'"
-	depends on CFB_CONSOLE || DM_VIDEO || LCD || VIDEO
+	depends on DM_VIDEO || LCD || VIDEO
 	default y if LCD
 	help
 	  Enable the 'cls' command which clears the screen contents
diff --git a/cmd/bdinfo.c b/cmd/bdinfo.c
index c56b3f4..37cd8a5 100644
--- a/cmd/bdinfo.c
+++ b/cmd/bdinfo.c
@@ -117,7 +117,7 @@ int do_bdinfo(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[])
 	bdinfo_print_num_l("fdt_size", (ulong)gd->fdt_size);
 	if (IS_ENABLED(CONFIG_DM_VIDEO))
 		show_video_info();
-#if defined(CONFIG_LCD) || defined(CONFIG_VIDEO)
+#if defined(CONFIG_LCD)
 	bdinfo_print_num_l("FB base  ", gd->fb_base);
 #endif
 #if CONFIG_IS_ENABLED(MULTI_DTB_FIT)
diff --git a/cmd/bmp.c b/cmd/bmp.c
index 071ba90..45f4c12 100644
--- a/cmd/bmp.c
+++ b/cmd/bmp.c
@@ -268,10 +268,8 @@ int bmp_display(ulong addr, int x, int y)
 	}
 #elif defined(CONFIG_LCD)
 	ret = lcd_display_bitmap(addr, x, y);
-#elif defined(CONFIG_VIDEO)
-	ret = video_display_bitmap(addr, x, y);
 #else
-# error bmp_display() requires CONFIG_LCD or CONFIG_VIDEO
+# error bmp_display() requires CONFIG_LCD
 #endif
 
 	if (bmp_alloc_addr)
diff --git a/cmd/cls.c b/cmd/cls.c
index bdeb497..502d5ed 100644
--- a/cmd/cls.c
+++ b/cmd/cls.c
@@ -28,8 +28,6 @@ static int do_video_clear(struct cmd_tbl *cmdtp, int flag, int argc,
 	if (video_clear(dev))
 		return CMD_RET_FAILURE;
 #endif
-#elif defined(CONFIG_CFB_CONSOLE)
-	video_clear();
 #elif defined(CONFIG_LCD)
 	lcd_clear();
 #else
diff --git a/common/fdt_support.c b/common/fdt_support.c
index ea18ea3..8662bd2 100644
--- a/common/fdt_support.c
+++ b/common/fdt_support.c
@@ -1725,7 +1725,7 @@ int fdt_set_status_by_pathf(void *fdt, enum fdt_status status, const char *fmt,
 	return fdt_set_node_status(fdt, offset, status);
 }
 
-#if defined(CONFIG_VIDEO) || defined(CONFIG_LCD)
+#if defined(CONFIG_LCD)
 int fdt_add_edid(void *blob, const char *compat, unsigned char *edid_buf)
 {
 	int noff;
diff --git a/common/lcd.c b/common/lcd.c
index bd2f020..0898bc0 100644
--- a/common/lcd.c
+++ b/common/lcd.c
@@ -347,135 +347,6 @@ static void splash_align_axis(int *axis, unsigned long panel_size,
 }
 #endif
 
-#ifdef CONFIG_LCD_BMP_RLE8
-#define BMP_RLE8_ESCAPE		0
-#define BMP_RLE8_EOL		0
-#define BMP_RLE8_EOBMP		1
-#define BMP_RLE8_DELTA		2
-
-static void draw_unencoded_bitmap(ushort **fbp, uchar *bmap, ushort *cmap,
-				  int cnt)
-{
-	while (cnt > 0) {
-		*(*fbp)++ = cmap[*bmap++];
-		cnt--;
-	}
-}
-
-static void draw_encoded_bitmap(ushort **fbp, ushort c, int cnt)
-{
-	ushort *fb = *fbp;
-	int cnt_8copy = cnt >> 3;
-
-	cnt -= cnt_8copy << 3;
-	while (cnt_8copy > 0) {
-		*fb++ = c;
-		*fb++ = c;
-		*fb++ = c;
-		*fb++ = c;
-		*fb++ = c;
-		*fb++ = c;
-		*fb++ = c;
-		*fb++ = c;
-		cnt_8copy--;
-	}
-	while (cnt > 0) {
-		*fb++ = c;
-		cnt--;
-	}
-	*fbp = fb;
-}
-
-/*
- * Do not call this function directly, must be called from lcd_display_bitmap.
- */
-static void lcd_display_rle8_bitmap(struct bmp_image *bmp, ushort *cmap,
-				    uchar *fb, int x_off, int y_off)
-{
-	uchar *bmap;
-	ulong width, height;
-	ulong cnt, runlen;
-	int x, y;
-	int decode = 1;
-
-	width = get_unaligned_le32(&bmp->header.width);
-	height = get_unaligned_le32(&bmp->header.height);
-	bmap = (uchar *)bmp + get_unaligned_le32(&bmp->header.data_offset);
-
-	x = 0;
-	y = height - 1;
-
-	while (decode) {
-		if (bmap[0] == BMP_RLE8_ESCAPE) {
-			switch (bmap[1]) {
-			case BMP_RLE8_EOL:
-				/* end of line */
-				bmap += 2;
-				x = 0;
-				y--;
-				/* 16bpix, 2-byte per pixel, width should *2 */
-				fb -= (width * 2 + lcd_line_length);
-				break;
-			case BMP_RLE8_EOBMP:
-				/* end of bitmap */
-				decode = 0;
-				break;
-			case BMP_RLE8_DELTA:
-				/* delta run */
-				x += bmap[2];
-				y -= bmap[3];
-				/* 16bpix, 2-byte per pixel, x should *2 */
-				fb = (uchar *) (lcd_base + (y + y_off - 1)
-					* lcd_line_length + (x + x_off) * 2);
-				bmap += 4;
-				break;
-			default:
-				/* unencoded run */
-				runlen = bmap[1];
-				bmap += 2;
-				if (y < height) {
-					if (x < width) {
-						if (x + runlen > width)
-							cnt = width - x;
-						else
-							cnt = runlen;
-						draw_unencoded_bitmap(
-							(ushort **)&fb,
-							bmap, cmap, cnt);
-					}
-					x += runlen;
-				}
-				bmap += runlen;
-				if (runlen & 1)
-					bmap++;
-			}
-		} else {
-			/* encoded run */
-			if (y < height) {
-				runlen = bmap[0];
-				if (x < width) {
-					/* aggregate the same code */
-					while (bmap[0] == 0xff &&
-					       bmap[2] != BMP_RLE8_ESCAPE &&
-					       bmap[1] == bmap[3]) {
-						runlen += bmap[2];
-						bmap += 2;
-					}
-					if (x + runlen > width)
-						cnt = width - x;
-					else
-						cnt = runlen;
-					draw_encoded_bitmap((ushort **)&fb,
-						cmap[bmap[1]], cnt);
-				}
-				x += runlen;
-			}
-			bmap += 2;
-		}
-	}
-}
-#endif
-
 __weak void fb_put_byte(uchar **fb, uchar **from)
 {
 	*(*fb)++ = *(*from)++;
@@ -581,19 +452,6 @@ int lcd_display_bitmap(ulong bmp_image, int x, int y)
 	case 1:
 	case 8: {
 		cmap_base = configuration_get_cmap();
-#ifdef CONFIG_LCD_BMP_RLE8
-		u32 compression = get_unaligned_le32(&bmp->header.compression);
-		debug("compressed %d %d\n", compression, BMP_BI_RLE8);
-		if (compression == BMP_BI_RLE8) {
-			if (bpix != 16) {
-				/* TODO implement render code for bpix != 16 */
-				printf("Error: only support 16 bpix");
-				return 1;
-			}
-			lcd_display_rle8_bitmap(bmp, cmap_base, fb, x, y);
-			break;
-		}
-#endif
 
 		if (bpix != 16)
 			byte_width = width;
diff --git a/common/stdio.c b/common/stdio.c
index 063c659..92161a0 100644
--- a/common/stdio.c
+++ b/common/stdio.c
@@ -367,9 +367,7 @@ int stdio_add_devices(void)
 	} else {
 		if (IS_ENABLED(CONFIG_LCD))
 			drv_lcd_init();
-		if (IS_ENABLED(CONFIG_VIDEO) ||
-		    IS_ENABLED(CONFIG_CFB_CONSOLE) ||
-		    IS_ENABLED(CONFIG_VIDEO_VCXK))
+		if (IS_ENABLED(CONFIG_VIDEO_VCXK))
 			drv_video_init();
 	}
 
diff --git a/configs/colibri_vf_defconfig b/configs/colibri_vf_defconfig
index 8cf8a31..99e6623 100644
--- a/configs/colibri_vf_defconfig
+++ b/configs/colibri_vf_defconfig
@@ -101,7 +101,6 @@ CONFIG_USB_GADGET_DOWNLOAD=y
 CONFIG_DM_VIDEO=y
 # CONFIG_VIDEO_BPP8 is not set
 # CONFIG_VIDEO_BPP16 is not set
-CONFIG_VIDEO_FSL_DCU_FB=y
 CONFIG_SPLASH_SCREEN_ALIGN=y
 CONFIG_OF_LIBFDT_OVERLAY=y
 CONFIG_FDT_FIXUP_PARTITIONS=y
diff --git a/configs/rpi_0_w_defconfig b/configs/rpi_0_w_defconfig
index 195541c..8196182 100644
--- a/configs/rpi_0_w_defconfig
+++ b/configs/rpi_0_w_defconfig
@@ -41,6 +41,7 @@ CONFIG_DM_VIDEO=y
 # CONFIG_VIDEO_BPP8 is not set
 # CONFIG_VIDEO_BPP16 is not set
 CONFIG_SYS_WHITE_ON_BLACK=y
+CONFIG_VIDEO_BCM2835=y
 CONFIG_CONSOLE_SCROLL_LINES=10
 CONFIG_PHYS_TO_BUS=y
 CONFIG_OF_LIBFDT_OVERLAY=y
diff --git a/configs/rpi_2_defconfig b/configs/rpi_2_defconfig
index eb63fbd..9ccd69c 100644
--- a/configs/rpi_2_defconfig
+++ b/configs/rpi_2_defconfig
@@ -42,6 +42,7 @@ CONFIG_DM_VIDEO=y
 # CONFIG_VIDEO_BPP8 is not set
 # CONFIG_VIDEO_BPP16 is not set
 CONFIG_SYS_WHITE_ON_BLACK=y
+CONFIG_VIDEO_BCM2835=y
 CONFIG_CONSOLE_SCROLL_LINES=10
 CONFIG_PHYS_TO_BUS=y
 CONFIG_OF_LIBFDT_OVERLAY=y
diff --git a/configs/rpi_3_32b_defconfig b/configs/rpi_3_32b_defconfig
index 4610289..de4a14e 100644
--- a/configs/rpi_3_32b_defconfig
+++ b/configs/rpi_3_32b_defconfig
@@ -45,6 +45,7 @@ CONFIG_DM_VIDEO=y
 # CONFIG_VIDEO_BPP8 is not set
 # CONFIG_VIDEO_BPP16 is not set
 CONFIG_SYS_WHITE_ON_BLACK=y
+CONFIG_VIDEO_BCM2835=y
 CONFIG_CONSOLE_SCROLL_LINES=10
 CONFIG_PHYS_TO_BUS=y
 CONFIG_OF_LIBFDT_OVERLAY=y
diff --git a/configs/rpi_3_b_plus_defconfig b/configs/rpi_3_b_plus_defconfig
index 91b63b6..1d4346c 100644
--- a/configs/rpi_3_b_plus_defconfig
+++ b/configs/rpi_3_b_plus_defconfig
@@ -44,6 +44,7 @@ CONFIG_DM_VIDEO=y
 # CONFIG_VIDEO_BPP8 is not set
 # CONFIG_VIDEO_BPP16 is not set
 CONFIG_SYS_WHITE_ON_BLACK=y
+CONFIG_VIDEO_BCM2835=y
 CONFIG_CONSOLE_SCROLL_LINES=10
 CONFIG_PHYS_TO_BUS=y
 CONFIG_OF_LIBFDT_OVERLAY=y
diff --git a/configs/rpi_3_defconfig b/configs/rpi_3_defconfig
index 528b12e..c761540 100644
--- a/configs/rpi_3_defconfig
+++ b/configs/rpi_3_defconfig
@@ -44,6 +44,7 @@ CONFIG_DM_VIDEO=y
 # CONFIG_VIDEO_BPP8 is not set
 # CONFIG_VIDEO_BPP16 is not set
 CONFIG_SYS_WHITE_ON_BLACK=y
+CONFIG_VIDEO_BCM2835=y
 CONFIG_CONSOLE_SCROLL_LINES=10
 CONFIG_PHYS_TO_BUS=y
 CONFIG_OF_LIBFDT_OVERLAY=y
diff --git a/configs/rpi_4_32b_defconfig b/configs/rpi_4_32b_defconfig
index 8f87a43..d9d9331 100644
--- a/configs/rpi_4_32b_defconfig
+++ b/configs/rpi_4_32b_defconfig
@@ -59,6 +59,7 @@ CONFIG_DM_VIDEO=y
 # CONFIG_VIDEO_BPP8 is not set
 # CONFIG_VIDEO_BPP16 is not set
 CONFIG_SYS_WHITE_ON_BLACK=y
+CONFIG_VIDEO_BCM2835=y
 CONFIG_CONSOLE_SCROLL_LINES=10
 CONFIG_PHYS_TO_BUS=y
 CONFIG_ADDR_MAP=y
diff --git a/configs/rpi_4_defconfig b/configs/rpi_4_defconfig
index 461a765..eac55cc 100644
--- a/configs/rpi_4_defconfig
+++ b/configs/rpi_4_defconfig
@@ -59,6 +59,7 @@ CONFIG_DM_VIDEO=y
 # CONFIG_VIDEO_BPP8 is not set
 # CONFIG_VIDEO_BPP16 is not set
 CONFIG_SYS_WHITE_ON_BLACK=y
+CONFIG_VIDEO_BCM2835=y
 CONFIG_CONSOLE_SCROLL_LINES=10
 CONFIG_PHYS_TO_BUS=y
 CONFIG_OF_LIBFDT_OVERLAY=y
diff --git a/configs/rpi_arm64_defconfig b/configs/rpi_arm64_defconfig
index 351d247..a0cbdbe 100644
--- a/configs/rpi_arm64_defconfig
+++ b/configs/rpi_arm64_defconfig
@@ -51,6 +51,7 @@ CONFIG_DM_VIDEO=y
 # CONFIG_VIDEO_BPP8 is not set
 # CONFIG_VIDEO_BPP16 is not set
 CONFIG_SYS_WHITE_ON_BLACK=y
+CONFIG_VIDEO_BCM2835=y
 CONFIG_CONSOLE_SCROLL_LINES=10
 CONFIG_PHYS_TO_BUS=y
 CONFIG_OF_LIBFDT_OVERLAY=y
diff --git a/configs/rpi_defconfig b/configs/rpi_defconfig
index 0baef3b..bd4e3dc 100644
--- a/configs/rpi_defconfig
+++ b/configs/rpi_defconfig
@@ -41,6 +41,7 @@ CONFIG_DM_VIDEO=y
 # CONFIG_VIDEO_BPP8 is not set
 # CONFIG_VIDEO_BPP16 is not set
 CONFIG_SYS_WHITE_ON_BLACK=y
+CONFIG_VIDEO_BCM2835=y
 CONFIG_CONSOLE_SCROLL_LINES=10
 CONFIG_PHYS_TO_BUS=y
 CONFIG_OF_LIBFDT_OVERLAY=y
diff --git a/doc/usage/bootmenu.rst b/doc/usage/bootmenu.rst
index 1f094ad..1016ac8 100644
--- a/doc/usage/bootmenu.rst
+++ b/doc/usage/bootmenu.rst
@@ -88,8 +88,3 @@ To run the bootmenu at startup add these additional settings::
     CONFIG_AUTOBOOT_KEYED=y
     CONFIG_BOOTDELAY=30
     CONFIG_AUTOBOOT_MENU_SHOW=y
-
-When you intend to use the bootmenu on a color frame buffer console,
-make sure to additionally define::
-
-    CONFIG_CFB_CONSOLE_ANSI=y
diff --git a/drivers/pci/pci_rom.c b/drivers/pci/pci_rom.c
index f8b1930..73d15e7 100644
--- a/drivers/pci/pci_rom.c
+++ b/drivers/pci/pci_rom.c
@@ -36,7 +36,6 @@
 #include <pci_rom.h>
 #include <vbe.h>
 #include <video.h>
-#include <video_fb.h>
 #include <acpi/acpi_s3.h>
 #include <asm/global_data.h>
 #include <linux/screen_info.h>
diff --git a/drivers/video/Kconfig b/drivers/video/Kconfig
index 1bf7f4a..965b587 100644
--- a/drivers/video/Kconfig
+++ b/drivers/video/Kconfig
@@ -430,6 +430,14 @@ config ATMEL_LCD_BGR555
 	help
 	  Use the BGR555 output mode.  Otherwise RGB565 is used.
 
+config VIDEO_BCM2835
+	bool "Display support for BCM2835"
+	help
+	  The graphics processor already sets up the display so this driver
+	  simply checks the resolution and then sets up the frame buffer with
+	  that same resolution (or as near as possible) and 32bpp depth, so
+	  that U-Boot can access it with full colour depth.
+
 config VIDEO_LCD_ORISETECH_OTM8009A
 	bool "OTM8009A DSI LCD panel support"
 	depends on DM_VIDEO
@@ -610,21 +618,6 @@ config VIDEO_IVYBRIDGE_IGD
 	  a special tool which configures the VGA ROM, but the graphics
 	  resolution can be selected in U-Boot.
 
-config VIDEO_FSL_DCU_FB
-	bool "Enable Freescale Display Control Unit"
-	depends on VIDEO || DM_VIDEO
-	help
-	 This enables support for Freescale Display Control Unit (DCU4)
-	 module found on Freescale Vybrid and QorIQ family of SoCs.
-
-config VIDEO_FSL_DCU_MAX_FB_SIZE_MB
-	int "Freescale DCU framebuffer size"
-	depends on VIDEO_FSL_DCU_FB
-	default 4194304
-	help
-	 Set maximum framebuffer size to be used for Freescale Display
-	 Controller Unit (DCU4).
-
 source "drivers/video/rockchip/Kconfig"
 
 config VIDEO_ARM_MALIDP
@@ -708,89 +701,9 @@ config VIDEO
 	  model. Video drivers typically provide a colour text console and
 	  cursor.
 
-config CFB_CONSOLE
-	bool "Enable colour frame buffer console"
-	depends on VIDEO || ARCH_OMAP2PLUS
-	default y if VIDEO
-	help
-	  Enables the colour frame buffer driver. This supports colour
-	  output on a bitmap display from an in-memory frame buffer.
-	  Several colour devices are supported along with various options to
-	  adjust the supported features. The driver is implemented in
-	  cfb_console.c
-
-	  The following defines are needed (cf. smiLynxEM, i8042)
-		VIDEO_FB_LITTLE_ENDIAN	graphic memory organisation
-					(default big endian)
-		VIDEO_HW_RECTFILL	graphic chip supports
-					rectangle fill (cf. smiLynxEM)
-		VIDEO_HW_BITBLT		graphic chip supports
-					bit-blit (cf. smiLynxEM)
-		VIDEO_VISIBLE_COLS	visible pixel columns (cols=pitch)
-		VIDEO_VISIBLE_ROWS	visible pixel rows
-		VIDEO_PIXEL_SIZE	bytes per pixel
-		VIDEO_DATA_FORMAT	graphic data format
-					(0-5, cf. cfb_console.c)
-		VIDEO_FB_ADRS		framebuffer address
-		VIDEO_KBD_INIT_FCT	keyboard int fct (i.e. rx51_kp_init())
-		VIDEO_TSTC_FCT		test char fct (i.e. rx51_kp_tstc)
-		VIDEO_GETC_FCT		get char fct (i.e. rx51_kp_getc)
-		CONFIG_VIDEO_LOGO	display Linux logo in upper left corner
-		CONFIG_VIDEO_BMP_LOGO	use bmp_logo.h instead of linux_logo.h
-					for logo. Requires CONFIG_VIDEO_LOGO
-		CONFIG_CONSOLE_EXTRA_INFO
-					additional board info beside
-					the logo
-		CONFIG_HIDE_LOGO_VERSION
-					do not display bootloader
-					version string
-
-	  When CONFIG_CFB_CONSOLE is defined, the video console is the
-	  default console. The serial console can be forced by setting the
-	  environment 'console=serial'.
-
-config CFB_CONSOLE_ANSI
-	bool "Support ANSI escape sequences"
-	depends on CFB_CONSOLE
-	help
-	  This allows the colour buffer frame buffer driver to support
-	  a limited number of ANSI escape sequences (cursor control,
-	  erase functions and limited graphics rendition control). Normal
-	  output from U-Boot will pass through this filter.
-
-config VGA_AS_SINGLE_DEVICE
-	bool "Set the video as an output-only device"
-	depends on CFB_CONSOLE
-	default y
-	help
-	  If enable the framebuffer device will be initialized as an
-	  output-only device. The Keyboard driver will not be set up. This
-	  may be used if you have no keyboard device, or more than one
-	  (USB Keyboard, AT Keyboard).
-
-config VIDEO_SW_CURSOR
-	bool "Enable a software cursor"
-	depends on CFB_CONSOLE
-	default y if CFB_CONSOLE
-	help
-	  This draws a cursor after the last character. No blinking is
-	  provided. This makes it possible to see the current cursor
-	  position when entering text on the console. It is recommended to
-	  enable this.
-
-config CONSOLE_EXTRA_INFO
-	bool "Display additional board information"
-	depends on CFB_CONSOLE
-	help
-	  Display additional board information strings that normally go to
-	  the serial port. When this option is enabled, a board-specific
-	  function video_get_info_str() is called to get the string for
-	  each line of the display. The function should return the string,
-	  which can be empty if there is nothing to display for that line.
-
 config CONSOLE_SCROLL_LINES
 	int "Number of lines to scroll the console by"
-	depends on CFB_CONSOLE || DM_VIDEO || LCD
+	depends on DM_VIDEO || LCD
 	default 1
 	help
 	  When the console need to be scrolled, this is the number of
@@ -798,28 +711,6 @@ config CONSOLE_SCROLL_LINES
 	  console jump but can help speed up operation when scrolling
 	  is slow.
 
-config SYS_CONSOLE_BG_COL
-	hex "Background colour"
-	depends on CFB_CONSOLE
-	default 0x00
-	help
-	  Defines the background colour for the console. The value is from
-	  0x00 to 0xff and the meaning depends on the graphics card.
-	  Typically, 0x00 means black and 0xff means white. Do not set
-	  the background and foreground to the same colour or you will see
-	  nothing.
-
-config SYS_CONSOLE_FG_COL
-	hex "Foreground colour"
-	depends on CFB_CONSOLE
-	default 0xa0
-	help
-	  Defines the foreground colour for the console. The value is from
-	  0x00 to 0xff and the meaning depends on the graphics card.
-	  Typically, 0x00 means black and 0xff means white. Do not set
-	  the background and foreground to the same colour or you will see
-	  nothing.
-
 config LCD
 	bool "Enable legacy LCD support"
 	help
@@ -1017,7 +908,7 @@ config VIDEO_BMP_GZIP
 
 config VIDEO_BMP_RLE8
 	bool "Run length encoded BMP image (RLE8) support"
-	depends on DM_VIDEO || CFB_CONSOLE
+	depends on DM_VIDEO
 	help
 	  If this option is set, the 8-bit RLE compressed BMP images
 	  is supported.
diff --git a/drivers/video/Makefile b/drivers/video/Makefile
index 2530791..2596580 100644
--- a/drivers/video/Makefile
+++ b/drivers/video/Makefile
@@ -30,9 +30,6 @@ obj-y += ti/
 
 obj-$(CONFIG_ATMEL_HLCD) += atmel_hlcdfb.o
 obj-$(CONFIG_ATMEL_LCD) += atmel_lcdfb.o
-obj-$(CONFIG_CFB_CONSOLE) += cfb_console.o
-obj-$(CONFIG_FORMIKE) += formike.o
-obj-$(CONFIG_FSL_DIU_FB) += fsl_diu_fb.o videomodes.o
 obj-$(CONFIG_IHS_VIDEO_OUT) += ihs_video_out.o
 obj-$(CONFIG_LD9040) += ld9040.o
 obj-$(CONFIG_LG4573) += lg4573.o
@@ -47,11 +44,9 @@ obj-$(CONFIG_VIDEO_ARM_MALIDP) += mali_dp.o
 obj-$(CONFIG_VIDEO_BCM2835) += bcm2835.o
 obj-$(CONFIG_VIDEO_BROADWELL_IGD) += broadwell_igd.o
 obj-$(CONFIG_VIDEO_COREBOOT) += coreboot.o
-obj-$(CONFIG_VIDEO_DA8XX) += da8xx-fb.o videomodes.o
 obj-$(CONFIG_VIDEO_DW_HDMI) += dw_hdmi.o
 obj-$(CONFIG_VIDEO_DW_MIPI_DSI) += dw_mipi_dsi.o
 obj-$(CONFIG_VIDEO_EFI) += efi.o
-obj-$(CONFIG_VIDEO_FSL_DCU_FB) += fsl_dcu_fb.o videomodes.o
 obj-$(CONFIG_VIDEO_IPUV3) += imx/
 obj-$(CONFIG_VIDEO_IVYBRIDGE_IGD) += ivybridge_igd.o
 obj-$(CONFIG_VIDEO_LCD_ANX9804) += anx9804.o
diff --git a/drivers/video/cfb_console.c b/drivers/video/cfb_console.c
deleted file mode 100644
index 52b109f..0000000
--- a/drivers/video/cfb_console.c
+++ /dev/null
@@ -1,1865 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0+
-/*
- * (C) Copyright 2002 ELTEC Elektronik AG
- * Frank Gottschling <fgottschling@eltec.de>
- */
-
-/*
- * cfb_console.c
- *
- * Color Framebuffer Console driver for 8/15/16/24/32 bits per pixel.
- *
- * At the moment only the 8x16 font is tested and the font fore- and
- * background color is limited to black/white/gray colors. The Linux
- * logo can be placed in the upper left corner and additional board
- * information strings (that normally goes to serial port) can be drawn.
- *
- * The console driver can use a keyboard interface for character input
- * but this is deprecated. Only rk51 uses it.
- *
- * Character output goes to a memory-mapped video
- * framebuffer with little or big-endian organisation.
- * With environment setting 'console=serial' the console i/o can be
- * forced to serial port.
- *
- * The driver uses graphic specific defines/parameters/functions:
- *
- * (for SMI LynxE graphic chip)
- *
- * VIDEO_FB_LITTLE_ENDIAN     - framebuffer organisation default: big endian
- * VIDEO_HW_RECTFILL	      - graphic driver supports hardware rectangle fill
- * VIDEO_HW_BITBLT	      - graphic driver supports hardware bit blt
- *
- * Console Parameters are set by graphic drivers global struct:
- *
- * VIDEO_VISIBLE_COLS	      - x resolution
- * VIDEO_VISIBLE_ROWS	      - y resolution
- * VIDEO_PIXEL_SIZE	      - storage size in byte per pixel
- * VIDEO_DATA_FORMAT	      - graphical data format GDF
- * VIDEO_FB_ADRS	      - start of video memory
- *
- * VIDEO_KBD_INIT_FCT	      - init function for keyboard
- * VIDEO_TSTC_FCT	      - keyboard_tstc function
- * VIDEO_GETC_FCT	      - keyboard_getc function
- *
- * CONFIG_VIDEO_BMP_LOGO      - use bmp_logo instead of linux_logo
- * CONFIG_CONSOLE_EXTRA_INFO  - display additional board information
- *				strings that normaly goes to serial
- *				port.  This define requires a board
- *				specific function:
- *				video_drawstring (VIDEO_INFO_X,
- *					VIDEO_INFO_Y + i*VIDEO_FONT_HEIGHT,
- *					info);
- *				that fills a info buffer at i=row.
- *				s.a: board/eltec/bab7xx.
- *
- * CONFIG_VIDEO_SW_CURSOR:    - Draws a cursor after the last
- *				character. No blinking is provided.
- *				Uses the macros CURSOR_SET and
- *				CURSOR_OFF.
- */
-
-#include <common.h>
-#include <command.h>
-#include <cpu_func.h>
-#include <env.h>
-#include <fdtdec.h>
-#include <gzip.h>
-#include <log.h>
-#include <version_string.h>
-#include <malloc.h>
-#include <video.h>
-#include <asm/global_data.h>
-#include <dm/ofnode.h>
-#include <linux/compiler.h>
-
-/*
- * Include video_fb.h after definitions of VIDEO_HW_RECTFILL etc.
- */
-#include <video_fb.h>
-
-#include <splash.h>
-
-/*
- * some Macros
- */
-#define VIDEO_VISIBLE_COLS	(pGD->winSizeX)
-#define VIDEO_VISIBLE_ROWS	(pGD->winSizeY)
-#define VIDEO_PIXEL_SIZE	(pGD->gdfBytesPP)
-#define VIDEO_DATA_FORMAT	(pGD->gdfIndex)
-#define VIDEO_FB_ADRS		(pGD->frameAdrs)
-
-/*
- * Console device
- */
-
-#include <linux/types.h>
-#include <stdio_dev.h>
-#include <video_font.h>
-
-#if defined(CONFIG_CMD_DATE)
-#include <rtc.h>
-#endif
-
-#if defined(CONFIG_CMD_BMP) || defined(CONFIG_SPLASH_SCREEN)
-#include <watchdog.h>
-#include <bmp_layout.h>
-#include <splash.h>
-#endif
-
-#if !defined(CONFIG_VIDEO_SW_CURSOR)
-/* no Cursor defined */
-#define CURSOR_ON
-#define CURSOR_OFF
-#define CURSOR_SET
-#endif
-
-#if defined(CONFIG_VIDEO_SW_CURSOR)
-void console_cursor(int state);
-
-#define CURSOR_ON  console_cursor(1)
-#define CURSOR_OFF console_cursor(0)
-#define CURSOR_SET video_set_cursor()
-#endif /* CONFIG_VIDEO_SW_CURSOR */
-
-#define VIDEO_COLS		VIDEO_VISIBLE_COLS
-#define VIDEO_ROWS		VIDEO_VISIBLE_ROWS
-#ifndef VIDEO_LINE_LEN
-#define VIDEO_LINE_LEN		(VIDEO_COLS * VIDEO_PIXEL_SIZE)
-#endif
-#define VIDEO_SIZE		(VIDEO_ROWS * VIDEO_LINE_LEN)
-#define VIDEO_BURST_LEN		(VIDEO_COLS/8)
-
-#define CONSOLE_ROWS		(VIDEO_ROWS / VIDEO_FONT_HEIGHT)
-
-#define CONSOLE_COLS		(VIDEO_COLS / VIDEO_FONT_WIDTH)
-#define CONSOLE_ROW_SIZE	(VIDEO_FONT_HEIGHT * VIDEO_LINE_LEN)
-#define CONSOLE_ROW_FIRST	(video_console_address)
-#define CONSOLE_ROW_SECOND	(video_console_address + CONSOLE_ROW_SIZE)
-#define CONSOLE_ROW_LAST	(video_console_address + CONSOLE_SIZE - CONSOLE_ROW_SIZE)
-#define CONSOLE_SIZE		(CONSOLE_ROW_SIZE * CONSOLE_ROWS)
-
-/* By default we scroll by a single line */
-#ifndef CONFIG_CONSOLE_SCROLL_LINES
-#define CONFIG_CONSOLE_SCROLL_LINES 1
-#endif
-
-/* Macros */
-#ifdef	VIDEO_FB_LITTLE_ENDIAN
-#define SWAP16(x)		((((x) & 0x00ff) << 8) | \
-				  ((x) >> 8) \
-				)
-#define SWAP32(x)		((((x) & 0x000000ff) << 24) | \
-				 (((x) & 0x0000ff00) <<  8) | \
-				 (((x) & 0x00ff0000) >>  8) | \
-				 (((x) & 0xff000000) >> 24)   \
-				)
-#define SHORTSWAP32(x)		((((x) & 0x000000ff) <<  8) | \
-				 (((x) & 0x0000ff00) >>  8) | \
-				 (((x) & 0x00ff0000) <<  8) | \
-				 (((x) & 0xff000000) >>  8)   \
-				)
-#else
-#define SWAP16(x)		(x)
-#define SWAP32(x)		(x)
-#if defined(VIDEO_FB_16BPP_WORD_SWAP)
-#define SHORTSWAP32(x)		(((x) >> 16) | ((x) << 16))
-#else
-#define SHORTSWAP32(x)		(x)
-#endif
-#endif
-
-DECLARE_GLOBAL_DATA_PTR;
-
-/* Locals */
-static GraphicDevice *pGD;	/* Pointer to Graphic array */
-
-static void *video_fb_address;	/* frame buffer address */
-static void *video_console_address;	/* console buffer start address */
-
-static int video_logo_height;		/* not supported anymore */
-
-static int __maybe_unused cursor_state;
-static int __maybe_unused old_col;
-static int __maybe_unused old_row;
-
-static int console_col;		/* cursor col */
-static int console_row;		/* cursor row */
-
-static u32 eorx, fgx, bgx;	/* color pats */
-
-static int cfb_do_flush_cache;
-
-#ifdef CONFIG_CFB_CONSOLE_ANSI
-static char ansi_buf[10];
-static int ansi_buf_size;
-static int ansi_colors_need_revert;
-static int ansi_cursor_hidden;
-#endif
-
-static const int video_font_draw_table8[] = {
-	0x00000000, 0x000000ff, 0x0000ff00, 0x0000ffff,
-	0x00ff0000, 0x00ff00ff, 0x00ffff00, 0x00ffffff,
-	0xff000000, 0xff0000ff, 0xff00ff00, 0xff00ffff,
-	0xffff0000, 0xffff00ff, 0xffffff00, 0xffffffff
-};
-
-static const int video_font_draw_table15[] = {
-	0x00000000, 0x00007fff, 0x7fff0000, 0x7fff7fff
-};
-
-static const int video_font_draw_table16[] = {
-	0x00000000, 0x0000ffff, 0xffff0000, 0xffffffff
-};
-
-static const int video_font_draw_table24[16][3] = {
-	{0x00000000, 0x00000000, 0x00000000},
-	{0x00000000, 0x00000000, 0x00ffffff},
-	{0x00000000, 0x0000ffff, 0xff000000},
-	{0x00000000, 0x0000ffff, 0xffffffff},
-	{0x000000ff, 0xffff0000, 0x00000000},
-	{0x000000ff, 0xffff0000, 0x00ffffff},
-	{0x000000ff, 0xffffffff, 0xff000000},
-	{0x000000ff, 0xffffffff, 0xffffffff},
-	{0xffffff00, 0x00000000, 0x00000000},
-	{0xffffff00, 0x00000000, 0x00ffffff},
-	{0xffffff00, 0x0000ffff, 0xff000000},
-	{0xffffff00, 0x0000ffff, 0xffffffff},
-	{0xffffffff, 0xffff0000, 0x00000000},
-	{0xffffffff, 0xffff0000, 0x00ffffff},
-	{0xffffffff, 0xffffffff, 0xff000000},
-	{0xffffffff, 0xffffffff, 0xffffffff}
-};
-
-static const int video_font_draw_table32[16][4] = {
-	{0x00000000, 0x00000000, 0x00000000, 0x00000000},
-	{0x00000000, 0x00000000, 0x00000000, 0x00ffffff},
-	{0x00000000, 0x00000000, 0x00ffffff, 0x00000000},
-	{0x00000000, 0x00000000, 0x00ffffff, 0x00ffffff},
-	{0x00000000, 0x00ffffff, 0x00000000, 0x00000000},
-	{0x00000000, 0x00ffffff, 0x00000000, 0x00ffffff},
-	{0x00000000, 0x00ffffff, 0x00ffffff, 0x00000000},
-	{0x00000000, 0x00ffffff, 0x00ffffff, 0x00ffffff},
-	{0x00ffffff, 0x00000000, 0x00000000, 0x00000000},
-	{0x00ffffff, 0x00000000, 0x00000000, 0x00ffffff},
-	{0x00ffffff, 0x00000000, 0x00ffffff, 0x00000000},
-	{0x00ffffff, 0x00000000, 0x00ffffff, 0x00ffffff},
-	{0x00ffffff, 0x00ffffff, 0x00000000, 0x00000000},
-	{0x00ffffff, 0x00ffffff, 0x00000000, 0x00ffffff},
-	{0x00ffffff, 0x00ffffff, 0x00ffffff, 0x00000000},
-	{0x00ffffff, 0x00ffffff, 0x00ffffff, 0x00ffffff}
-};
-
-/*
- * Implement a weak default function for boards that optionally
- * need to skip the cfb initialization.
- */
-__weak int board_cfb_skip(void)
-{
-	/* As default, don't skip cfb init */
-	return 0;
-}
-
-static void video_drawchars(int xx, int yy, unsigned char *s, int count)
-{
-	u8 *cdat, *dest, *dest0;
-	int rows, offset, c;
-
-	offset = yy * VIDEO_LINE_LEN + xx * VIDEO_PIXEL_SIZE;
-	dest0 = video_fb_address + offset;
-
-	switch (VIDEO_DATA_FORMAT) {
-	case GDF__8BIT_INDEX:
-	case GDF__8BIT_332RGB:
-		while (count--) {
-			c = *s;
-			cdat = video_fontdata + c * VIDEO_FONT_HEIGHT;
-			for (rows = VIDEO_FONT_HEIGHT, dest = dest0;
-			     rows--; dest += VIDEO_LINE_LEN) {
-				u8 bits = *cdat++;
-
-				((u32 *) dest)[0] =
-					(video_font_draw_table8[bits >> 4] &
-					 eorx) ^ bgx;
-
-				if (VIDEO_FONT_WIDTH == 4)
-					continue;
-
-				((u32 *) dest)[1] =
-					(video_font_draw_table8[bits & 15] &
-					 eorx) ^ bgx;
-			}
-			dest0 += VIDEO_FONT_WIDTH * VIDEO_PIXEL_SIZE;
-			s++;
-		}
-		break;
-
-	case GDF_15BIT_555RGB:
-		while (count--) {
-			c = *s;
-			cdat = video_fontdata + c * VIDEO_FONT_HEIGHT;
-			for (rows = VIDEO_FONT_HEIGHT, dest = dest0;
-			     rows--; dest += VIDEO_LINE_LEN) {
-				u8 bits = *cdat++;
-
-				((u32 *) dest)[0] =
-					SHORTSWAP32((video_font_draw_table15
-						     [bits >> 6] & eorx) ^
-						    bgx);
-				((u32 *) dest)[1] =
-					SHORTSWAP32((video_font_draw_table15
-						     [bits >> 4 & 3] & eorx) ^
-						    bgx);
-
-				if (VIDEO_FONT_WIDTH == 4)
-					continue;
-
-				((u32 *) dest)[2] =
-					SHORTSWAP32((video_font_draw_table15
-						     [bits >> 2 & 3] & eorx) ^
-						    bgx);
-				((u32 *) dest)[3] =
-					SHORTSWAP32((video_font_draw_table15
-						     [bits & 3] & eorx) ^
-						    bgx);
-			}
-			dest0 += VIDEO_FONT_WIDTH * VIDEO_PIXEL_SIZE;
-			s++;
-		}
-		break;
-
-	case GDF_16BIT_565RGB:
-		while (count--) {
-			c = *s;
-			cdat = video_fontdata + c * VIDEO_FONT_HEIGHT;
-			for (rows = VIDEO_FONT_HEIGHT, dest = dest0;
-			     rows--; dest += VIDEO_LINE_LEN) {
-				u8 bits = *cdat++;
-
-				((u32 *) dest)[0] =
-					SHORTSWAP32((video_font_draw_table16
-						     [bits >> 6] & eorx) ^
-						    bgx);
-				((u32 *) dest)[1] =
-					SHORTSWAP32((video_font_draw_table16
-						     [bits >> 4 & 3] & eorx) ^
-						    bgx);
-
-				if (VIDEO_FONT_WIDTH == 4)
-					continue;
-
-				((u32 *) dest)[2] =
-					SHORTSWAP32((video_font_draw_table16
-						     [bits >> 2 & 3] & eorx) ^
-						    bgx);
-				((u32 *) dest)[3] =
-					SHORTSWAP32((video_font_draw_table16
-						     [bits & 3] & eorx) ^
-						    bgx);
-			}
-			dest0 += VIDEO_FONT_WIDTH * VIDEO_PIXEL_SIZE;
-			s++;
-		}
-		break;
-
-	case GDF_32BIT_X888RGB:
-		while (count--) {
-			c = *s;
-			cdat = video_fontdata + c * VIDEO_FONT_HEIGHT;
-			for (rows = VIDEO_FONT_HEIGHT, dest = dest0;
-			     rows--; dest += VIDEO_LINE_LEN) {
-				u8 bits = *cdat++;
-
-				((u32 *) dest)[0] =
-					SWAP32((video_font_draw_table32
-						[bits >> 4][0] & eorx) ^ bgx);
-				((u32 *) dest)[1] =
-					SWAP32((video_font_draw_table32
-						[bits >> 4][1] & eorx) ^ bgx);
-				((u32 *) dest)[2] =
-					SWAP32((video_font_draw_table32
-						[bits >> 4][2] & eorx) ^ bgx);
-				((u32 *) dest)[3] =
-					SWAP32((video_font_draw_table32
-						[bits >> 4][3] & eorx) ^ bgx);
-
-
-				if (VIDEO_FONT_WIDTH == 4)
-					continue;
-
-				((u32 *) dest)[4] =
-					SWAP32((video_font_draw_table32
-						[bits & 15][0] & eorx) ^ bgx);
-				((u32 *) dest)[5] =
-					SWAP32((video_font_draw_table32
-						[bits & 15][1] & eorx) ^ bgx);
-				((u32 *) dest)[6] =
-					SWAP32((video_font_draw_table32
-						[bits & 15][2] & eorx) ^ bgx);
-				((u32 *) dest)[7] =
-					SWAP32((video_font_draw_table32
-						[bits & 15][3] & eorx) ^ bgx);
-			}
-			dest0 += VIDEO_FONT_WIDTH * VIDEO_PIXEL_SIZE;
-			s++;
-		}
-		break;
-
-	case GDF_24BIT_888RGB:
-		while (count--) {
-			c = *s;
-			cdat = video_fontdata + c * VIDEO_FONT_HEIGHT;
-			for (rows = VIDEO_FONT_HEIGHT, dest = dest0;
-			     rows--; dest += VIDEO_LINE_LEN) {
-				u8 bits = *cdat++;
-
-				((u32 *) dest)[0] =
-					(video_font_draw_table24[bits >> 4][0]
-					 & eorx) ^ bgx;
-				((u32 *) dest)[1] =
-					(video_font_draw_table24[bits >> 4][1]
-					 & eorx) ^ bgx;
-				((u32 *) dest)[2] =
-					(video_font_draw_table24[bits >> 4][2]
-					 & eorx) ^ bgx;
-
-				if (VIDEO_FONT_WIDTH == 4)
-					continue;
-
-				((u32 *) dest)[3] =
-					(video_font_draw_table24[bits & 15][0]
-					 & eorx) ^ bgx;
-				((u32 *) dest)[4] =
-					(video_font_draw_table24[bits & 15][1]
-					 & eorx) ^ bgx;
-				((u32 *) dest)[5] =
-					(video_font_draw_table24[bits & 15][2]
-					 & eorx) ^ bgx;
-			}
-			dest0 += VIDEO_FONT_WIDTH * VIDEO_PIXEL_SIZE;
-			s++;
-		}
-		break;
-	}
-}
-
-static inline void video_drawstring(int xx, int yy, unsigned char *s)
-{
-	video_drawchars(xx, yy, s, strlen((char *) s));
-}
-
-static void video_putchar(int xx, int yy, unsigned char c)
-{
-	video_drawchars(xx, yy + video_logo_height, &c, 1);
-}
-
-#if defined(CONFIG_VIDEO_SW_CURSOR)
-static void video_set_cursor(void)
-{
-	if (cursor_state)
-		console_cursor(0);
-	console_cursor(1);
-}
-
-static void video_invertchar(int xx, int yy)
-{
-	int firstx = xx * VIDEO_PIXEL_SIZE;
-	int lastx = (xx + VIDEO_FONT_WIDTH) * VIDEO_PIXEL_SIZE;
-	int firsty = yy * VIDEO_LINE_LEN;
-	int lasty = (yy + VIDEO_FONT_HEIGHT) * VIDEO_LINE_LEN;
-	int x, y;
-	for (y = firsty; y < lasty; y += VIDEO_LINE_LEN) {
-		for (x = firstx; x < lastx; x++) {
-			u8 *dest = (u8 *)(video_fb_address) + x + y;
-			*dest = ~*dest;
-		}
-	}
-}
-
-void console_cursor(int state)
-{
-	if (cursor_state != state) {
-		if (cursor_state) {
-			/* turn off the cursor */
-			video_invertchar(old_col * VIDEO_FONT_WIDTH,
-					 old_row * VIDEO_FONT_HEIGHT +
-					 video_logo_height);
-		} else {
-			/* turn off the cursor and record where it is */
-			video_invertchar(console_col * VIDEO_FONT_WIDTH,
-					 console_row * VIDEO_FONT_HEIGHT +
-					 video_logo_height);
-			old_col = console_col;
-			old_row = console_row;
-		}
-		cursor_state = state;
-	}
-	if (cfb_do_flush_cache)
-		flush_cache(VIDEO_FB_ADRS, VIDEO_SIZE);
-}
-#endif
-
-#ifndef VIDEO_HW_RECTFILL
-static void memsetl(int *p, int c, int v)
-{
-	while (c--)
-		*(p++) = v;
-}
-#endif
-
-#ifndef VIDEO_HW_BITBLT
-static void memcpyl(int *d, int *s, int c)
-{
-	while (c--)
-		*(d++) = *(s++);
-}
-#endif
-
-static void console_clear_line(int line, int begin, int end)
-{
-#ifdef VIDEO_HW_RECTFILL
-	video_hw_rectfill(VIDEO_PIXEL_SIZE,		/* bytes per pixel */
-			  VIDEO_FONT_WIDTH * begin,	/* dest pos x */
-			  video_logo_height +
-			  VIDEO_FONT_HEIGHT * line,	/* dest pos y */
-			  VIDEO_FONT_WIDTH * (end - begin + 1), /* fr. width */
-			  VIDEO_FONT_HEIGHT,		/* frame height */
-			  bgx				/* fill color */
-		);
-#else
-	if (begin == 0 && (end + 1) == CONSOLE_COLS) {
-		memsetl(CONSOLE_ROW_FIRST +
-			CONSOLE_ROW_SIZE * line,	/* offset of row */
-			CONSOLE_ROW_SIZE >> 2,		/* length of row */
-			bgx				/* fill color */
-		);
-	} else {
-		void *offset;
-		int i, size;
-
-		offset = CONSOLE_ROW_FIRST +
-			 CONSOLE_ROW_SIZE * line +	/* offset of row */
-			 VIDEO_FONT_WIDTH *
-			 VIDEO_PIXEL_SIZE * begin;	/* offset of col */
-		size = VIDEO_FONT_WIDTH * VIDEO_PIXEL_SIZE * (end - begin + 1);
-		size >>= 2; /* length to end for memsetl() */
-		/* fill at col offset of i'th line using bgx as fill color */
-		for (i = 0; i < VIDEO_FONT_HEIGHT; i++)
-			memsetl(offset + i * VIDEO_LINE_LEN, size, bgx);
-	}
-#endif
-}
-
-static void console_scrollup(void)
-{
-	const int rows = CONFIG_CONSOLE_SCROLL_LINES;
-	int i;
-
-	/* copy up rows ignoring the first one */
-
-#ifdef VIDEO_HW_BITBLT
-	video_hw_bitblt(VIDEO_PIXEL_SIZE,	/* bytes per pixel */
-			0,			/* source pos x */
-			video_logo_height +
-				VIDEO_FONT_HEIGHT * rows, /* source pos y */
-			0,			/* dest pos x */
-			video_logo_height,	/* dest pos y */
-			VIDEO_VISIBLE_COLS,	/* frame width */
-			VIDEO_VISIBLE_ROWS
-			- video_logo_height
-			- VIDEO_FONT_HEIGHT * rows	/* frame height */
-		);
-#else
-	memcpyl(CONSOLE_ROW_FIRST, CONSOLE_ROW_FIRST + rows * CONSOLE_ROW_SIZE,
-		(CONSOLE_SIZE - CONSOLE_ROW_SIZE * rows) >> 2);
-#endif
-	/* clear the last one */
-	for (i = 1; i <= rows; i++)
-		console_clear_line(CONSOLE_ROWS - i, 0, CONSOLE_COLS - 1);
-
-	/* Decrement row number */
-	console_row -= rows;
-}
-
-static void console_back(void)
-{
-	console_col--;
-
-	if (console_col < 0) {
-		console_col = CONSOLE_COLS - 1;
-		console_row--;
-		if (console_row < 0)
-			console_row = 0;
-	}
-}
-
-#ifdef CONFIG_CFB_CONSOLE_ANSI
-
-static void console_clear(void)
-{
-#ifdef VIDEO_HW_RECTFILL
-	video_hw_rectfill(VIDEO_PIXEL_SIZE,	/* bytes per pixel */
-			  0,			/* dest pos x */
-			  video_logo_height,	/* dest pos y */
-			  VIDEO_VISIBLE_COLS,	/* frame width */
-			  VIDEO_VISIBLE_ROWS,	/* frame height */
-			  bgx			/* fill color */
-	);
-#else
-	memsetl(CONSOLE_ROW_FIRST, CONSOLE_SIZE, bgx);
-#endif
-}
-
-static void console_cursor_fix(void)
-{
-	if (console_row < 0)
-		console_row = 0;
-	if (console_row >= CONSOLE_ROWS)
-		console_row = CONSOLE_ROWS - 1;
-	if (console_col < 0)
-		console_col = 0;
-	if (console_col >= CONSOLE_COLS)
-		console_col = CONSOLE_COLS - 1;
-}
-
-static void console_cursor_up(int n)
-{
-	console_row -= n;
-	console_cursor_fix();
-}
-
-static void console_cursor_down(int n)
-{
-	console_row += n;
-	console_cursor_fix();
-}
-
-static void console_cursor_left(int n)
-{
-	console_col -= n;
-	console_cursor_fix();
-}
-
-static void console_cursor_right(int n)
-{
-	console_col += n;
-	console_cursor_fix();
-}
-
-static void console_cursor_set_position(int row, int col)
-{
-	if (console_row != -1)
-		console_row = row;
-	if (console_col != -1)
-		console_col = col;
-	console_cursor_fix();
-}
-
-static void console_previousline(int n)
-{
-	/* FIXME: also scroll terminal ? */
-	console_row -= n;
-	console_cursor_fix();
-}
-
-static void console_swap_colors(void)
-{
-	eorx = fgx;
-	fgx = bgx;
-	bgx = eorx;
-	eorx = fgx ^ bgx;
-}
-
-static inline int console_cursor_is_visible(void)
-{
-	return !ansi_cursor_hidden;
-}
-#else
-static inline int console_cursor_is_visible(void)
-{
-	return 1;
-}
-#endif
-
-static void console_newline(int n)
-{
-	console_row += n;
-	console_col = 0;
-
-	/* Check if we need to scroll the terminal */
-	if (console_row >= CONSOLE_ROWS) {
-		/* Scroll everything up */
-		console_scrollup();
-	}
-}
-
-static void console_cr(void)
-{
-	console_col = 0;
-}
-
-static void parse_putc(const char c)
-{
-	static int nl = 1;
-
-	if (console_cursor_is_visible())
-		CURSOR_OFF;
-
-	switch (c) {
-	case 13:		/* back to first column */
-		console_cr();
-		break;
-
-	case '\n':		/* next line */
-		if (console_col || nl)
-			console_newline(1);
-		nl = 1;
-		break;
-
-	case 9:		/* tab 8 */
-		console_col |= 0x0008;
-		console_col &= ~0x0007;
-
-		if (console_col >= CONSOLE_COLS)
-			console_newline(1);
-		break;
-
-	case 8:		/* backspace */
-		console_back();
-		break;
-
-	case 7:		/* bell */
-		break;	/* ignored */
-
-	default:		/* draw the char */
-		video_putchar(console_col * VIDEO_FONT_WIDTH,
-			      console_row * VIDEO_FONT_HEIGHT, c);
-		console_col++;
-
-		/* check for newline */
-		if (console_col >= CONSOLE_COLS) {
-			console_newline(1);
-			nl = 0;
-		}
-	}
-
-	if (console_cursor_is_visible())
-		CURSOR_SET;
-}
-
-static void cfb_video_putc(struct stdio_dev *dev, const char c)
-{
-#ifdef CONFIG_CFB_CONSOLE_ANSI
-	int i;
-
-	if (c == 27) {
-		for (i = 0; i < ansi_buf_size; ++i)
-			parse_putc(ansi_buf[i]);
-		ansi_buf[0] = 27;
-		ansi_buf_size = 1;
-		return;
-	}
-
-	if (ansi_buf_size > 0) {
-		/*
-		 * 0 - ESC
-		 * 1 - [
-		 * 2 - num1
-		 * 3 - ..
-		 * 4 - ;
-		 * 5 - num2
-		 * 6 - ..
-		 * - cchar
-		 */
-		int next = 0;
-
-		int flush = 0;
-		int fail = 0;
-
-		int num1 = 0;
-		int num2 = 0;
-		int cchar = 0;
-
-		ansi_buf[ansi_buf_size++] = c;
-
-		if (ansi_buf_size >= sizeof(ansi_buf))
-			fail = 1;
-
-		for (i = 0; i < ansi_buf_size; ++i) {
-			if (fail)
-				break;
-
-			switch (next) {
-			case 0:
-				if (ansi_buf[i] == 27)
-					next = 1;
-				else
-					fail = 1;
-				break;
-
-			case 1:
-				if (ansi_buf[i] == '[')
-					next = 2;
-				else
-					fail = 1;
-				break;
-
-			case 2:
-				if (ansi_buf[i] >= '0' && ansi_buf[i] <= '9') {
-					num1 = ansi_buf[i]-'0';
-					next = 3;
-				} else if (ansi_buf[i] != '?') {
-					--i;
-					num1 = 1;
-					next = 4;
-				}
-				break;
-
-			case 3:
-				if (ansi_buf[i] >= '0' && ansi_buf[i] <= '9') {
-					num1 *= 10;
-					num1 += ansi_buf[i]-'0';
-				} else {
-					--i;
-					next = 4;
-				}
-				break;
-
-			case 4:
-				if (ansi_buf[i] != ';') {
-					--i;
-					next = 7;
-				} else
-					next = 5;
-				break;
-
-			case 5:
-				if (ansi_buf[i] >= '0' && ansi_buf[i] <= '9') {
-					num2 = ansi_buf[i]-'0';
-					next = 6;
-				} else
-					fail = 1;
-				break;
-
-			case 6:
-				if (ansi_buf[i] >= '0' && ansi_buf[i] <= '9') {
-					num2 *= 10;
-					num2 += ansi_buf[i]-'0';
-				} else {
-					--i;
-					next = 7;
-				}
-				break;
-
-			case 7:
-				if ((ansi_buf[i] >= 'A' && ansi_buf[i] <= 'H')
-					|| ansi_buf[i] == 'J'
-					|| ansi_buf[i] == 'K'
-					|| ansi_buf[i] == 'h'
-					|| ansi_buf[i] == 'l'
-					|| ansi_buf[i] == 'm') {
-					cchar = ansi_buf[i];
-					flush = 1;
-				} else
-					fail = 1;
-				break;
-			}
-		}
-
-		if (fail) {
-			for (i = 0; i < ansi_buf_size; ++i)
-				parse_putc(ansi_buf[i]);
-			ansi_buf_size = 0;
-			return;
-		}
-
-		if (flush) {
-			if (!ansi_cursor_hidden)
-				CURSOR_OFF;
-			ansi_buf_size = 0;
-			switch (cchar) {
-			case 'A':
-				/* move cursor num1 rows up */
-				console_cursor_up(num1);
-				break;
-			case 'B':
-				/* move cursor num1 rows down */
-				console_cursor_down(num1);
-				break;
-			case 'C':
-				/* move cursor num1 columns forward */
-				console_cursor_right(num1);
-				break;
-			case 'D':
-				/* move cursor num1 columns back */
-				console_cursor_left(num1);
-				break;
-			case 'E':
-				/* move cursor num1 rows up at begin of row */
-				console_previousline(num1);
-				break;
-			case 'F':
-				/* move cursor num1 rows down at begin of row */
-				console_newline(num1);
-				break;
-			case 'G':
-				/* move cursor to column num1 */
-				console_cursor_set_position(-1, num1-1);
-				break;
-			case 'H':
-				/* move cursor to row num1, column num2 */
-				console_cursor_set_position(num1-1, num2-1);
-				break;
-			case 'J':
-				/* clear console and move cursor to 0, 0 */
-				console_clear();
-				console_cursor_set_position(0, 0);
-				break;
-			case 'K':
-				/* clear line */
-				if (num1 == 0)
-					console_clear_line(console_row,
-							console_col,
-							CONSOLE_COLS-1);
-				else if (num1 == 1)
-					console_clear_line(console_row,
-							0, console_col);
-				else
-					console_clear_line(console_row,
-							0, CONSOLE_COLS-1);
-				break;
-			case 'h':
-				ansi_cursor_hidden = 0;
-				break;
-			case 'l':
-				ansi_cursor_hidden = 1;
-				break;
-			case 'm':
-				if (num1 == 0) { /* reset swapped colors */
-					if (ansi_colors_need_revert) {
-						console_swap_colors();
-						ansi_colors_need_revert = 0;
-					}
-				} else if (num1 == 7) { /* once swap colors */
-					if (!ansi_colors_need_revert) {
-						console_swap_colors();
-						ansi_colors_need_revert = 1;
-					}
-				}
-				break;
-			}
-			if (!ansi_cursor_hidden)
-				CURSOR_SET;
-		}
-	} else {
-		parse_putc(c);
-	}
-#else
-	parse_putc(c);
-#endif
-	if (cfb_do_flush_cache)
-		flush_cache(VIDEO_FB_ADRS, VIDEO_SIZE);
-}
-
-static void cfb_video_puts(struct stdio_dev *dev, const char *s)
-{
-	int flush = cfb_do_flush_cache;
-	int count = strlen(s);
-
-	/* temporarily disable cache flush */
-	cfb_do_flush_cache = 0;
-
-	while (count--)
-		cfb_video_putc(dev, *s++);
-
-	if (flush) {
-		cfb_do_flush_cache = flush;
-		flush_cache(VIDEO_FB_ADRS, VIDEO_SIZE);
-	}
-}
-
-/*
- * Do not enforce drivers (or board code) to provide empty
- * video_set_lut() if they do not support 8 bpp format.
- * Implement weak default function instead.
- */
-__weak void video_set_lut(unsigned int index, unsigned char r,
-		     unsigned char g, unsigned char b)
-{
-}
-
-#if defined(CONFIG_CMD_BMP) || defined(CONFIG_SPLASH_SCREEN)
-
-#define FILL_8BIT_332RGB(r,g,b)	{			\
-	*fb = ((r>>5)<<5) | ((g>>5)<<2) | (b>>6);	\
-	fb ++;						\
-}
-
-#define FILL_15BIT_555RGB(r,g,b) {			\
-	*(unsigned short *)fb =				\
-		SWAP16((unsigned short)(((r>>3)<<10) |	\
-					((g>>3)<<5)  |	\
-					 (b>>3)));	\
-	fb += 2;					\
-}
-
-#define FILL_16BIT_565RGB(r,g,b) {			\
-	*(unsigned short *)fb =				\
-		SWAP16((unsigned short)((((r)>>3)<<11)| \
-					(((g)>>2)<<5) | \
-					 ((b)>>3)));	\
-	fb += 2;					\
-}
-
-#define FILL_32BIT_X888RGB(r,g,b) {			\
-	*(u32 *)fb =				\
-		SWAP32((unsigned int)(((r<<16) |	\
-					(g<<8)  |	\
-					 b)));		\
-	fb += 4;					\
-}
-
-#ifdef VIDEO_FB_LITTLE_ENDIAN
-#define FILL_24BIT_888RGB(r,g,b) {			\
-	fb[0] = b;					\
-	fb[1] = g;					\
-	fb[2] = r;					\
-	fb += 3;					\
-}
-#else
-#define FILL_24BIT_888RGB(r,g,b) {			\
-	fb[0] = r;					\
-	fb[1] = g;					\
-	fb[2] = b;					\
-	fb += 3;					\
-}
-#endif
-
-#if defined(VIDEO_FB_16BPP_PIXEL_SWAP)
-static inline void fill_555rgb_pswap(uchar *fb, int x, u8 r, u8 g, u8 b)
-{
-	ushort *dst = (ushort *) fb;
-	ushort color = (ushort) (((r >> 3) << 10) |
-				 ((g >> 3) <<  5) |
-				  (b >> 3));
-	if (x & 1)
-		*(--dst) = color;
-	else
-		*(++dst) = color;
-}
-#endif
-
-/*
- * RLE8 bitmap support
- */
-
-#ifdef CONFIG_VIDEO_BMP_RLE8
-/* Pre-calculated color table entry */
-struct palette {
-	union {
-		unsigned short w;	/* word */
-		unsigned int dw;	/* double word */
-	} ce;				/* color entry */
-};
-
-/*
- * Helper to draw encoded/unencoded run.
- */
-static void draw_bitmap(uchar **fb, uchar *bm, struct palette *p,
-			int cnt, int enc)
-{
-	ulong addr = (ulong) *fb;
-	int *off;
-	int enc_off = 1;
-	int i;
-
-	/*
-	 * Setup offset of the color index in the bitmap.
-	 * Color index of encoded run is at offset 1.
-	 */
-	off = enc ? &enc_off : &i;
-
-	switch (VIDEO_DATA_FORMAT) {
-	case GDF__8BIT_INDEX:
-		for (i = 0; i < cnt; i++)
-			*(unsigned char *) addr++ = bm[*off];
-		break;
-	case GDF_15BIT_555RGB:
-	case GDF_16BIT_565RGB:
-		/* differences handled while pre-calculating palette */
-		for (i = 0; i < cnt; i++) {
-			*(unsigned short *) addr = p[bm[*off]].ce.w;
-			addr += 2;
-		}
-		break;
-	case GDF_32BIT_X888RGB:
-		for (i = 0; i < cnt; i++) {
-			*(u32 *) addr = p[bm[*off]].ce.dw;
-			addr += 4;
-		}
-		break;
-	}
-	*fb = (uchar *) addr;	/* return modified address */
-}
-
-static int display_rle8_bitmap(struct bmp_image *img, int xoff, int yoff,
-			       int width, int height)
-{
-	unsigned char *bm;
-	unsigned char *fbp;
-	unsigned int cnt, runlen;
-	int decode = 1;
-	int x, y, bpp, i, ncolors;
-	struct palette p[256];
-	struct bmp_color_table_entry cte;
-	int green_shift, red_off;
-	int limit = (VIDEO_LINE_LEN / VIDEO_PIXEL_SIZE) * VIDEO_ROWS;
-	int pixels = 0;
-
-	x = 0;
-	y = __le32_to_cpu(img->header.height) - 1;
-	ncolors = __le32_to_cpu(img->header.colors_used);
-	bpp = VIDEO_PIXEL_SIZE;
-	fbp = (unsigned char *) ((unsigned int) video_fb_address +
-				 (y + yoff) * VIDEO_LINE_LEN +
-				 xoff * bpp);
-
-	bm = (uchar *) img + __le32_to_cpu(img->header.data_offset);
-
-	/* pre-calculate and setup palette */
-	switch (VIDEO_DATA_FORMAT) {
-	case GDF__8BIT_INDEX:
-		for (i = 0; i < ncolors; i++) {
-			cte = img->color_table[i];
-			video_set_lut(i, cte.red, cte.green, cte.blue);
-		}
-		break;
-	case GDF_15BIT_555RGB:
-	case GDF_16BIT_565RGB:
-		if (VIDEO_DATA_FORMAT == GDF_15BIT_555RGB) {
-			green_shift = 3;
-			red_off = 10;
-		} else {
-			green_shift = 2;
-			red_off = 11;
-		}
-		for (i = 0; i < ncolors; i++) {
-			cte = img->color_table[i];
-			p[i].ce.w = SWAP16((unsigned short)
-					   (((cte.red >> 3) << red_off) |
-					    ((cte.green >> green_shift) << 5) |
-					    cte.blue >> 3));
-		}
-		break;
-	case GDF_32BIT_X888RGB:
-		for (i = 0; i < ncolors; i++) {
-			cte = img->color_table[i];
-			p[i].ce.dw = SWAP32((cte.red << 16) |
-					    (cte.green << 8) |
-					     cte.blue);
-		}
-		break;
-	default:
-		printf("RLE Bitmap unsupported in video mode 0x%x\n",
-		       VIDEO_DATA_FORMAT);
-		return -1;
-	}
-
-	while (decode) {
-		switch (bm[0]) {
-		case 0:
-			switch (bm[1]) {
-			case 0:
-				/* scan line end marker */
-				bm += 2;
-				x = 0;
-				y--;
-				fbp = (unsigned char *)
-					((unsigned int) video_fb_address +
-					 (y + yoff) * VIDEO_LINE_LEN +
-					 xoff * bpp);
-				continue;
-			case 1:
-				/* end of bitmap data marker */
-				decode = 0;
-				break;
-			case 2:
-				/* run offset marker */
-				x += bm[2];
-				y -= bm[3];
-				fbp = (unsigned char *)
-					((unsigned int) video_fb_address +
-					 (y + yoff) * VIDEO_LINE_LEN +
-					 xoff * bpp);
-				bm += 4;
-				break;
-			default:
-				/* unencoded run */
-				cnt = bm[1];
-				runlen = cnt;
-				pixels += cnt;
-				if (pixels > limit)
-					goto error;
-
-				bm += 2;
-				if (y < height) {
-					if (x >= width) {
-						x += runlen;
-						goto next_run;
-					}
-					if (x + runlen > width)
-						cnt = width - x;
-					draw_bitmap(&fbp, bm, p, cnt, 0);
-					x += runlen;
-				}
-next_run:
-				bm += runlen;
-				if (runlen & 1)
-					bm++;	/* 0 padding if length is odd */
-			}
-			break;
-		default:
-			/* encoded run */
-			cnt = bm[0];
-			runlen = cnt;
-			pixels += cnt;
-			if (pixels > limit)
-				goto error;
-
-			if (y < height) {     /* only draw into visible area */
-				if (x >= width) {
-					x += runlen;
-					bm += 2;
-					continue;
-				}
-				if (x + runlen > width)
-					cnt = width - x;
-				draw_bitmap(&fbp, bm, p, cnt, 1);
-				x += runlen;
-			}
-			bm += 2;
-			break;
-		}
-	}
-
-	if (cfb_do_flush_cache)
-		flush_cache(VIDEO_FB_ADRS, VIDEO_SIZE);
-
-	return 0;
-error:
-	printf("Error: Too much encoded pixel data, validate your bitmap\n");
-	return -1;
-}
-#endif
-
-/*
- * Display the BMP file located at address bmp_image.
- */
-int video_display_bitmap(ulong bmp_image, int x, int y)
-{
-	ushort xcount, ycount;
-	uchar *fb;
-	struct bmp_image *bmp = (struct bmp_image *)bmp_image;
-	uchar *bmap;
-	ushort padded_line;
-	unsigned long width, height, bpp;
-	unsigned colors;
-	unsigned long compression;
-	struct bmp_color_table_entry cte;
-
-#ifdef CONFIG_VIDEO_BMP_GZIP
-	unsigned char *dst = NULL;
-	ulong len;
-#endif
-
-	WATCHDOG_RESET();
-
-	if (!((bmp->header.signature[0] == 'B') &&
-	      (bmp->header.signature[1] == 'M'))) {
-
-#ifdef CONFIG_VIDEO_BMP_GZIP
-		/*
-		 * Could be a gzipped bmp image, try to decrompress...
-		 */
-		len = CONFIG_SYS_VIDEO_LOGO_MAX_SIZE;
-		dst = malloc(CONFIG_SYS_VIDEO_LOGO_MAX_SIZE);
-		if (dst == NULL) {
-			printf("Error: malloc in gunzip failed!\n");
-			return 1;
-		}
-		/*
-		 * NB: we need to force offset of +2
-		 * See doc/README.displaying-bmps
-		 */
-		if (gunzip(dst+2, CONFIG_SYS_VIDEO_LOGO_MAX_SIZE-2,
-			   (uchar *) bmp_image,
-			   &len) != 0) {
-			printf("Error: no valid bmp or bmp.gz image at %lx\n",
-			       bmp_image);
-			free(dst);
-			return 1;
-		}
-		if (len == CONFIG_SYS_VIDEO_LOGO_MAX_SIZE) {
-			printf("Image could be truncated "
-				"(increase CONFIG_SYS_VIDEO_LOGO_MAX_SIZE)!\n");
-		}
-
-		/*
-		 * Set addr to decompressed image
-		 */
-		bmp = (struct bmp_image *)(dst+2);
-
-		if (!((bmp->header.signature[0] == 'B') &&
-		      (bmp->header.signature[1] == 'M'))) {
-			printf("Error: no valid bmp.gz image at %lx\n",
-			       bmp_image);
-			free(dst);
-			return 1;
-		}
-#else
-		printf("Error: no valid bmp image at %lx\n", bmp_image);
-		return 1;
-#endif /* CONFIG_VIDEO_BMP_GZIP */
-	}
-
-	width = le32_to_cpu(bmp->header.width);
-	height = le32_to_cpu(bmp->header.height);
-	bpp = le16_to_cpu(bmp->header.bit_count);
-	colors = le32_to_cpu(bmp->header.colors_used);
-	compression = le32_to_cpu(bmp->header.compression);
-
-	debug("Display-bmp: %ld x %ld  with %d colors\n",
-	      width, height, colors);
-
-	if (compression != BMP_BI_RGB
-#ifdef CONFIG_VIDEO_BMP_RLE8
-	    && compression != BMP_BI_RLE8
-#endif
-		) {
-		printf("Error: compression type %ld not supported\n",
-		       compression);
-#ifdef CONFIG_VIDEO_BMP_GZIP
-		if (dst)
-			free(dst);
-#endif
-		return 1;
-	}
-
-	padded_line = (((width * bpp + 7) / 8) + 3) & ~0x3;
-
-#ifdef CONFIG_SPLASH_SCREEN_ALIGN
-	if (x == BMP_ALIGN_CENTER)
-		x = max(0, (int)(VIDEO_VISIBLE_COLS - width) / 2);
-	else if (x < 0)
-		x = max(0, (int)(VIDEO_VISIBLE_COLS - width + x + 1));
-
-	if (y == BMP_ALIGN_CENTER)
-		y = max(0, (int)(VIDEO_VISIBLE_ROWS - height) / 2);
-	else if (y < 0)
-		y = max(0, (int)(VIDEO_VISIBLE_ROWS - height + y + 1));
-#endif /* CONFIG_SPLASH_SCREEN_ALIGN */
-
-	/*
-	 * Just ignore elements which are completely beyond screen
-	 * dimensions.
-	 */
-	if ((x >= VIDEO_VISIBLE_COLS) || (y >= VIDEO_VISIBLE_ROWS))
-		return 0;
-
-	if ((x + width) > VIDEO_VISIBLE_COLS)
-		width = VIDEO_VISIBLE_COLS - x;
-	if ((y + height) > VIDEO_VISIBLE_ROWS)
-		height = VIDEO_VISIBLE_ROWS - y;
-
-	bmap = (uchar *) bmp + le32_to_cpu(bmp->header.data_offset);
-	fb = (uchar *) (video_fb_address +
-			((y + height - 1) * VIDEO_LINE_LEN) +
-			x * VIDEO_PIXEL_SIZE);
-
-#ifdef CONFIG_VIDEO_BMP_RLE8
-	if (compression == BMP_BI_RLE8) {
-		return display_rle8_bitmap(bmp, x, y, width, height);
-	}
-#endif
-
-	/* We handle only 4, 8, or 24 bpp bitmaps */
-	switch (le16_to_cpu(bmp->header.bit_count)) {
-	case 4:
-		padded_line -= width / 2;
-		ycount = height;
-
-		switch (VIDEO_DATA_FORMAT) {
-		case GDF_32BIT_X888RGB:
-			while (ycount--) {
-				WATCHDOG_RESET();
-				/*
-				 * Don't assume that 'width' is an
-				 * even number
-				 */
-				for (xcount = 0; xcount < width; xcount++) {
-					uchar idx;
-
-					if (xcount & 1) {
-						idx = *bmap & 0xF;
-						bmap++;
-					} else
-						idx = *bmap >> 4;
-					cte = bmp->color_table[idx];
-					FILL_32BIT_X888RGB(cte.red, cte.green,
-							   cte.blue);
-				}
-				bmap += padded_line;
-				fb -= VIDEO_LINE_LEN + width *
-					VIDEO_PIXEL_SIZE;
-			}
-			break;
-		default:
-			puts("4bpp bitmap unsupported with current "
-			     "video mode\n");
-			break;
-		}
-		break;
-
-	case 8:
-		padded_line -= width;
-		if (VIDEO_DATA_FORMAT == GDF__8BIT_INDEX) {
-			/* Copy colormap */
-			for (xcount = 0; xcount < colors; ++xcount) {
-				cte = bmp->color_table[xcount];
-				video_set_lut(xcount, cte.red, cte.green,
-					      cte.blue);
-			}
-		}
-		ycount = height;
-		switch (VIDEO_DATA_FORMAT) {
-		case GDF__8BIT_INDEX:
-			while (ycount--) {
-				WATCHDOG_RESET();
-				xcount = width;
-				while (xcount--) {
-					*fb++ = *bmap++;
-				}
-				bmap += padded_line;
-				fb -= VIDEO_LINE_LEN + width *
-					VIDEO_PIXEL_SIZE;
-			}
-			break;
-		case GDF__8BIT_332RGB:
-			while (ycount--) {
-				WATCHDOG_RESET();
-				xcount = width;
-				while (xcount--) {
-					cte = bmp->color_table[*bmap++];
-					FILL_8BIT_332RGB(cte.red, cte.green,
-							 cte.blue);
-				}
-				bmap += padded_line;
-				fb -= VIDEO_LINE_LEN + width *
-					VIDEO_PIXEL_SIZE;
-			}
-			break;
-		case GDF_15BIT_555RGB:
-			while (ycount--) {
-#if defined(VIDEO_FB_16BPP_PIXEL_SWAP)
-				int xpos = x;
-#endif
-				WATCHDOG_RESET();
-				xcount = width;
-				while (xcount--) {
-					cte = bmp->color_table[*bmap++];
-#if defined(VIDEO_FB_16BPP_PIXEL_SWAP)
-					fill_555rgb_pswap(fb, xpos++, cte.red,
-							  cte.green,
-							  cte.blue);
-					fb += 2;
-#else
-					FILL_15BIT_555RGB(cte.red, cte.green,
-							  cte.blue);
-#endif
-				}
-				bmap += padded_line;
-				fb -= VIDEO_LINE_LEN + width *
-					VIDEO_PIXEL_SIZE;
-			}
-			break;
-		case GDF_16BIT_565RGB:
-			while (ycount--) {
-				WATCHDOG_RESET();
-				xcount = width;
-				while (xcount--) {
-					cte = bmp->color_table[*bmap++];
-					FILL_16BIT_565RGB(cte.red, cte.green,
-							  cte.blue);
-				}
-				bmap += padded_line;
-				fb -= VIDEO_LINE_LEN + width *
-					VIDEO_PIXEL_SIZE;
-			}
-			break;
-		case GDF_32BIT_X888RGB:
-			while (ycount--) {
-				WATCHDOG_RESET();
-				xcount = width;
-				while (xcount--) {
-					cte = bmp->color_table[*bmap++];
-					FILL_32BIT_X888RGB(cte.red, cte.green,
-							   cte.blue);
-				}
-				bmap += padded_line;
-				fb -= VIDEO_LINE_LEN + width *
-					VIDEO_PIXEL_SIZE;
-			}
-			break;
-		case GDF_24BIT_888RGB:
-			while (ycount--) {
-				WATCHDOG_RESET();
-				xcount = width;
-				while (xcount--) {
-					cte = bmp->color_table[*bmap++];
-					FILL_24BIT_888RGB(cte.red, cte.green,
-							  cte.blue);
-				}
-				bmap += padded_line;
-				fb -= VIDEO_LINE_LEN + width *
-					VIDEO_PIXEL_SIZE;
-			}
-			break;
-		}
-		break;
-	case 24:
-		padded_line -= 3 * width;
-		ycount = height;
-		switch (VIDEO_DATA_FORMAT) {
-		case GDF__8BIT_332RGB:
-			while (ycount--) {
-				WATCHDOG_RESET();
-				xcount = width;
-				while (xcount--) {
-					FILL_8BIT_332RGB(bmap[2], bmap[1],
-							 bmap[0]);
-					bmap += 3;
-				}
-				bmap += padded_line;
-				fb -= VIDEO_LINE_LEN + width *
-					VIDEO_PIXEL_SIZE;
-			}
-			break;
-		case GDF_15BIT_555RGB:
-			while (ycount--) {
-#if defined(VIDEO_FB_16BPP_PIXEL_SWAP)
-				int xpos = x;
-#endif
-				WATCHDOG_RESET();
-				xcount = width;
-				while (xcount--) {
-#if defined(VIDEO_FB_16BPP_PIXEL_SWAP)
-					fill_555rgb_pswap(fb, xpos++, bmap[2],
-							  bmap[1], bmap[0]);
-					fb += 2;
-#else
-					FILL_15BIT_555RGB(bmap[2], bmap[1],
-							  bmap[0]);
-#endif
-					bmap += 3;
-				}
-				bmap += padded_line;
-				fb -= VIDEO_LINE_LEN + width *
-					VIDEO_PIXEL_SIZE;
-			}
-			break;
-		case GDF_16BIT_565RGB:
-			while (ycount--) {
-				WATCHDOG_RESET();
-				xcount = width;
-				while (xcount--) {
-					FILL_16BIT_565RGB(bmap[2], bmap[1],
-							  bmap[0]);
-					bmap += 3;
-				}
-				bmap += padded_line;
-				fb -= VIDEO_LINE_LEN + width *
-					VIDEO_PIXEL_SIZE;
-			}
-			break;
-		case GDF_32BIT_X888RGB:
-			while (ycount--) {
-				WATCHDOG_RESET();
-				xcount = width;
-				while (xcount--) {
-					FILL_32BIT_X888RGB(bmap[2], bmap[1],
-							   bmap[0]);
-					bmap += 3;
-				}
-				bmap += padded_line;
-				fb -= VIDEO_LINE_LEN + width *
-					VIDEO_PIXEL_SIZE;
-			}
-			break;
-		case GDF_24BIT_888RGB:
-			while (ycount--) {
-				WATCHDOG_RESET();
-				xcount = width;
-				while (xcount--) {
-					FILL_24BIT_888RGB(bmap[2], bmap[1],
-							  bmap[0]);
-					bmap += 3;
-				}
-				bmap += padded_line;
-				fb -= VIDEO_LINE_LEN + width *
-					VIDEO_PIXEL_SIZE;
-			}
-			break;
-		default:
-			printf("Error: 24 bits/pixel bitmap incompatible "
-				"with current video mode\n");
-			break;
-		}
-		break;
-	default:
-		printf("Error: %d bit/pixel bitmaps not supported by U-Boot\n",
-			le16_to_cpu(bmp->header.bit_count));
-		break;
-	}
-
-#ifdef CONFIG_VIDEO_BMP_GZIP
-	if (dst) {
-		free(dst);
-	}
-#endif
-
-	if (cfb_do_flush_cache)
-		flush_cache(VIDEO_FB_ADRS, VIDEO_SIZE);
-	return (0);
-}
-#endif
-
-static int cfb_fb_is_in_dram(void)
-{
-	struct bd_info *bd = gd->bd;
-	ulong start, end;
-	int i;
-
-	for (i = 0; i < CONFIG_NR_DRAM_BANKS; ++i) {
-		start = bd->bi_dram[i].start;
-		end = bd->bi_dram[i].start + bd->bi_dram[i].size - 1;
-		if ((ulong)video_fb_address >= start &&
-		    (ulong)video_fb_address < end)
-			return 1;
-	}
-
-	return 0;
-}
-
-void video_clear(void)
-{
-	if (!video_fb_address)
-		return;
-#ifdef VIDEO_HW_RECTFILL
-	video_hw_rectfill(VIDEO_PIXEL_SIZE,	/* bytes per pixel */
-			  0,			/* dest pos x */
-			  0,			/* dest pos y */
-			  VIDEO_VISIBLE_COLS,	/* frame width */
-			  VIDEO_VISIBLE_ROWS,	/* frame height */
-			  bgx			/* fill color */
-	);
-#else
-	memsetl(video_fb_address,
-		(VIDEO_VISIBLE_ROWS * VIDEO_LINE_LEN) / sizeof(int), bgx);
-#endif
-}
-
-static int cfg_video_init(void)
-{
-	unsigned char color8;
-
-	pGD = video_hw_init();
-	if (pGD == NULL)
-		return -1;
-
-	video_fb_address = (void *) VIDEO_FB_ADRS;
-
-	cfb_do_flush_cache = cfb_fb_is_in_dram() && dcache_status();
-
-	/* Init drawing pats */
-	switch (VIDEO_DATA_FORMAT) {
-	case GDF__8BIT_INDEX:
-		video_set_lut(0x01, CONFIG_SYS_CONSOLE_FG_COL,
-			      CONFIG_SYS_CONSOLE_FG_COL,
-			      CONFIG_SYS_CONSOLE_FG_COL);
-		video_set_lut(0x00, CONFIG_SYS_CONSOLE_BG_COL,
-			      CONFIG_SYS_CONSOLE_BG_COL,
-			      CONFIG_SYS_CONSOLE_BG_COL);
-		fgx = 0x01010101;
-		bgx = 0x00000000;
-		break;
-	case GDF__8BIT_332RGB:
-		color8 = ((CONFIG_SYS_CONSOLE_FG_COL & 0xe0) |
-			  ((CONFIG_SYS_CONSOLE_FG_COL >> 3) & 0x1c) |
-			  CONFIG_SYS_CONSOLE_FG_COL >> 6);
-		fgx = (color8 << 24) | (color8 << 16) | (color8 << 8) |
-			color8;
-		color8 = ((CONFIG_SYS_CONSOLE_BG_COL & 0xe0) |
-			  ((CONFIG_SYS_CONSOLE_BG_COL >> 3) & 0x1c) |
-			  CONFIG_SYS_CONSOLE_BG_COL >> 6);
-		bgx = (color8 << 24) | (color8 << 16) | (color8 << 8) |
-			color8;
-		break;
-	case GDF_15BIT_555RGB:
-		fgx = (((CONFIG_SYS_CONSOLE_FG_COL >> 3) << 26) |
-		       ((CONFIG_SYS_CONSOLE_FG_COL >> 3) << 21) |
-		       ((CONFIG_SYS_CONSOLE_FG_COL >> 3) << 16) |
-		       ((CONFIG_SYS_CONSOLE_FG_COL >> 3) << 10) |
-		       ((CONFIG_SYS_CONSOLE_FG_COL >> 3) <<  5) |
-			(CONFIG_SYS_CONSOLE_FG_COL >> 3));
-		bgx = (((CONFIG_SYS_CONSOLE_BG_COL >> 3) << 26) |
-		       ((CONFIG_SYS_CONSOLE_BG_COL >> 3) << 21) |
-		       ((CONFIG_SYS_CONSOLE_BG_COL >> 3) << 16) |
-		       ((CONFIG_SYS_CONSOLE_BG_COL >> 3) << 10) |
-		       ((CONFIG_SYS_CONSOLE_BG_COL >> 3) <<  5) |
-			(CONFIG_SYS_CONSOLE_BG_COL >> 3));
-		break;
-	case GDF_16BIT_565RGB:
-		fgx = (((CONFIG_SYS_CONSOLE_FG_COL >> 3) << 27) |
-		       ((CONFIG_SYS_CONSOLE_FG_COL >> 2) << 21) |
-		       ((CONFIG_SYS_CONSOLE_FG_COL >> 3) << 16) |
-		       ((CONFIG_SYS_CONSOLE_FG_COL >> 3) << 11) |
-		       ((CONFIG_SYS_CONSOLE_FG_COL >> 2) <<  5) |
-			(CONFIG_SYS_CONSOLE_FG_COL >> 3));
-		bgx = (((CONFIG_SYS_CONSOLE_BG_COL >> 3) << 27) |
-		       ((CONFIG_SYS_CONSOLE_BG_COL >> 2) << 21) |
-		       ((CONFIG_SYS_CONSOLE_BG_COL >> 3) << 16) |
-		       ((CONFIG_SYS_CONSOLE_BG_COL >> 3) << 11) |
-		       ((CONFIG_SYS_CONSOLE_BG_COL >> 2) <<  5) |
-			(CONFIG_SYS_CONSOLE_BG_COL >> 3));
-		break;
-	case GDF_32BIT_X888RGB:
-		fgx =	(CONFIG_SYS_CONSOLE_FG_COL << 16) |
-			(CONFIG_SYS_CONSOLE_FG_COL <<  8) |
-			 CONFIG_SYS_CONSOLE_FG_COL;
-		bgx =	(CONFIG_SYS_CONSOLE_BG_COL << 16) |
-			(CONFIG_SYS_CONSOLE_BG_COL <<  8) |
-			 CONFIG_SYS_CONSOLE_BG_COL;
-		break;
-	case GDF_24BIT_888RGB:
-		fgx =	(CONFIG_SYS_CONSOLE_FG_COL << 24) |
-			(CONFIG_SYS_CONSOLE_FG_COL << 16) |
-			(CONFIG_SYS_CONSOLE_FG_COL <<  8) |
-			 CONFIG_SYS_CONSOLE_FG_COL;
-		bgx =	(CONFIG_SYS_CONSOLE_BG_COL << 24) |
-			(CONFIG_SYS_CONSOLE_BG_COL << 16) |
-			(CONFIG_SYS_CONSOLE_BG_COL <<  8) |
-			 CONFIG_SYS_CONSOLE_BG_COL;
-		break;
-	}
-	eorx = fgx ^ bgx;
-
-	if (!CONFIG_IS_ENABLED(NO_FB_CLEAR))
-		video_clear();
-
-#ifdef CONFIG_VIDEO_LOGO
-	/* Plot the logo and get start point of console */
-	debug("Video: Drawing the logo ...\n");
-	video_console_address = video_logo();
-#else
-	video_console_address = video_fb_address;
-#endif
-
-	/* Initialize the console */
-	console_col = 0;
-	console_row = 0;
-
-	if (cfb_do_flush_cache)
-		flush_cache(VIDEO_FB_ADRS, VIDEO_SIZE);
-
-	return 0;
-}
-
-/*
- * Implement a weak default function for boards that optionally
- * need to skip the video initialization.
- */
-__weak int board_video_skip(void)
-{
-	/* As default, don't skip test */
-	return 0;
-}
-
-int drv_video_init(void)
-{
-	struct stdio_dev console_dev;
-	bool have_keyboard;
-	bool __maybe_unused keyboard_ok = false;
-
-	/* Check if video initialization should be skipped */
-	if (board_video_skip())
-		return 0;
-
-	/* Init video chip - returns with framebuffer cleared */
-	if (cfg_video_init() == -1)
-		return 0;
-
-	if (board_cfb_skip())
-		return 0;
-
-#if defined(CONFIG_VGA_AS_SINGLE_DEVICE)
-	have_keyboard = false;
-#elif defined(CONFIG_OF_CONTROL)
-	have_keyboard = !ofnode_conf_read_bool("u-boot,no-keyboard");
-#else
-	have_keyboard = true;
-#endif
-	if (have_keyboard) {
-		debug("KBD: Keyboard init ...\n");
-#if !defined(CONFIG_VGA_AS_SINGLE_DEVICE)
-		keyboard_ok = !(VIDEO_KBD_INIT_FCT == -1);
-#endif
-	}
-
-	/* Init vga device */
-	memset(&console_dev, 0, sizeof(console_dev));
-	strcpy(console_dev.name, "vga");
-	console_dev.flags = DEV_FLAGS_OUTPUT;
-	console_dev.putc = cfb_video_putc;	/* 'putc' function */
-	console_dev.puts = cfb_video_puts;	/* 'puts' function */
-
-#if !defined(CONFIG_VGA_AS_SINGLE_DEVICE)
-	if (have_keyboard && keyboard_ok) {
-		/* Also init console device */
-		console_dev.flags |= DEV_FLAGS_INPUT;
-		console_dev.tstc = VIDEO_TSTC_FCT;	/* 'tstc' function */
-		console_dev.getc = VIDEO_GETC_FCT;	/* 'getc' function */
-	}
-#endif
-
-	if (stdio_register(&console_dev) != 0)
-		return 0;
-
-	/* Return success */
-	return 1;
-}
-
-void video_position_cursor(unsigned col, unsigned row)
-{
-	console_col = min(col, CONSOLE_COLS - 1);
-	console_row = min(row, CONSOLE_ROWS - 1);
-}
-
-int video_get_pixel_width(void)
-{
-	return VIDEO_VISIBLE_COLS;
-}
-
-int video_get_pixel_height(void)
-{
-	return VIDEO_VISIBLE_ROWS;
-}
-
-int video_get_screen_rows(void)
-{
-	return CONSOLE_ROWS;
-}
-
-int video_get_screen_columns(void)
-{
-	return CONSOLE_COLS;
-}
diff --git a/drivers/video/da8xx-fb.c b/drivers/video/da8xx-fb.c
deleted file mode 100644
index 462c318..0000000
--- a/drivers/video/da8xx-fb.c
+++ /dev/null
@@ -1,1048 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0+
-/*
- * Porting to u-boot:
- *
- * (C) Copyright 2011
- * Stefano Babic, DENX Software Engineering, sbabic@denx.de.
- *
- * Copyright (C) 2008-2009 MontaVista Software Inc.
- * Copyright (C) 2008-2009 Texas Instruments Inc
- *
- * Based on the LCD driver for TI Avalanche processors written by
- * Ajay Singh and Shalom Hai.
- */
-
-#include <common.h>
-#include <log.h>
-#include <malloc.h>
-#include <memalign.h>
-#include <video_fb.h>
-#include <asm/global_data.h>
-#include <linux/delay.h>
-#include <linux/list.h>
-#include <linux/fb.h>
-
-#include <linux/errno.h>
-#include <asm/io.h>
-#include <asm/arch/hardware.h>
-
-#include "videomodes.h"
-#include "da8xx-fb.h"
-
-#if !defined(DA8XX_LCD_CNTL_BASE)
-#define DA8XX_LCD_CNTL_BASE	DAVINCI_LCD_CNTL_BASE
-#endif
-
-#define DRIVER_NAME "da8xx_lcdc"
-
-#define LCD_VERSION_1	1
-#define LCD_VERSION_2	2
-
-/* LCD Status Register */
-#define LCD_END_OF_FRAME1		(1 << 9)
-#define LCD_END_OF_FRAME0		(1 << 8)
-#define LCD_PL_LOAD_DONE		(1 << 6)
-#define LCD_FIFO_UNDERFLOW		(1 << 5)
-#define LCD_SYNC_LOST			(1 << 2)
-
-/* LCD DMA Control Register */
-#define LCD_DMA_BURST_SIZE(x)		((x) << 4)
-#define LCD_DMA_BURST_1			0x0
-#define LCD_DMA_BURST_2			0x1
-#define LCD_DMA_BURST_4			0x2
-#define LCD_DMA_BURST_8			0x3
-#define LCD_DMA_BURST_16		0x4
-#define LCD_V1_END_OF_FRAME_INT_ENA	(1 << 2)
-#define LCD_V2_END_OF_FRAME0_INT_ENA	(1 << 8)
-#define LCD_V2_END_OF_FRAME1_INT_ENA	(1 << 9)
-#define LCD_DUAL_FRAME_BUFFER_ENABLE	(1 << 0)
-
-#define LCD_V2_TFT_24BPP_MODE		(1 << 25)
-#define LCD_V2_TFT_24BPP_UNPACK		(1 << 26)
-
-/* LCD Control Register */
-#define LCD_CLK_DIVISOR(x)		((x) << 8)
-#define LCD_RASTER_MODE			0x01
-
-/* LCD Raster Control Register */
-#define LCD_PALETTE_LOAD_MODE(x)	((x) << 20)
-#define PALETTE_AND_DATA		0x00
-#define PALETTE_ONLY			0x01
-#define DATA_ONLY			0x02
-
-#define LCD_MONO_8BIT_MODE		(1 << 9)
-#define LCD_RASTER_ORDER		(1 << 8)
-#define LCD_TFT_MODE			(1 << 7)
-#define LCD_V1_UNDERFLOW_INT_ENA	(1 << 6)
-#define LCD_V2_UNDERFLOW_INT_ENA	(1 << 5)
-#define LCD_V1_PL_INT_ENA		(1 << 4)
-#define LCD_V2_PL_INT_ENA		(1 << 6)
-#define LCD_MONOCHROME_MODE		(1 << 1)
-#define LCD_RASTER_ENABLE		(1 << 0)
-#define LCD_TFT_ALT_ENABLE		(1 << 23)
-#define LCD_STN_565_ENABLE		(1 << 24)
-#define LCD_V2_DMA_CLK_EN		(1 << 2)
-#define LCD_V2_LIDD_CLK_EN		(1 << 1)
-#define LCD_V2_CORE_CLK_EN		(1 << 0)
-#define LCD_V2_LPP_B10			26
-#define LCD_V2_TFT_24BPP_MODE		(1 << 25)
-#define LCD_V2_TFT_24BPP_UNPACK		(1 << 26)
-
-/* LCD Raster Timing 2 Register */
-#define LCD_AC_BIAS_TRANSITIONS_PER_INT(x)	((x) << 16)
-#define LCD_AC_BIAS_FREQUENCY(x)		((x) << 8)
-#define LCD_SYNC_CTRL				(1 << 25)
-#define LCD_SYNC_EDGE				(1 << 24)
-#define LCD_INVERT_PIXEL_CLOCK			(1 << 22)
-#define LCD_INVERT_LINE_CLOCK			(1 << 21)
-#define LCD_INVERT_FRAME_CLOCK			(1 << 20)
-
-/* Clock registers available only on Version 2 */
-#define  LCD_CLK_MAIN_RESET			(1 << 3)
-/* LCD Block */
-struct da8xx_lcd_regs {
-	u32	revid;
-	u32	ctrl;
-	u32	stat;
-	u32	lidd_ctrl;
-	u32	lidd_cs0_conf;
-	u32	lidd_cs0_addr;
-	u32	lidd_cs0_data;
-	u32	lidd_cs1_conf;
-	u32	lidd_cs1_addr;
-	u32	lidd_cs1_data;
-	u32	raster_ctrl;
-	u32	raster_timing_0;
-	u32	raster_timing_1;
-	u32	raster_timing_2;
-	u32	raster_subpanel;
-	u32	reserved;
-	u32	dma_ctrl;
-	u32	dma_frm_buf_base_addr_0;
-	u32	dma_frm_buf_ceiling_addr_0;
-	u32	dma_frm_buf_base_addr_1;
-	u32	dma_frm_buf_ceiling_addr_1;
-	u32	resv1;
-	u32	raw_stat;
-	u32	masked_stat;
-	u32	int_ena_set;
-	u32	int_ena_clr;
-	u32	end_of_int_ind;
-	/* Clock registers available only on Version 2 */
-	u32	clk_ena;
-	u32	clk_reset;
-};
-
-#define LCD_NUM_BUFFERS	1
-
-#define WSI_TIMEOUT	50
-#define PALETTE_SIZE	256
-#define LEFT_MARGIN	64
-#define RIGHT_MARGIN	64
-#define UPPER_MARGIN	32
-#define LOWER_MARGIN	32
-#define WAIT_FOR_FRAME_DONE	true
-#define NO_WAIT_FOR_FRAME_DONE	false
-
-#define calc_fbsize() (panel.plnSizeX * panel.plnSizeY * panel.gdfBytesPP)
-
-static struct da8xx_lcd_regs *da8xx_fb_reg_base;
-
-DECLARE_GLOBAL_DATA_PTR;
-
-/* graphics setup */
-static GraphicDevice gpanel;
-static const struct da8xx_panel *lcd_panel;
-static struct fb_info *da8xx_fb_info;
-static int bits_x_pixel;
-static unsigned int lcd_revision;
-const struct lcd_ctrl_config *da8xx_lcd_cfg;
-
-static inline unsigned int lcdc_read(u32 *addr)
-{
-	return (unsigned int)readl(addr);
-}
-
-static inline void lcdc_write(unsigned int val, u32 *addr)
-{
-	writel(val, addr);
-}
-
-struct da8xx_fb_par {
-	u32			 p_palette_base;
-	unsigned char *v_palette_base;
-	dma_addr_t		vram_phys;
-	unsigned long		vram_size;
-	void			*vram_virt;
-	unsigned int		dma_start;
-	unsigned int		dma_end;
-	struct clk *lcdc_clk;
-	int irq;
-	unsigned short pseudo_palette[16];
-	unsigned int palette_sz;
-	unsigned int pxl_clk;
-	int blank;
-	int			vsync_flag;
-	int			vsync_timeout;
-};
-
-
-/* Variable Screen Information */
-static struct fb_var_screeninfo da8xx_fb_var = {
-	.xoffset = 0,
-	.yoffset = 0,
-	.transp = {0, 0, 0},
-	.nonstd = 0,
-	.activate = 0,
-	.height = -1,
-	.width = -1,
-	.pixclock = 46666,	/* 46us - AUO display */
-	.accel_flags = 0,
-	.left_margin = LEFT_MARGIN,
-	.right_margin = RIGHT_MARGIN,
-	.upper_margin = UPPER_MARGIN,
-	.lower_margin = LOWER_MARGIN,
-	.sync = 0,
-	.vmode = FB_VMODE_NONINTERLACED
-};
-
-static struct fb_fix_screeninfo da8xx_fb_fix = {
-	.id = "DA8xx FB Drv",
-	.type = FB_TYPE_PACKED_PIXELS,
-	.type_aux = 0,
-	.visual = FB_VISUAL_PSEUDOCOLOR,
-	.xpanstep = 0,
-	.ypanstep = 1,
-	.ywrapstep = 0,
-	.accel = FB_ACCEL_NONE
-};
-
-/* Enable the Raster Engine of the LCD Controller */
-static inline void lcd_enable_raster(void)
-{
-	u32 reg;
-
-	/* Put LCDC in reset for several cycles */
-	if (lcd_revision == LCD_VERSION_2)
-		lcdc_write(LCD_CLK_MAIN_RESET,
-			   &da8xx_fb_reg_base->clk_reset);
-
-	udelay(1000);
-	/* Bring LCDC out of reset */
-	if (lcd_revision == LCD_VERSION_2)
-		lcdc_write(0,
-			   &da8xx_fb_reg_base->clk_reset);
-
-	udelay(1000);
-
-	reg = lcdc_read(&da8xx_fb_reg_base->raster_ctrl);
-	if (!(reg & LCD_RASTER_ENABLE))
-		lcdc_write(reg | LCD_RASTER_ENABLE,
-			&da8xx_fb_reg_base->raster_ctrl);
-}
-
-/* Disable the Raster Engine of the LCD Controller */
-static inline void lcd_disable_raster(bool wait_for_frame_done)
-{
-	u32 reg;
-	u32 loop_cnt = 0;
-	u32 stat;
-	u32 i = 0;
-
-	if (wait_for_frame_done)
-		loop_cnt = 5000;
-
-	reg = lcdc_read(&da8xx_fb_reg_base->raster_ctrl);
-	if (reg & LCD_RASTER_ENABLE)
-		lcdc_write(reg & ~LCD_RASTER_ENABLE,
-			&da8xx_fb_reg_base->raster_ctrl);
-
-	/* Wait for the current frame to complete */
-	do {
-		if (lcd_revision == LCD_VERSION_1)
-			stat = lcdc_read(&da8xx_fb_reg_base->stat);
-		else
-			stat = lcdc_read(&da8xx_fb_reg_base->raw_stat);
-
-		mdelay(1);
-	} while (!(stat & 0x01) && (i++ < loop_cnt));
-
-	if (lcd_revision == LCD_VERSION_1)
-		lcdc_write(stat, &da8xx_fb_reg_base->stat);
-	else
-		lcdc_write(stat, &da8xx_fb_reg_base->raw_stat);
-
-	if ((loop_cnt != 0) && (i >= loop_cnt)) {
-		printf("LCD Controller timed out\n");
-		return;
-	}
-}
-
-static void lcd_blit(int load_mode, struct da8xx_fb_par *par)
-{
-	u32 start;
-	u32 end;
-	u32 reg_ras;
-	u32 reg_dma;
-	u32 reg_int;
-
-	/* init reg to clear PLM (loading mode) fields */
-	reg_ras = lcdc_read(&da8xx_fb_reg_base->raster_ctrl);
-	reg_ras &= ~(3 << 20);
-
-	reg_dma  = lcdc_read(&da8xx_fb_reg_base->dma_ctrl);
-
-	if (load_mode == LOAD_DATA) {
-		start    = par->dma_start;
-		end      = par->dma_end;
-
-		reg_ras |= LCD_PALETTE_LOAD_MODE(DATA_ONLY);
-		if (lcd_revision == LCD_VERSION_1) {
-			reg_dma |= LCD_V1_END_OF_FRAME_INT_ENA;
-		} else {
-			reg_int = lcdc_read(&da8xx_fb_reg_base->int_ena_set) |
-				LCD_V2_END_OF_FRAME0_INT_ENA |
-				LCD_V2_END_OF_FRAME1_INT_ENA |
-				LCD_V2_UNDERFLOW_INT_ENA | LCD_SYNC_LOST;
-			lcdc_write(reg_int, &da8xx_fb_reg_base->int_ena_set);
-		}
-
-#if (LCD_NUM_BUFFERS == 2)
-		reg_dma |= LCD_DUAL_FRAME_BUFFER_ENABLE;
-		lcdc_write(start, &da8xx_fb_reg_base->dma_frm_buf_base_addr_0);
-		lcdc_write(end, &da8xx_fb_reg_base->dma_frm_buf_ceiling_addr_0);
-		lcdc_write(start, &da8xx_fb_reg_base->dma_frm_buf_base_addr_1);
-		lcdc_write(end, &da8xx_fb_reg_base->dma_frm_buf_ceiling_addr_1);
-#else
-		reg_dma &= ~LCD_DUAL_FRAME_BUFFER_ENABLE;
-		lcdc_write(start, &da8xx_fb_reg_base->dma_frm_buf_base_addr_0);
-		lcdc_write(end, &da8xx_fb_reg_base->dma_frm_buf_ceiling_addr_0);
-		lcdc_write(0, &da8xx_fb_reg_base->dma_frm_buf_base_addr_1);
-		lcdc_write(0, &da8xx_fb_reg_base->dma_frm_buf_ceiling_addr_1);
-#endif
-
-	} else if (load_mode == LOAD_PALETTE) {
-		start    = par->p_palette_base;
-		end      = start + par->palette_sz - 1;
-
-		reg_ras |= LCD_PALETTE_LOAD_MODE(PALETTE_ONLY);
-		if (lcd_revision == LCD_VERSION_1) {
-			reg_ras |= LCD_V1_PL_INT_ENA;
-		} else {
-			reg_int = lcdc_read(&da8xx_fb_reg_base->int_ena_set) |
-				LCD_V2_PL_INT_ENA;
-			lcdc_write(reg_int, &da8xx_fb_reg_base->int_ena_set);
-		}
-
-		lcdc_write(start, &da8xx_fb_reg_base->dma_frm_buf_base_addr_0);
-		lcdc_write(end, &da8xx_fb_reg_base->dma_frm_buf_ceiling_addr_0);
-	}
-
-	lcdc_write(reg_dma, &da8xx_fb_reg_base->dma_ctrl);
-	lcdc_write(reg_ras, &da8xx_fb_reg_base->raster_ctrl);
-
-	/*
-	 * The Raster enable bit must be set after all other control fields are
-	 * set.
-	 */
-	lcd_enable_raster();
-}
-
-/* Configure the Burst Size of DMA */
-static int lcd_cfg_dma(int burst_size)
-{
-	u32 reg;
-
-	reg = lcdc_read(&da8xx_fb_reg_base->dma_ctrl) & 0x00000001;
-	switch (burst_size) {
-	case 1:
-		reg |= LCD_DMA_BURST_SIZE(LCD_DMA_BURST_1);
-		break;
-	case 2:
-		reg |= LCD_DMA_BURST_SIZE(LCD_DMA_BURST_2);
-		break;
-	case 4:
-		reg |= LCD_DMA_BURST_SIZE(LCD_DMA_BURST_4);
-		break;
-	case 8:
-		reg |= LCD_DMA_BURST_SIZE(LCD_DMA_BURST_8);
-		break;
-	case 16:
-		reg |= LCD_DMA_BURST_SIZE(LCD_DMA_BURST_16);
-		break;
-	default:
-		return -EINVAL;
-	}
-	lcdc_write(reg, &da8xx_fb_reg_base->dma_ctrl);
-
-	return 0;
-}
-
-static void lcd_cfg_ac_bias(int period, int transitions_per_int)
-{
-	u32 reg;
-
-	/* Set the AC Bias Period and Number of Transitions per Interrupt */
-	reg = lcdc_read(&da8xx_fb_reg_base->raster_timing_2) & 0xFFF00000;
-	reg |= LCD_AC_BIAS_FREQUENCY(period) |
-		LCD_AC_BIAS_TRANSITIONS_PER_INT(transitions_per_int);
-	lcdc_write(reg, &da8xx_fb_reg_base->raster_timing_2);
-}
-
-static void lcd_cfg_horizontal_sync(int back_porch, int pulse_width,
-		int front_porch)
-{
-	u32 reg;
-
-	reg = lcdc_read(&da8xx_fb_reg_base->raster_timing_0) & 0xf;
-	reg |= ((back_porch & 0xff) << 24)
-	    | ((front_porch & 0xff) << 16)
-	    | ((pulse_width & 0x3f) << 10);
-	lcdc_write(reg, &da8xx_fb_reg_base->raster_timing_0);
-}
-
-static void lcd_cfg_vertical_sync(int back_porch, int pulse_width,
-		int front_porch)
-{
-	u32 reg;
-
-	reg = lcdc_read(&da8xx_fb_reg_base->raster_timing_1) & 0x3ff;
-	reg |= ((back_porch & 0xff) << 24)
-	    | ((front_porch & 0xff) << 16)
-	    | ((pulse_width & 0x3f) << 10);
-	lcdc_write(reg, &da8xx_fb_reg_base->raster_timing_1);
-}
-
-static int lcd_cfg_display(const struct lcd_ctrl_config *cfg)
-{
-	u32 reg;
-	u32 reg_int;
-
-	reg = lcdc_read(&da8xx_fb_reg_base->raster_ctrl) & ~(LCD_TFT_MODE |
-						LCD_MONO_8BIT_MODE |
-						LCD_MONOCHROME_MODE);
-
-	switch (cfg->p_disp_panel->panel_shade) {
-	case MONOCHROME:
-		reg |= LCD_MONOCHROME_MODE;
-		if (cfg->mono_8bit_mode)
-			reg |= LCD_MONO_8BIT_MODE;
-		break;
-	case COLOR_ACTIVE:
-		reg |= LCD_TFT_MODE;
-		if (cfg->tft_alt_mode)
-			reg |= LCD_TFT_ALT_ENABLE;
-		break;
-
-	case COLOR_PASSIVE:
-		if (cfg->stn_565_mode)
-			reg |= LCD_STN_565_ENABLE;
-		break;
-
-	default:
-		return -EINVAL;
-	}
-
-	/* enable additional interrupts here */
-	if (lcd_revision == LCD_VERSION_1) {
-		reg |= LCD_V1_UNDERFLOW_INT_ENA;
-	} else {
-		reg_int = lcdc_read(&da8xx_fb_reg_base->int_ena_set) |
-			LCD_V2_UNDERFLOW_INT_ENA;
-		lcdc_write(reg_int, &da8xx_fb_reg_base->int_ena_set);
-	}
-
-	lcdc_write(reg, &da8xx_fb_reg_base->raster_ctrl);
-
-	reg = lcdc_read(&da8xx_fb_reg_base->raster_timing_2);
-
-	if (cfg->sync_ctrl)
-		reg |= LCD_SYNC_CTRL;
-	else
-		reg &= ~LCD_SYNC_CTRL;
-
-	if (cfg->sync_edge)
-		reg |= LCD_SYNC_EDGE;
-	else
-		reg &= ~LCD_SYNC_EDGE;
-
-	if (cfg->invert_line_clock)
-		reg |= LCD_INVERT_LINE_CLOCK;
-	else
-		reg &= ~LCD_INVERT_LINE_CLOCK;
-
-	if (cfg->invert_frm_clock)
-		reg |= LCD_INVERT_FRAME_CLOCK;
-	else
-		reg &= ~LCD_INVERT_FRAME_CLOCK;
-
-	lcdc_write(reg, &da8xx_fb_reg_base->raster_timing_2);
-
-	return 0;
-}
-
-static int lcd_cfg_frame_buffer(struct da8xx_fb_par *par, u32 width, u32 height,
-		u32 bpp, u32 raster_order)
-{
-	u32 reg;
-
-	/* Set the Panel Width */
-	/* Pixels per line = (PPL + 1)*16 */
-	if (lcd_revision == LCD_VERSION_1) {
-		/*
-		 * 0x3F in bits 4..9 gives max horizontal resolution = 1024
-		 * pixels
-		 */
-		width &= 0x3f0;
-	} else {
-		/*
-		 * 0x7F in bits 4..10 gives max horizontal resolution = 2048
-		 * pixels.
-		 */
-		width &= 0x7f0;
-	}
-	reg = lcdc_read(&da8xx_fb_reg_base->raster_timing_0);
-	reg &= 0xfffffc00;
-	if (lcd_revision == LCD_VERSION_1) {
-		reg |= ((width >> 4) - 1) << 4;
-	} else {
-		width = (width >> 4) - 1;
-		reg |= ((width & 0x3f) << 4) | ((width & 0x40) >> 3);
-	}
-	lcdc_write(reg, &da8xx_fb_reg_base->raster_timing_0);
-
-	/* Set the Panel Height */
-	/* Set bits 9:0 of Lines Per Pixel */
-	reg = lcdc_read(&da8xx_fb_reg_base->raster_timing_1);
-	reg = ((height - 1) & 0x3ff) | (reg & 0xfffffc00);
-	lcdc_write(reg, &da8xx_fb_reg_base->raster_timing_1);
-
-	/* Set bit 10 of Lines Per Pixel */
-	if (lcd_revision == LCD_VERSION_2) {
-		reg = lcdc_read(&da8xx_fb_reg_base->raster_timing_2);
-		reg |= ((height - 1) & 0x400) << 16;
-		lcdc_write(reg, &da8xx_fb_reg_base->raster_timing_2);
-	}
-
-	/* Set the Raster Order of the Frame Buffer */
-	reg = lcdc_read(&da8xx_fb_reg_base->raster_ctrl) & ~(1 << 8);
-	if (raster_order)
-		reg |= LCD_RASTER_ORDER;
-
-	if (bpp == 24)
-		reg |= (LCD_TFT_MODE | LCD_V2_TFT_24BPP_MODE);
-	else if (bpp == 32)
-		reg |= (LCD_TFT_MODE | LCD_V2_TFT_24BPP_MODE
-				| LCD_V2_TFT_24BPP_UNPACK);
-
-	lcdc_write(reg, &da8xx_fb_reg_base->raster_ctrl);
-
-	switch (bpp) {
-	case 1:
-	case 2:
-	case 4:
-	case 16:
-	case 24:
-	case 32:
-		par->palette_sz = 16 * 2;
-		break;
-
-	case 8:
-		par->palette_sz = 256 * 2;
-		break;
-
-	default:
-		return -EINVAL;
-	}
-
-	return 0;
-}
-
-static int fb_setcolreg(unsigned regno, unsigned red, unsigned green,
-			      unsigned blue, unsigned transp,
-			      struct fb_info *info)
-{
-	struct da8xx_fb_par *par = info->par;
-	unsigned short *palette = (unsigned short *) par->v_palette_base;
-	u_short pal;
-	int update_hw = 0;
-
-	if (regno > 255)
-		return 1;
-
-	if (info->fix.visual == FB_VISUAL_DIRECTCOLOR)
-		return 1;
-
-	if (info->var.bits_per_pixel == 8) {
-		red >>= 4;
-		green >>= 8;
-		blue >>= 12;
-
-		pal = (red & 0x0f00);
-		pal |= (green & 0x00f0);
-		pal |= (blue & 0x000f);
-
-		if (palette[regno] != pal) {
-			update_hw = 1;
-			palette[regno] = pal;
-		}
-	} else if ((info->var.bits_per_pixel == 16) && regno < 16) {
-		red >>= (16 - info->var.red.length);
-		red <<= info->var.red.offset;
-
-		green >>= (16 - info->var.green.length);
-		green <<= info->var.green.offset;
-
-		blue >>= (16 - info->var.blue.length);
-		blue <<= info->var.blue.offset;
-
-		par->pseudo_palette[regno] = red | green | blue;
-
-		if (palette[0] != 0x4000) {
-			update_hw = 1;
-			palette[0] = 0x4000;
-		}
-	} else if (((info->var.bits_per_pixel == 32) && regno < 32) ||
-		   ((info->var.bits_per_pixel == 24) && regno < 24)) {
-		red >>= (24 - info->var.red.length);
-		red <<= info->var.red.offset;
-
-		green >>= (24 - info->var.green.length);
-		green <<= info->var.green.offset;
-
-		blue >>= (24 - info->var.blue.length);
-		blue <<= info->var.blue.offset;
-
-		par->pseudo_palette[regno] = red | green | blue;
-
-		if (palette[0] != 0x4000) {
-			update_hw = 1;
-			palette[0] = 0x4000;
-		}
-	}
-
-	/* Update the palette in the h/w as needed. */
-	if (update_hw)
-		lcd_blit(LOAD_PALETTE, par);
-
-	return 0;
-}
-
-static void lcd_reset(struct da8xx_fb_par *par)
-{
-	/* Disable the Raster if previously Enabled */
-	lcd_disable_raster(NO_WAIT_FOR_FRAME_DONE);
-
-	/* DMA has to be disabled */
-	lcdc_write(0, &da8xx_fb_reg_base->dma_ctrl);
-	lcdc_write(0, &da8xx_fb_reg_base->raster_ctrl);
-
-	if (lcd_revision == LCD_VERSION_2) {
-		lcdc_write(0, &da8xx_fb_reg_base->int_ena_set);
-		/* Write 1 to reset */
-		lcdc_write(LCD_CLK_MAIN_RESET, &da8xx_fb_reg_base->clk_reset);
-		lcdc_write(0, &da8xx_fb_reg_base->clk_reset);
-	}
-}
-
-static void lcd_calc_clk_divider(struct da8xx_fb_par *par)
-{
-	unsigned int lcd_clk, div;
-
-	/* Get clock from sysclk2 */
-	lcd_clk = clk_get(2);
-
-	div = lcd_clk / par->pxl_clk;
-	debug("LCD Clock: %d Divider: %d PixClk: %d\n",
-	      lcd_clk, div, par->pxl_clk);
-
-	/* Configure the LCD clock divisor. */
-	lcdc_write(LCD_CLK_DIVISOR(div) |
-			(LCD_RASTER_MODE & 0x1), &da8xx_fb_reg_base->ctrl);
-
-	if (lcd_revision == LCD_VERSION_2)
-		lcdc_write(LCD_V2_DMA_CLK_EN | LCD_V2_LIDD_CLK_EN |
-				LCD_V2_CORE_CLK_EN,
-				&da8xx_fb_reg_base->clk_ena);
-}
-
-static int lcd_init(struct da8xx_fb_par *par, const struct lcd_ctrl_config *cfg,
-		const struct da8xx_panel *panel)
-{
-	u32 bpp;
-	int ret = 0;
-
-	lcd_reset(par);
-
-	/* Calculate the divider */
-	lcd_calc_clk_divider(par);
-
-	if (panel->invert_pxl_clk)
-		lcdc_write((lcdc_read(&da8xx_fb_reg_base->raster_timing_2) |
-			LCD_INVERT_PIXEL_CLOCK),
-			 &da8xx_fb_reg_base->raster_timing_2);
-	else
-		lcdc_write((lcdc_read(&da8xx_fb_reg_base->raster_timing_2) &
-			~LCD_INVERT_PIXEL_CLOCK),
-			&da8xx_fb_reg_base->raster_timing_2);
-
-	/* Configure the DMA burst size. */
-	ret = lcd_cfg_dma(cfg->dma_burst_sz);
-	if (ret < 0)
-		return ret;
-
-	/* Configure the AC bias properties. */
-	lcd_cfg_ac_bias(cfg->ac_bias, cfg->ac_bias_intrpt);
-
-	/* Configure the vertical and horizontal sync properties. */
-	lcd_cfg_vertical_sync(panel->vbp, panel->vsw, panel->vfp);
-	lcd_cfg_horizontal_sync(panel->hbp, panel->hsw, panel->hfp);
-
-	/* Configure for display */
-	ret = lcd_cfg_display(cfg);
-	if (ret < 0)
-		return ret;
-
-	if ((QVGA != cfg->p_disp_panel->panel_type) &&
-	    (WVGA != cfg->p_disp_panel->panel_type))
-		return -EINVAL;
-
-	if (cfg->bpp <= cfg->p_disp_panel->max_bpp &&
-	    cfg->bpp >= cfg->p_disp_panel->min_bpp)
-		bpp = cfg->bpp;
-	else
-		bpp = cfg->p_disp_panel->max_bpp;
-	if (bpp == 12)
-		bpp = 16;
-	ret = lcd_cfg_frame_buffer(par, (unsigned int)panel->width,
-				(unsigned int)panel->height, bpp,
-				cfg->raster_order);
-	if (ret < 0)
-		return ret;
-
-	/* Configure FDD */
-	lcdc_write((lcdc_read(&da8xx_fb_reg_base->raster_ctrl) & 0xfff00fff) |
-		       (cfg->fdd << 12), &da8xx_fb_reg_base->raster_ctrl);
-
-	return 0;
-}
-
-static void lcdc_dma_start(void)
-{
-	struct da8xx_fb_par *par = da8xx_fb_info->par;
-	lcdc_write(par->dma_start,
-		&da8xx_fb_reg_base->dma_frm_buf_base_addr_0);
-	lcdc_write(par->dma_end,
-		&da8xx_fb_reg_base->dma_frm_buf_ceiling_addr_0);
-	lcdc_write(0,
-		&da8xx_fb_reg_base->dma_frm_buf_base_addr_1);
-	lcdc_write(0,
-		&da8xx_fb_reg_base->dma_frm_buf_ceiling_addr_1);
-}
-
-static u32 lcdc_irq_handler_rev01(void)
-{
-	struct da8xx_fb_par *par = da8xx_fb_info->par;
-	u32 stat = lcdc_read(&da8xx_fb_reg_base->stat);
-	u32 reg_ras;
-
-	if ((stat & LCD_SYNC_LOST) && (stat & LCD_FIFO_UNDERFLOW)) {
-		debug("LCD_SYNC_LOST\n");
-		lcd_disable_raster(NO_WAIT_FOR_FRAME_DONE);
-		lcdc_write(stat, &da8xx_fb_reg_base->stat);
-		lcd_enable_raster();
-		return LCD_SYNC_LOST;
-	} else if (stat & LCD_PL_LOAD_DONE) {
-		debug("LCD_PL_LOAD_DONE\n");
-		/*
-		 * Must disable raster before changing state of any control bit.
-		 * And also must be disabled before clearing the PL loading
-		 * interrupt via the following write to the status register. If
-		 * this is done after then one gets multiple PL done interrupts.
-		 */
-		lcd_disable_raster(NO_WAIT_FOR_FRAME_DONE);
-
-		lcdc_write(stat, &da8xx_fb_reg_base->stat);
-
-		/* Disable PL completion interrupt */
-		reg_ras  = lcdc_read(&da8xx_fb_reg_base->raster_ctrl);
-		reg_ras &= ~LCD_V1_PL_INT_ENA;
-		lcdc_write(reg_ras, &da8xx_fb_reg_base->raster_ctrl);
-
-		/* Setup and start data loading mode */
-		lcd_blit(LOAD_DATA, par);
-		return LCD_PL_LOAD_DONE;
-	} else {
-		lcdc_write(stat, &da8xx_fb_reg_base->stat);
-
-		if (stat & LCD_END_OF_FRAME0)
-			debug("LCD_END_OF_FRAME0\n");
-
-		lcdc_write(par->dma_start,
-			&da8xx_fb_reg_base->dma_frm_buf_base_addr_0);
-		lcdc_write(par->dma_end,
-			&da8xx_fb_reg_base->dma_frm_buf_ceiling_addr_0);
-		par->vsync_flag = 1;
-		return LCD_END_OF_FRAME0;
-	}
-	return stat;
-}
-
-static u32 lcdc_irq_handler_rev02(void)
-{
-	struct da8xx_fb_par *par = da8xx_fb_info->par;
-	u32 stat = lcdc_read(&da8xx_fb_reg_base->masked_stat);
-	u32 reg_int;
-
-	if ((stat & LCD_SYNC_LOST) && (stat & LCD_FIFO_UNDERFLOW)) {
-		debug("LCD_SYNC_LOST\n");
-		lcd_disable_raster(NO_WAIT_FOR_FRAME_DONE);
-		lcdc_write(stat, &da8xx_fb_reg_base->masked_stat);
-		lcd_enable_raster();
-		lcdc_write(0, &da8xx_fb_reg_base->end_of_int_ind);
-		return LCD_SYNC_LOST;
-	} else if (stat & LCD_PL_LOAD_DONE) {
-		debug("LCD_PL_LOAD_DONE\n");
-		/*
-		 * Must disable raster before changing state of any control bit.
-		 * And also must be disabled before clearing the PL loading
-		 * interrupt via the following write to the status register. If
-		 * this is done after then one gets multiple PL done interrupts.
-		 */
-		lcd_disable_raster(NO_WAIT_FOR_FRAME_DONE);
-
-		lcdc_write(stat, &da8xx_fb_reg_base->masked_stat);
-
-		/* Disable PL completion interrupt */
-		reg_int  = lcdc_read(&da8xx_fb_reg_base->int_ena_clr) |
-			(LCD_V2_PL_INT_ENA);
-		lcdc_write(reg_int, &da8xx_fb_reg_base->int_ena_clr);
-
-		/* Setup and start data loading mode */
-		lcd_blit(LOAD_DATA, par);
-		lcdc_write(0, &da8xx_fb_reg_base->end_of_int_ind);
-		return LCD_PL_LOAD_DONE;
-	} else {
-		lcdc_write(stat, &da8xx_fb_reg_base->masked_stat);
-
-		if (stat & LCD_END_OF_FRAME0)
-			debug("LCD_END_OF_FRAME0\n");
-
-		lcdc_write(par->dma_start,
-			   &da8xx_fb_reg_base->dma_frm_buf_base_addr_0);
-		lcdc_write(par->dma_end,
-			   &da8xx_fb_reg_base->dma_frm_buf_ceiling_addr_0);
-		par->vsync_flag = 1;
-		lcdc_write(0, &da8xx_fb_reg_base->end_of_int_ind);
-		return LCD_END_OF_FRAME0;
-	}
-	lcdc_write(0, &da8xx_fb_reg_base->end_of_int_ind);
-	return stat;
-}
-
-static u32 lcdc_irq_handler(void)
-{
-	if (lcd_revision == LCD_VERSION_1)
-		return lcdc_irq_handler_rev01();
-	else
-		return lcdc_irq_handler_rev02();
-}
-
-static u32 wait_for_event(u32 event)
-{
-	u32 timeout = 50000;
-	u32 ret;
-
-	do {
-		ret = lcdc_irq_handler();
-		udelay(1000);
-		--timeout;
-	} while (!(ret & event) && timeout);
-
-	if (!(ret & event)) {
-		printf("%s: event %d not hit\n", __func__, event);
-		return -1;
-	}
-
-	return 0;
-
-}
-
-void *video_hw_init(void)
-{
-	struct da8xx_fb_par *par;
-	u32 size;
-	u32 rev;
-	char *p;
-
-	if (!lcd_panel) {
-		printf("Display not initialized\n");
-		return NULL;
-	}
-	gpanel.winSizeX = lcd_panel->width;
-	gpanel.winSizeY = lcd_panel->height;
-	gpanel.plnSizeX = lcd_panel->width;
-	gpanel.plnSizeY = lcd_panel->height;
-
-	switch (bits_x_pixel) {
-	case 32:
-		gpanel.gdfBytesPP = 4;
-		gpanel.gdfIndex = GDF_32BIT_X888RGB;
-		break;
-	case 24:
-		gpanel.gdfBytesPP = 4;
-		gpanel.gdfIndex = GDF_32BIT_X888RGB;
-		break;
-	case 16:
-		gpanel.gdfBytesPP = 2;
-		gpanel.gdfIndex = GDF_16BIT_565RGB;
-		break;
-	default:
-		gpanel.gdfBytesPP = 1;
-		gpanel.gdfIndex = GDF__8BIT_INDEX;
-		break;
-	}
-
-	da8xx_fb_reg_base = (struct da8xx_lcd_regs *)DA8XX_LCD_CNTL_BASE;
-
-	/* Determine LCD IP Version */
-	rev = lcdc_read(&da8xx_fb_reg_base->revid);
-	switch (rev) {
-	case 0x4C100102:
-		lcd_revision = LCD_VERSION_1;
-		break;
-	case 0x4F200800:
-	case 0x4F201000:
-		lcd_revision = LCD_VERSION_2;
-		break;
-	default:
-		printf("Unknown PID Reg value 0x%x, defaulting to LCD revision 1\n",
-		       rev);
-		lcd_revision = LCD_VERSION_1;
-		break;
-	}
-
-	debug("rev: 0x%x Resolution: %dx%d %d\n", rev,
-	      gpanel.winSizeX,
-	      gpanel.winSizeY,
-	      da8xx_lcd_cfg->bpp);
-
-	size = sizeof(struct fb_info) + sizeof(struct da8xx_fb_par);
-	da8xx_fb_info = malloc_cache_aligned(size);
-	debug("da8xx_fb_info at %x\n", (unsigned int)da8xx_fb_info);
-
-	if (!da8xx_fb_info) {
-		printf("Memory allocation failed for fb_info\n");
-		return NULL;
-	}
-	memset(da8xx_fb_info, 0, size);
-	p = (char *)da8xx_fb_info;
-	da8xx_fb_info->par = p +  sizeof(struct fb_info);
-	debug("da8xx_par at %x\n", (unsigned int)da8xx_fb_info->par);
-
-	par = da8xx_fb_info->par;
-	par->pxl_clk = lcd_panel->pxl_clk;
-
-	if (lcd_init(par, da8xx_lcd_cfg, lcd_panel) < 0) {
-		printf("lcd_init failed\n");
-		goto err_release_fb;
-	}
-
-	/* allocate frame buffer */
-	par->vram_size = lcd_panel->width * lcd_panel->height *
-			da8xx_lcd_cfg->bpp;
-	par->vram_size = par->vram_size * LCD_NUM_BUFFERS / 8;
-
-	par->vram_virt = malloc_cache_aligned(par->vram_size);
-
-	par->vram_phys = (dma_addr_t) par->vram_virt;
-	debug("Requesting 0x%x bytes for framebuffer at 0x%x\n",
-		(unsigned int)par->vram_size,
-		(unsigned int)par->vram_virt);
-	if (!par->vram_virt) {
-		printf("GLCD: malloc for frame buffer failed\n");
-		goto err_release_fb;
-	}
-	gd->fb_base = (int)par->vram_virt;
-
-	gpanel.frameAdrs = (unsigned int)par->vram_virt;
-	da8xx_fb_info->screen_base = (char *) par->vram_virt;
-	da8xx_fb_fix.smem_start	= gpanel.frameAdrs;
-	da8xx_fb_fix.smem_len = par->vram_size;
-	da8xx_fb_fix.line_length = (lcd_panel->width * da8xx_lcd_cfg->bpp) / 8;
-
-	par->dma_start = par->vram_phys;
-	par->dma_end   = par->dma_start + lcd_panel->height *
-		da8xx_fb_fix.line_length - 1;
-
-	/* allocate palette buffer */
-	par->v_palette_base = malloc_cache_aligned(PALETTE_SIZE);
-	if (!par->v_palette_base) {
-		printf("GLCD: malloc for palette buffer failed\n");
-		goto err_release_fb_mem;
-	}
-	memset(par->v_palette_base, 0, PALETTE_SIZE);
-	par->p_palette_base = (unsigned int)par->v_palette_base;
-
-	/* Initialize par */
-	da8xx_fb_info->var.bits_per_pixel = da8xx_lcd_cfg->bpp;
-
-	da8xx_fb_var.xres = lcd_panel->width;
-	da8xx_fb_var.xres_virtual = lcd_panel->width;
-
-	da8xx_fb_var.yres         = lcd_panel->height;
-	da8xx_fb_var.yres_virtual = lcd_panel->height * LCD_NUM_BUFFERS;
-
-	da8xx_fb_var.grayscale =
-	    da8xx_lcd_cfg->p_disp_panel->panel_shade == MONOCHROME ? 1 : 0;
-	da8xx_fb_var.bits_per_pixel = da8xx_lcd_cfg->bpp;
-
-	da8xx_fb_var.hsync_len = lcd_panel->hsw;
-	da8xx_fb_var.vsync_len = lcd_panel->vsw;
-
-	/* Initialize fbinfo */
-	da8xx_fb_info->flags = FBINFO_FLAG_DEFAULT;
-	da8xx_fb_info->fix = da8xx_fb_fix;
-	da8xx_fb_info->var = da8xx_fb_var;
-	da8xx_fb_info->pseudo_palette = par->pseudo_palette;
-	da8xx_fb_info->fix.visual = (da8xx_fb_info->var.bits_per_pixel <= 8) ?
-				FB_VISUAL_PSEUDOCOLOR : FB_VISUAL_TRUECOLOR;
-
-	/* Clear interrupt */
-	memset((void *)par->vram_virt, 0, par->vram_size);
-	lcd_disable_raster(NO_WAIT_FOR_FRAME_DONE);
-	if (lcd_revision == LCD_VERSION_1)
-		lcdc_write(0xFFFF, &da8xx_fb_reg_base->stat);
-	else
-		lcdc_write(0xFFFF, &da8xx_fb_reg_base->masked_stat);
-	debug("Palette at 0x%x size %d\n", par->p_palette_base,
-		par->palette_sz);
-	lcdc_dma_start();
-
-	/* Load a default palette */
-	fb_setcolreg(0, 0, 0, 0, 0xffff, da8xx_fb_info);
-
-	/* Check that the palette is loaded */
-	wait_for_event(LCD_PL_LOAD_DONE);
-
-	/* Wait until DMA is working */
-	wait_for_event(LCD_END_OF_FRAME0);
-
-	return (void *)&gpanel;
-
-err_release_fb_mem:
-	free(par->vram_virt);
-
-err_release_fb:
-	free(da8xx_fb_info);
-
-	return NULL;
-}
-
-void da8xx_video_init(const struct da8xx_panel *panel,
-		      const struct lcd_ctrl_config *lcd_cfg, int bits_pixel)
-{
-	lcd_panel = panel;
-	da8xx_lcd_cfg = lcd_cfg;
-	bits_x_pixel = bits_pixel;
-}
diff --git a/drivers/video/da8xx-fb.h b/drivers/video/da8xx-fb.h
deleted file mode 100644
index 9b30d98..0000000
--- a/drivers/video/da8xx-fb.h
+++ /dev/null
@@ -1,115 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0+ */
-/*
- * Porting to u-boot:
- *
- * (C) Copyright 2011
- * Stefano Babic, DENX Software Engineering, sbabic@denx.de.
- *
- * Copyright (C) 2008-2009 MontaVista Software Inc.
- * Copyright (C) 2008-2009 Texas Instruments Inc
- *
- * Based on the LCD driver for TI Avalanche processors written by
- * Ajay Singh and Shalom Hai.
- */
-
-#ifndef DA8XX_FB_H
-#define DA8XX_FB_H
-
-enum panel_type {
-	QVGA = 0,
-	WVGA
-};
-
-enum panel_shade {
-	MONOCHROME = 0,
-	COLOR_ACTIVE,
-	COLOR_PASSIVE,
-};
-
-enum raster_load_mode {
-	LOAD_DATA = 1,
-	LOAD_PALETTE,
-};
-
-struct display_panel {
-	enum panel_type panel_type; /* QVGA */
-	int max_bpp;
-	int min_bpp;
-	enum panel_shade panel_shade;
-};
-
-struct da8xx_panel {
-	const char	name[25];	/* Full name <vendor>_<model> */
-	unsigned short	width;
-	unsigned short	height;
-	int		hfp;		/* Horizontal front porch */
-	int		hbp;		/* Horizontal back porch */
-	int		hsw;		/* Horizontal Sync Pulse Width */
-	int		vfp;		/* Vertical front porch */
-	int		vbp;		/* Vertical back porch */
-	int		vsw;		/* Vertical Sync Pulse Width */
-	unsigned int	pxl_clk;	/* Pixel clock */
-	unsigned char	invert_pxl_clk;	/* Invert Pixel clock */
-};
-
-struct da8xx_lcdc_platform_data {
-	const char manu_name[10];
-	void *controller_data;
-	const char type[25];
-	void (*panel_power_ctrl)(int);
-};
-
-struct lcd_ctrl_config {
-	const struct display_panel *p_disp_panel;
-
-	/* AC Bias Pin Frequency */
-	int ac_bias;
-
-	/* AC Bias Pin Transitions per Interrupt */
-	int ac_bias_intrpt;
-
-	/* DMA burst size */
-	int dma_burst_sz;
-
-	/* Bits per pixel */
-	int bpp;
-
-	/* FIFO DMA Request Delay */
-	int fdd;
-
-	/* TFT Alternative Signal Mapping (Only for active) */
-	unsigned char tft_alt_mode;
-
-	/* 12 Bit Per Pixel (5-6-5) Mode (Only for passive) */
-	unsigned char stn_565_mode;
-
-	/* Mono 8-bit Mode: 1=D0-D7 or 0=D0-D3 */
-	unsigned char mono_8bit_mode;
-
-	/* Invert line clock */
-	unsigned char invert_line_clock;
-
-	/* Invert frame clock  */
-	unsigned char invert_frm_clock;
-
-	/* Horizontal and Vertical Sync Edge: 0=rising 1=falling */
-	unsigned char sync_edge;
-
-	/* Horizontal and Vertical Sync: Control: 0=ignore */
-	unsigned char sync_ctrl;
-
-	/* Raster Data Order Select: 1=Most-to-least 0=Least-to-most */
-	unsigned char raster_order;
-};
-
-struct lcd_sync_arg {
-	int back_porch;
-	int front_porch;
-	int pulse_width;
-};
-
-void da8xx_video_init(const struct da8xx_panel *panel,
-		      const struct lcd_ctrl_config *lcd_cfg,
-		      int bits_pixel);
-
-#endif  /* ifndef DA8XX_FB_H */
diff --git a/drivers/video/formike.c b/drivers/video/formike.c
deleted file mode 100644
index 5cbe50d..0000000
--- a/drivers/video/formike.c
+++ /dev/null
@@ -1,513 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0
-/*
- * LCD: Formike, TFT 4.3", 480x800, RGB24, KWH043ST20-F01, DriverIC NT35510-16
- * LCD initialization via SPI
- * Based on:
- *
- */
-#include <common.h>
-#include <errno.h>
-#include <log.h>
-#include <spi.h>
-#include <linux/delay.h>
-
-#define TAG_READ	0x80
-#define TAG_WRITE	0x00
-
-#define TAG_DATA	0x40
-#define TAG_COMMAND	0x00
-
-#define TAG_ADDR_H	0x20
-#define TAG_ADDR_L	0x00
-
-static int spi_write_tag_val(struct spi_slave *spi, unsigned char tag,
-			     unsigned char val)
-{
-	unsigned long flags = SPI_XFER_BEGIN;
-	u8 buf[2];
-	int ret;
-
-	buf[0] = tag;
-	ret = spi_xfer(spi, 8, buf, NULL, flags);
-	buf[0] = val;
-	flags = SPI_XFER_END;
-	ret = spi_xfer(spi, 8, buf, NULL, flags);
-
-#ifdef KWH043ST20_F01_SPI_DEBUG
-	printf("spi_write_tag_val: tag=%02X, val=%02X ret: %d\n",
-	       tag, val, ret);
-#endif /* KWH043ST20_F01_SPI_DEBUG */
-	if (ret)
-		debug("%s: Failed to send: %d\n", __func__, ret);
-
-	return ret;
-}
-
-static void spi_write_dat(struct spi_slave *spi, unsigned int val)
-{
-	spi_write_tag_val(spi, TAG_WRITE|TAG_DATA, val);
-}
-
-static void spi_write_com(struct spi_slave *spi, unsigned int addr)
-{
-	spi_write_tag_val(spi, TAG_WRITE|TAG_COMMAND|TAG_ADDR_H,
-			  (addr & 0xff00) >> 8);
-	spi_write_tag_val(spi, TAG_WRITE|TAG_COMMAND|TAG_ADDR_L,
-			  (addr & 0x00ff) >> 0);
-}
-
-int kwh043st20_f01_spi_startup(unsigned int bus, unsigned int cs,
-	unsigned int max_hz, unsigned int spi_mode)
-{
-	struct spi_slave *spi;
-	int ret;
-
-	spi = spi_setup_slave(bus, cs, max_hz, spi_mode);
-	if (!spi) {
-		debug("%s: Failed to set up slave\n", __func__);
-		return -1;
-	}
-
-	ret = spi_claim_bus(spi);
-	if (ret) {
-		debug("%s: Failed to claim SPI bus: %d\n", __func__, ret);
-		goto err_claim_bus;
-	}
-
-
-	/* LV2 Page 1 enable */
-	spi_write_com(spi, 0xF000);	spi_write_dat(spi, 0x55);
-	spi_write_com(spi, 0xF001);	spi_write_dat(spi, 0xAA);
-	spi_write_com(spi, 0xF002);	spi_write_dat(spi, 0x52);
-	spi_write_com(spi, 0xF003);	spi_write_dat(spi, 0x08);
-	spi_write_com(spi, 0xF004);	spi_write_dat(spi, 0x01);
-
-	/* AVDD Set AVDD 5.2V */
-	spi_write_com(spi, 0xB000);	spi_write_dat(spi, 0x0D);
-	spi_write_com(spi, 0xB001);	spi_write_dat(spi, 0x0D);
-	spi_write_com(spi, 0xB002);	spi_write_dat(spi, 0x0D);
-
-	/* AVDD ratio */
-	spi_write_com(spi, 0xB600);	spi_write_dat(spi, 0x34);
-	spi_write_com(spi, 0xB601);	spi_write_dat(spi, 0x34);
-	spi_write_com(spi, 0xB602);	spi_write_dat(spi, 0x34);
-
-	/* AVEE  -5.2V */
-	spi_write_com(spi, 0xB100);	spi_write_dat(spi, 0x0D);
-	spi_write_com(spi, 0xB101);	spi_write_dat(spi, 0x0D);
-	spi_write_com(spi, 0xB102);	spi_write_dat(spi, 0x0D);
-
-	/* AVEE ratio */
-	spi_write_com(spi, 0xB700);	spi_write_dat(spi, 0x35);
-	spi_write_com(spi, 0xB701);	spi_write_dat(spi, 0x35);
-	spi_write_com(spi, 0xB702);	spi_write_dat(spi, 0x35);
-
-	/* VCL  -2.5V */
-	spi_write_com(spi, 0xB200);	spi_write_dat(spi, 0x00);
-	spi_write_com(spi, 0xB201);	spi_write_dat(spi, 0x00);
-	spi_write_com(spi, 0xB202);	spi_write_dat(spi, 0x00);
-
-	/* VCL ratio */
-	spi_write_com(spi, 0xB800);	spi_write_dat(spi, 0x24);
-	spi_write_com(spi, 0xB801);	spi_write_dat(spi, 0x24);
-	spi_write_com(spi, 0xB802);	spi_write_dat(spi, 0x24);
-
-	/* VGH 15V */
-	spi_write_com(spi, 0xBF00);	spi_write_dat(spi, 0x01);
-	spi_write_com(spi, 0xB300);	spi_write_dat(spi, 0x08);
-	spi_write_com(spi, 0xB301);	spi_write_dat(spi, 0x08);
-	spi_write_com(spi, 0xB302);	spi_write_dat(spi, 0x08);
-
-	/* VGH ratio */
-	spi_write_com(spi, 0xB900);	spi_write_dat(spi, 0x34);
-	spi_write_com(spi, 0xB901);	spi_write_dat(spi, 0x34);
-	spi_write_com(spi, 0xB902);	spi_write_dat(spi, 0x34);
-
-	/* VGLX ratio */
-	spi_write_com(spi, 0xBA00);	spi_write_dat(spi, 0x24);
-	spi_write_com(spi, 0xBA01);	spi_write_dat(spi, 0x24);
-	spi_write_com(spi, 0xBA02);	spi_write_dat(spi, 0x24);
-
-	/* VGMP/VGSP 4.7V/0V */
-	spi_write_com(spi, 0xBC00);	spi_write_dat(spi, 0x00);
-	spi_write_com(spi, 0xBC01);	spi_write_dat(spi, 0x88);
-	spi_write_com(spi, 0xBC02);	spi_write_dat(spi, 0x00);
-
-	/* VGMN/VGSN -4.7V/0V */
-	spi_write_com(spi, 0xBD00);	spi_write_dat(spi, 0x00);
-	spi_write_com(spi, 0xBD01);	spi_write_dat(spi, 0x88);
-	spi_write_com(spi, 0xBD02);	spi_write_dat(spi, 0x00);
-
-	/* VCOM 1.525V */
-	spi_write_com(spi, 0xBE00);	spi_write_dat(spi, 0x00);
-	spi_write_com(spi, 0xBE01);	spi_write_dat(spi, 0x7A);
-
-	/* Gamma Setting */
-	spi_write_com(spi, 0xD100);	spi_write_dat(spi, 0x00);
-	spi_write_com(spi, 0xD101);	spi_write_dat(spi, 0x05);
-	spi_write_com(spi, 0xD102);	spi_write_dat(spi, 0x00);
-	spi_write_com(spi, 0xD103);	spi_write_dat(spi, 0x15);
-	spi_write_com(spi, 0xD104);	spi_write_dat(spi, 0x00);
-	spi_write_com(spi, 0xD105);	spi_write_dat(spi, 0x30);
-	spi_write_com(spi, 0xD106);	spi_write_dat(spi, 0x00);
-	spi_write_com(spi, 0xD107);	spi_write_dat(spi, 0x47);
-	spi_write_com(spi, 0xD108);	spi_write_dat(spi, 0x00);
-	spi_write_com(spi, 0xD109);	spi_write_dat(spi, 0x5B);
-	spi_write_com(spi, 0xD10A);	spi_write_dat(spi, 0x00);
-	spi_write_com(spi, 0xD10B);	spi_write_dat(spi, 0x7D);
-	spi_write_com(spi, 0xD10C);	spi_write_dat(spi, 0x00);
-	spi_write_com(spi, 0xD10D);	spi_write_dat(spi, 0x9D);
-	spi_write_com(spi, 0xD10E);	spi_write_dat(spi, 0x00);
-	spi_write_com(spi, 0xD10F);	spi_write_dat(spi, 0xCC);
-	spi_write_com(spi, 0xD110);	spi_write_dat(spi, 0x00);
-	spi_write_com(spi, 0xD111);	spi_write_dat(spi, 0xF3);
-	spi_write_com(spi, 0xD112);	spi_write_dat(spi, 0x01);
-	spi_write_com(spi, 0xD113);	spi_write_dat(spi, 0x32);
-	spi_write_com(spi, 0xD114);	spi_write_dat(spi, 0x01);
-	spi_write_com(spi, 0xD115);	spi_write_dat(spi, 0x63);
-	spi_write_com(spi, 0xD116);	spi_write_dat(spi, 0x01);
-	spi_write_com(spi, 0xD117);	spi_write_dat(spi, 0xB1);
-	spi_write_com(spi, 0xD118);	spi_write_dat(spi, 0x01);
-	spi_write_com(spi, 0xD119);	spi_write_dat(spi, 0xF0);
-	spi_write_com(spi, 0xD11A);	spi_write_dat(spi, 0x01);
-	spi_write_com(spi, 0xD11B);	spi_write_dat(spi, 0xF2);
-	spi_write_com(spi, 0xD11C);	spi_write_dat(spi, 0x02);
-	spi_write_com(spi, 0xD11D);	spi_write_dat(spi, 0x2A);
-	spi_write_com(spi, 0xD11E);	spi_write_dat(spi, 0x02);
-	spi_write_com(spi, 0xD11F);	spi_write_dat(spi, 0x67);
-	spi_write_com(spi, 0xD120);	spi_write_dat(spi, 0x02);
-	spi_write_com(spi, 0xD121);	spi_write_dat(spi, 0x90);
-	spi_write_com(spi, 0xD122);	spi_write_dat(spi, 0x02);
-	spi_write_com(spi, 0xD123);	spi_write_dat(spi, 0xCB);
-	spi_write_com(spi, 0xD124);	spi_write_dat(spi, 0x02);
-	spi_write_com(spi, 0xD125);	spi_write_dat(spi, 0xF2);
-	spi_write_com(spi, 0xD126);	spi_write_dat(spi, 0x03);
-	spi_write_com(spi, 0xD127);	spi_write_dat(spi, 0x2A);
-	spi_write_com(spi, 0xD128);	spi_write_dat(spi, 0x03);
-	spi_write_com(spi, 0xD129);	spi_write_dat(spi, 0x51);
-	spi_write_com(spi, 0xD12A);	spi_write_dat(spi, 0x03);
-	spi_write_com(spi, 0xD12B);	spi_write_dat(spi, 0x80);
-	spi_write_com(spi, 0xD12C);	spi_write_dat(spi, 0x03);
-	spi_write_com(spi, 0xD12D);	spi_write_dat(spi, 0x9F);
-	spi_write_com(spi, 0xD12E);	spi_write_dat(spi, 0x03);
-	spi_write_com(spi, 0xD12F);	spi_write_dat(spi, 0xBE);
-	spi_write_com(spi, 0xD130);	spi_write_dat(spi, 0x03);
-	spi_write_com(spi, 0xD131);	spi_write_dat(spi, 0xF9);
-	spi_write_com(spi, 0xD132);	spi_write_dat(spi, 0x03);
-	spi_write_com(spi, 0xD133);	spi_write_dat(spi, 0xFF);
-
-	spi_write_com(spi, 0xD200);	spi_write_dat(spi, 0x00);
-	spi_write_com(spi, 0xD201);	spi_write_dat(spi, 0x05);
-	spi_write_com(spi, 0xD202);	spi_write_dat(spi, 0x00);
-	spi_write_com(spi, 0xD203);	spi_write_dat(spi, 0x15);
-	spi_write_com(spi, 0xD204);	spi_write_dat(spi, 0x00);
-	spi_write_com(spi, 0xD205);	spi_write_dat(spi, 0x30);
-	spi_write_com(spi, 0xD206);	spi_write_dat(spi, 0x00);
-	spi_write_com(spi, 0xD207);	spi_write_dat(spi, 0x47);
-	spi_write_com(spi, 0xD208);	spi_write_dat(spi, 0x00);
-	spi_write_com(spi, 0xD209);	spi_write_dat(spi, 0x5B);
-	spi_write_com(spi, 0xD20A);	spi_write_dat(spi, 0x00);
-	spi_write_com(spi, 0xD20B);	spi_write_dat(spi, 0x7D);
-	spi_write_com(spi, 0xD20C);	spi_write_dat(spi, 0x00);
-	spi_write_com(spi, 0xD20D);	spi_write_dat(spi, 0x9D);
-	spi_write_com(spi, 0xD20E);	spi_write_dat(spi, 0x00);
-	spi_write_com(spi, 0xD20F);	spi_write_dat(spi, 0xCC);
-	spi_write_com(spi, 0xD210);	spi_write_dat(spi, 0x00);
-	spi_write_com(spi, 0xD211);	spi_write_dat(spi, 0xF3);
-	spi_write_com(spi, 0xD212);	spi_write_dat(spi, 0x01);
-	spi_write_com(spi, 0xD213);	spi_write_dat(spi, 0x32);
-	spi_write_com(spi, 0xD214);	spi_write_dat(spi, 0x01);
-	spi_write_com(spi, 0xD215);	spi_write_dat(spi, 0x63);
-	spi_write_com(spi, 0xD216);	spi_write_dat(spi, 0x01);
-	spi_write_com(spi, 0xD217);	spi_write_dat(spi, 0xB1);
-	spi_write_com(spi, 0xD218);	spi_write_dat(spi, 0x01);
-	spi_write_com(spi, 0xD219);	spi_write_dat(spi, 0xF0);
-	spi_write_com(spi, 0xD21A);	spi_write_dat(spi, 0x01);
-	spi_write_com(spi, 0xD21B);	spi_write_dat(spi, 0xF2);
-	spi_write_com(spi, 0xD21C);	spi_write_dat(spi, 0x02);
-	spi_write_com(spi, 0xD21D);	spi_write_dat(spi, 0x2A);
-	spi_write_com(spi, 0xD21E);	spi_write_dat(spi, 0x02);
-	spi_write_com(spi, 0xD21F);	spi_write_dat(spi, 0x67);
-	spi_write_com(spi, 0xD220);	spi_write_dat(spi, 0x02);
-	spi_write_com(spi, 0xD221);	spi_write_dat(spi, 0x90);
-	spi_write_com(spi, 0xD222);	spi_write_dat(spi, 0x02);
-	spi_write_com(spi, 0xD223);	spi_write_dat(spi, 0xCB);
-	spi_write_com(spi, 0xD224);	spi_write_dat(spi, 0x02);
-	spi_write_com(spi, 0xD225);	spi_write_dat(spi, 0xF2);
-	spi_write_com(spi, 0xD226);	spi_write_dat(spi, 0x03);
-	spi_write_com(spi, 0xD227);	spi_write_dat(spi, 0x2A);
-	spi_write_com(spi, 0xD228);	spi_write_dat(spi, 0x03);
-	spi_write_com(spi, 0xD229);	spi_write_dat(spi, 0x51);
-	spi_write_com(spi, 0xD22A);	spi_write_dat(spi, 0x03);
-	spi_write_com(spi, 0xD22B);	spi_write_dat(spi, 0x80);
-	spi_write_com(spi, 0xD22C);	spi_write_dat(spi, 0x03);
-	spi_write_com(spi, 0xD22D);	spi_write_dat(spi, 0x9F);
-	spi_write_com(spi, 0xD22E);	spi_write_dat(spi, 0x03);
-	spi_write_com(spi, 0xD22F);	spi_write_dat(spi, 0xBE);
-	spi_write_com(spi, 0xD230);	spi_write_dat(spi, 0x03);
-	spi_write_com(spi, 0xD231);	spi_write_dat(spi, 0xF9);
-	spi_write_com(spi, 0xD232);	spi_write_dat(spi, 0x03);
-	spi_write_com(spi, 0xD233);	spi_write_dat(spi, 0xFF);
-
-	spi_write_com(spi, 0xD300);	spi_write_dat(spi, 0x00);
-	spi_write_com(spi, 0xD301);	spi_write_dat(spi, 0x05);
-	spi_write_com(spi, 0xD302);	spi_write_dat(spi, 0x00);
-	spi_write_com(spi, 0xD303);	spi_write_dat(spi, 0x15);
-	spi_write_com(spi, 0xD304);	spi_write_dat(spi, 0x00);
-	spi_write_com(spi, 0xD305);	spi_write_dat(spi, 0x30);
-	spi_write_com(spi, 0xD306);	spi_write_dat(spi, 0x00);
-	spi_write_com(spi, 0xD307);	spi_write_dat(spi, 0x47);
-	spi_write_com(spi, 0xD308);	spi_write_dat(spi, 0x00);
-	spi_write_com(spi, 0xD309);	spi_write_dat(spi, 0x5B);
-	spi_write_com(spi, 0xD30A);	spi_write_dat(spi, 0x00);
-	spi_write_com(spi, 0xD30B);	spi_write_dat(spi, 0x7D);
-	spi_write_com(spi, 0xD30C);	spi_write_dat(spi, 0x00);
-	spi_write_com(spi, 0xD30D);	spi_write_dat(spi, 0x9D);
-	spi_write_com(spi, 0xD30E);	spi_write_dat(spi, 0x00);
-	spi_write_com(spi, 0xD30F);	spi_write_dat(spi, 0xCC);
-	spi_write_com(spi, 0xD310);	spi_write_dat(spi, 0x00);
-	spi_write_com(spi, 0xD311);	spi_write_dat(spi, 0xF3);
-	spi_write_com(spi, 0xD312);	spi_write_dat(spi, 0x01);
-	spi_write_com(spi, 0xD313);	spi_write_dat(spi, 0x32);
-	spi_write_com(spi, 0xD314);	spi_write_dat(spi, 0x01);
-	spi_write_com(spi, 0xD315);	spi_write_dat(spi, 0x63);
-	spi_write_com(spi, 0xD316);	spi_write_dat(spi, 0x01);
-	spi_write_com(spi, 0xD317);	spi_write_dat(spi, 0xB1);
-	spi_write_com(spi, 0xD318);	spi_write_dat(spi, 0x01);
-	spi_write_com(spi, 0xD319);	spi_write_dat(spi, 0xF0);
-	spi_write_com(spi, 0xD31A);	spi_write_dat(spi, 0x01);
-	spi_write_com(spi, 0xD31B);	spi_write_dat(spi, 0xF2);
-	spi_write_com(spi, 0xD31C);	spi_write_dat(spi, 0x02);
-	spi_write_com(spi, 0xD31D);	spi_write_dat(spi, 0x2A);
-	spi_write_com(spi, 0xD31E);	spi_write_dat(spi, 0x02);
-	spi_write_com(spi, 0xD31F);	spi_write_dat(spi, 0x67);
-	spi_write_com(spi, 0xD320);	spi_write_dat(spi, 0x02);
-	spi_write_com(spi, 0xD321);	spi_write_dat(spi, 0x90);
-	spi_write_com(spi, 0xD322);	spi_write_dat(spi, 0x02);
-	spi_write_com(spi, 0xD323);	spi_write_dat(spi, 0xCB);
-	spi_write_com(spi, 0xD324);	spi_write_dat(spi, 0x02);
-	spi_write_com(spi, 0xD325);	spi_write_dat(spi, 0xF2);
-	spi_write_com(spi, 0xD326);	spi_write_dat(spi, 0x03);
-	spi_write_com(spi, 0xD327);	spi_write_dat(spi, 0x2A);
-	spi_write_com(spi, 0xD328);	spi_write_dat(spi, 0x03);
-	spi_write_com(spi, 0xD329);	spi_write_dat(spi, 0x51);
-	spi_write_com(spi, 0xD32A);	spi_write_dat(spi, 0x03);
-	spi_write_com(spi, 0xD32B);	spi_write_dat(spi, 0x80);
-	spi_write_com(spi, 0xD32C);	spi_write_dat(spi, 0x03);
-	spi_write_com(spi, 0xD32D);	spi_write_dat(spi, 0x9F);
-	spi_write_com(spi, 0xD32E);	spi_write_dat(spi, 0x03);
-	spi_write_com(spi, 0xD32F);	spi_write_dat(spi, 0xBE);
-	spi_write_com(spi, 0xD330);	spi_write_dat(spi, 0x03);
-	spi_write_com(spi, 0xD331);	spi_write_dat(spi, 0xF9);
-	spi_write_com(spi, 0xD332);	spi_write_dat(spi, 0x03);
-	spi_write_com(spi, 0xD333);	spi_write_dat(spi, 0xFF);
-
-	spi_write_com(spi, 0xD400);	spi_write_dat(spi, 0x00);
-	spi_write_com(spi, 0xD401);	spi_write_dat(spi, 0x05);
-	spi_write_com(spi, 0xD402);	spi_write_dat(spi, 0x00);
-	spi_write_com(spi, 0xD403);	spi_write_dat(spi, 0x15);
-	spi_write_com(spi, 0xD404);	spi_write_dat(spi, 0x00);
-	spi_write_com(spi, 0xD405);	spi_write_dat(spi, 0x30);
-	spi_write_com(spi, 0xD406);	spi_write_dat(spi, 0x00);
-	spi_write_com(spi, 0xD407);	spi_write_dat(spi, 0x47);
-	spi_write_com(spi, 0xD408);	spi_write_dat(spi, 0x00);
-	spi_write_com(spi, 0xD409);	spi_write_dat(spi, 0x5B);
-	spi_write_com(spi, 0xD40A);	spi_write_dat(spi, 0x00);
-	spi_write_com(spi, 0xD40B);	spi_write_dat(spi, 0x7D);
-	spi_write_com(spi, 0xD40C);	spi_write_dat(spi, 0x00);
-	spi_write_com(spi, 0xD40D);	spi_write_dat(spi, 0x9D);
-	spi_write_com(spi, 0xD40E);	spi_write_dat(spi, 0x00);
-	spi_write_com(spi, 0xD40F);	spi_write_dat(spi, 0xCC);
-	spi_write_com(spi, 0xD410);	spi_write_dat(spi, 0x00);
-	spi_write_com(spi, 0xD411);	spi_write_dat(spi, 0xF3);
-	spi_write_com(spi, 0xD412);	spi_write_dat(spi, 0x01);
-	spi_write_com(spi, 0xD413);	spi_write_dat(spi, 0x32);
-	spi_write_com(spi, 0xD414);	spi_write_dat(spi, 0x01);
-	spi_write_com(spi, 0xD415);	spi_write_dat(spi, 0x63);
-	spi_write_com(spi, 0xD416);	spi_write_dat(spi, 0x01);
-	spi_write_com(spi, 0xD417);	spi_write_dat(spi, 0xB1);
-	spi_write_com(spi, 0xD418);	spi_write_dat(spi, 0x01);
-	spi_write_com(spi, 0xD419);	spi_write_dat(spi, 0xF0);
-	spi_write_com(spi, 0xD41A);	spi_write_dat(spi, 0x01);
-	spi_write_com(spi, 0xD41B);	spi_write_dat(spi, 0xF2);
-	spi_write_com(spi, 0xD41C);	spi_write_dat(spi, 0x02);
-	spi_write_com(spi, 0xD41D);	spi_write_dat(spi, 0x2A);
-	spi_write_com(spi, 0xD41E);	spi_write_dat(spi, 0x02);
-	spi_write_com(spi, 0xD41F);	spi_write_dat(spi, 0x67);
-	spi_write_com(spi, 0xD420);	spi_write_dat(spi, 0x02);
-	spi_write_com(spi, 0xD421);	spi_write_dat(spi, 0x90);
-	spi_write_com(spi, 0xD422);	spi_write_dat(spi, 0x02);
-	spi_write_com(spi, 0xD423);	spi_write_dat(spi, 0xCB);
-	spi_write_com(spi, 0xD424);	spi_write_dat(spi, 0x02);
-	spi_write_com(spi, 0xD425);	spi_write_dat(spi, 0xF2);
-	spi_write_com(spi, 0xD426);	spi_write_dat(spi, 0x03);
-	spi_write_com(spi, 0xD427);	spi_write_dat(spi, 0x2A);
-	spi_write_com(spi, 0xD428);	spi_write_dat(spi, 0x03);
-	spi_write_com(spi, 0xD429);	spi_write_dat(spi, 0x51);
-	spi_write_com(spi, 0xD42A);	spi_write_dat(spi, 0x03);
-	spi_write_com(spi, 0xD42B);	spi_write_dat(spi, 0x80);
-	spi_write_com(spi, 0xD42C);	spi_write_dat(spi, 0x03);
-	spi_write_com(spi, 0xD42D);	spi_write_dat(spi, 0x9F);
-	spi_write_com(spi, 0xD42E);	spi_write_dat(spi, 0x03);
-	spi_write_com(spi, 0xD42F);	spi_write_dat(spi, 0xBE);
-	spi_write_com(spi, 0xD430);	spi_write_dat(spi, 0x03);
-	spi_write_com(spi, 0xD431);	spi_write_dat(spi, 0xF9);
-	spi_write_com(spi, 0xD432);	spi_write_dat(spi, 0x03);
-	spi_write_com(spi, 0xD433);	spi_write_dat(spi, 0xFF);
-
-	spi_write_com(spi, 0xD500);	spi_write_dat(spi, 0x00);
-	spi_write_com(spi, 0xD501);	spi_write_dat(spi, 0x05);
-	spi_write_com(spi, 0xD502);	spi_write_dat(spi, 0x00);
-	spi_write_com(spi, 0xD503);	spi_write_dat(spi, 0x15);
-	spi_write_com(spi, 0xD504);	spi_write_dat(spi, 0x00);
-	spi_write_com(spi, 0xD505);	spi_write_dat(spi, 0x30);
-	spi_write_com(spi, 0xD506);	spi_write_dat(spi, 0x00);
-	spi_write_com(spi, 0xD507);	spi_write_dat(spi, 0x47);
-	spi_write_com(spi, 0xD508);	spi_write_dat(spi, 0x00);
-	spi_write_com(spi, 0xD509);	spi_write_dat(spi, 0x5B);
-	spi_write_com(spi, 0xD50A);	spi_write_dat(spi, 0x00);
-	spi_write_com(spi, 0xD50B);	spi_write_dat(spi, 0x7D);
-	spi_write_com(spi, 0xD50C);	spi_write_dat(spi, 0x00);
-	spi_write_com(spi, 0xD50D);	spi_write_dat(spi, 0x9D);
-	spi_write_com(spi, 0xD50E);	spi_write_dat(spi, 0x00);
-	spi_write_com(spi, 0xD50F);	spi_write_dat(spi, 0xCC);
-	spi_write_com(spi, 0xD510);	spi_write_dat(spi, 0x00);
-	spi_write_com(spi, 0xD511);	spi_write_dat(spi, 0xF3);
-	spi_write_com(spi, 0xD512);	spi_write_dat(spi, 0x01);
-	spi_write_com(spi, 0xD513);	spi_write_dat(spi, 0x32);
-	spi_write_com(spi, 0xD514);	spi_write_dat(spi, 0x01);
-	spi_write_com(spi, 0xD515);	spi_write_dat(spi, 0x63);
-	spi_write_com(spi, 0xD516);	spi_write_dat(spi, 0x01);
-	spi_write_com(spi, 0xD517);	spi_write_dat(spi, 0xB1);
-	spi_write_com(spi, 0xD518);	spi_write_dat(spi, 0x01);
-	spi_write_com(spi, 0xD519);	spi_write_dat(spi, 0xF0);
-	spi_write_com(spi, 0xD51A);	spi_write_dat(spi, 0x01);
-	spi_write_com(spi, 0xD51B);	spi_write_dat(spi, 0xF2);
-	spi_write_com(spi, 0xD51C);	spi_write_dat(spi, 0x02);
-	spi_write_com(spi, 0xD51D);	spi_write_dat(spi, 0x2A);
-	spi_write_com(spi, 0xD51E);	spi_write_dat(spi, 0x02);
-	spi_write_com(spi, 0xD51F);	spi_write_dat(spi, 0x67);
-	spi_write_com(spi, 0xD520);	spi_write_dat(spi, 0x02);
-	spi_write_com(spi, 0xD521);	spi_write_dat(spi, 0x90);
-	spi_write_com(spi, 0xD522);	spi_write_dat(spi, 0x02);
-	spi_write_com(spi, 0xD523);	spi_write_dat(spi, 0xCB);
-	spi_write_com(spi, 0xD524);	spi_write_dat(spi, 0x02);
-	spi_write_com(spi, 0xD525);	spi_write_dat(spi, 0xF2);
-	spi_write_com(spi, 0xD526);	spi_write_dat(spi, 0x03);
-	spi_write_com(spi, 0xD527);	spi_write_dat(spi, 0x2A);
-	spi_write_com(spi, 0xD528);	spi_write_dat(spi, 0x03);
-	spi_write_com(spi, 0xD529);	spi_write_dat(spi, 0x51);
-	spi_write_com(spi, 0xD52A);	spi_write_dat(spi, 0x03);
-	spi_write_com(spi, 0xD52B);	spi_write_dat(spi, 0x80);
-	spi_write_com(spi, 0xD52C);	spi_write_dat(spi, 0x03);
-	spi_write_com(spi, 0xD52D);	spi_write_dat(spi, 0x9F);
-	spi_write_com(spi, 0xD52E);	spi_write_dat(spi, 0x03);
-	spi_write_com(spi, 0xD52F);	spi_write_dat(spi, 0xBE);
-	spi_write_com(spi, 0xD530);	spi_write_dat(spi, 0x03);
-	spi_write_com(spi, 0xD531);	spi_write_dat(spi, 0xF9);
-	spi_write_com(spi, 0xD532);	spi_write_dat(spi, 0x03);
-	spi_write_com(spi, 0xD533);	spi_write_dat(spi, 0xFF);
-
-	spi_write_com(spi, 0xD600);	spi_write_dat(spi, 0x00);
-	spi_write_com(spi, 0xD601);	spi_write_dat(spi, 0x05);
-	spi_write_com(spi, 0xD602);	spi_write_dat(spi, 0x00);
-	spi_write_com(spi, 0xD603);	spi_write_dat(spi, 0x15);
-	spi_write_com(spi, 0xD604);	spi_write_dat(spi, 0x00);
-	spi_write_com(spi, 0xD605);	spi_write_dat(spi, 0x30);
-	spi_write_com(spi, 0xD606);	spi_write_dat(spi, 0x00);
-	spi_write_com(spi, 0xD607);	spi_write_dat(spi, 0x47);
-	spi_write_com(spi, 0xD608);	spi_write_dat(spi, 0x00);
-	spi_write_com(spi, 0xD609);	spi_write_dat(spi, 0x5B);
-	spi_write_com(spi, 0xD60A);	spi_write_dat(spi, 0x00);
-	spi_write_com(spi, 0xD60B);	spi_write_dat(spi, 0x7D);
-	spi_write_com(spi, 0xD60C);	spi_write_dat(spi, 0x00);
-	spi_write_com(spi, 0xD60D);	spi_write_dat(spi, 0x9D);
-	spi_write_com(spi, 0xD60E);	spi_write_dat(spi, 0x00);
-	spi_write_com(spi, 0xD60F);	spi_write_dat(spi, 0xCC);
-	spi_write_com(spi, 0xD610);	spi_write_dat(spi, 0x00);
-	spi_write_com(spi, 0xD611);	spi_write_dat(spi, 0xF3);
-	spi_write_com(spi, 0xD612);	spi_write_dat(spi, 0x01);
-	spi_write_com(spi, 0xD613);	spi_write_dat(spi, 0x32);
-	spi_write_com(spi, 0xD614);	spi_write_dat(spi, 0x01);
-	spi_write_com(spi, 0xD615);	spi_write_dat(spi, 0x63);
-	spi_write_com(spi, 0xD616);	spi_write_dat(spi, 0x01);
-	spi_write_com(spi, 0xD617);	spi_write_dat(spi, 0xB1);
-	spi_write_com(spi, 0xD618);	spi_write_dat(spi, 0x01);
-	spi_write_com(spi, 0xD619);	spi_write_dat(spi, 0xF0);
-	spi_write_com(spi, 0xD61A);	spi_write_dat(spi, 0x01);
-	spi_write_com(spi, 0xD61B);	spi_write_dat(spi, 0xF2);
-	spi_write_com(spi, 0xD61C);	spi_write_dat(spi, 0x02);
-	spi_write_com(spi, 0xD61D);	spi_write_dat(spi, 0x2A);
-	spi_write_com(spi, 0xD61E);	spi_write_dat(spi, 0x02);
-	spi_write_com(spi, 0xD61F);	spi_write_dat(spi, 0x67);
-	spi_write_com(spi, 0xD620);	spi_write_dat(spi, 0x02);
-	spi_write_com(spi, 0xD621);	spi_write_dat(spi, 0x90);
-	spi_write_com(spi, 0xD622);	spi_write_dat(spi, 0x02);
-	spi_write_com(spi, 0xD623);	spi_write_dat(spi, 0xCB);
-	spi_write_com(spi, 0xD624);	spi_write_dat(spi, 0x02);
-	spi_write_com(spi, 0xD625);	spi_write_dat(spi, 0xF2);
-	spi_write_com(spi, 0xD626);	spi_write_dat(spi, 0x03);
-	spi_write_com(spi, 0xD627);	spi_write_dat(spi, 0x2A);
-	spi_write_com(spi, 0xD628);	spi_write_dat(spi, 0x03);
-	spi_write_com(spi, 0xD629);	spi_write_dat(spi, 0x51);
-	spi_write_com(spi, 0xD62A);	spi_write_dat(spi, 0x03);
-	spi_write_com(spi, 0xD62B);	spi_write_dat(spi, 0x80);
-	spi_write_com(spi, 0xD62C);	spi_write_dat(spi, 0x03);
-	spi_write_com(spi, 0xD62D);	spi_write_dat(spi, 0x9F);
-	spi_write_com(spi, 0xD62E);	spi_write_dat(spi, 0x03);
-	spi_write_com(spi, 0xD62F);	spi_write_dat(spi, 0xBE);
-	spi_write_com(spi, 0xD630);	spi_write_dat(spi, 0x03);
-	spi_write_com(spi, 0xD631);	spi_write_dat(spi, 0xF9);
-	spi_write_com(spi, 0xD632);	spi_write_dat(spi, 0x03);
-	spi_write_com(spi, 0xD633);	spi_write_dat(spi, 0xFF);
-
-	/* LV2 Page 0 enable */
-	spi_write_com(spi, 0xF000);	spi_write_dat(spi, 0x55);
-	spi_write_com(spi, 0xF001);	spi_write_dat(spi, 0xAA);
-	spi_write_com(spi, 0xF002);	spi_write_dat(spi, 0x52);
-	spi_write_com(spi, 0xF003);	spi_write_dat(spi, 0x08);
-	spi_write_com(spi, 0xF004);	spi_write_dat(spi, 0x00);
-
-	/* Display control */
-	spi_write_com(spi, 0xB100);	spi_write_dat(spi, 0xFC);
-	spi_write_com(spi, 0xB101);	spi_write_dat(spi, 0x00);
-
-	/* Source hold time */
-	spi_write_com(spi, 0xB600);	spi_write_dat(spi, 0x05);
-
-	/* Gate EQ control */
-	spi_write_com(spi, 0xB700);	spi_write_dat(spi, 0x70);
-	spi_write_com(spi, 0xB701);	spi_write_dat(spi, 0x70);
-
-	/* Source EQ control (Mode 2) */
-	spi_write_com(spi, 0xB800);	spi_write_dat(spi, 0x01);
-	spi_write_com(spi, 0xB801);	spi_write_dat(spi, 0x05);
-	spi_write_com(spi, 0xB802);	spi_write_dat(spi, 0x05);
-	spi_write_com(spi, 0xB803);	spi_write_dat(spi, 0x05);
-
-	/* Inversion mode  (Column) */
-	spi_write_com(spi, 0xBC00);	spi_write_dat(spi, 0x00);
-	spi_write_com(spi, 0xBC01);	spi_write_dat(spi, 0x00);
-	spi_write_com(spi, 0xBC02);	spi_write_dat(spi, 0x00);
-
-	/* Timing control 8phase dual side/4H/4delay/RST_EN */
-	spi_write_com(spi, 0xC900);	spi_write_dat(spi, 0xD0);
-	spi_write_com(spi, 0xC901);	spi_write_dat(spi, 0x82);
-	spi_write_com(spi, 0xC902);	spi_write_dat(spi, 0x50);
-	spi_write_com(spi, 0xC903);	spi_write_dat(spi, 0x50);
-	spi_write_com(spi, 0xC904);	spi_write_dat(spi, 0x50);
-
-	spi_write_com(spi, 0x3A00);	spi_write_dat(spi, 0x55);
-	mdelay(120);
-	spi_write_com(spi, 0x1100);
-	mdelay(120);
-	spi_write_com(spi, 0x2900);
-	mdelay(120);
-	/* spi_write_com(spi, 0x2100);	spi_write_dat(spi, 0x00); */
-	spi_write_com(spi, 0x2C00);
-
-	return 0;
-err_claim_bus:
-	spi_free_slave(spi);
-	return -1;
-}
diff --git a/drivers/video/fsl_dcu_fb.c b/drivers/video/fsl_dcu_fb.c
deleted file mode 100644
index dc5b24c..0000000
--- a/drivers/video/fsl_dcu_fb.c
+++ /dev/null
@@ -1,549 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0+
-/*
- * Copyright 2014 Freescale Semiconductor, Inc.
- * Copyright 2019 Toradex AG
- *
- * FSL DCU Framebuffer driver
- */
-
-#include <init.h>
-#include <asm/cache.h>
-#include <asm/global_data.h>
-#include <asm/io.h>
-#include <common.h>
-#include <dm.h>
-#include <fdt_support.h>
-#include <fsl_dcu_fb.h>
-#include <linux/fb.h>
-#include <malloc.h>
-#include <video.h>
-#include <video_fb.h>
-#include "videomodes.h"
-
-/* Convert the X,Y resolution pair into a single number */
-#define RESOLUTION(x, y) (((u32)(x) << 16) | (y))
-
-#ifdef CONFIG_SYS_FSL_DCU_LE
-#define	dcu_read32	in_le32
-#define	dcu_write32	out_le32
-#elif defined(CONFIG_SYS_FSL_DCU_BE)
-#define	dcu_read32	in_be32
-#define	dcu_write32	out_be32
-#endif
-
-#define DCU_MODE_BLEND_ITER(x)          ((x) << 20)
-#define DCU_MODE_RASTER_EN		(1 << 14)
-#define DCU_MODE_NORMAL			1
-#define DCU_MODE_COLORBAR               3
-#define DCU_BGND_R(x)			((x) << 16)
-#define DCU_BGND_G(x)			((x) << 8)
-#define DCU_BGND_B(x)			(x)
-#define DCU_DISP_SIZE_DELTA_Y(x)	((x) << 16)
-#define DCU_DISP_SIZE_DELTA_X(x)	(x)
-#define DCU_HSYN_PARA_BP(x)		((x) << 22)
-#define DCU_HSYN_PARA_PW(x)		((x) << 11)
-#define DCU_HSYN_PARA_FP(x)		(x)
-#define DCU_VSYN_PARA_BP(x)		((x) << 22)
-#define DCU_VSYN_PARA_PW(x)		((x) << 11)
-#define DCU_VSYN_PARA_FP(x)		(x)
-#define DCU_SYN_POL_INV_PXCK_FALL	(1 << 6)
-#define DCU_SYN_POL_NEG_REMAIN		(0 << 5)
-#define DCU_SYN_POL_INV_VS_LOW		(1 << 1)
-#define DCU_SYN_POL_INV_HS_LOW		(1)
-#define DCU_THRESHOLD_LS_BF_VS(x)	((x) << 16)
-#define DCU_THRESHOLD_OUT_BUF_HIGH(x)	((x) << 8)
-#define DCU_THRESHOLD_OUT_BUF_LOW(x)	(x)
-#define DCU_UPDATE_MODE_MODE            (1 << 31)
-#define DCU_UPDATE_MODE_READREG         (1 << 30)
-
-#define DCU_CTRLDESCLN_1_HEIGHT(x)	((x) << 16)
-#define DCU_CTRLDESCLN_1_WIDTH(x)	(x)
-#define DCU_CTRLDESCLN_2_POSY(x)	((x) << 16)
-#define DCU_CTRLDESCLN_2_POSX(x)	(x)
-#define DCU_CTRLDESCLN_4_EN		(1 << 31)
-#define DCU_CTRLDESCLN_4_TILE_EN	(1 << 30)
-#define DCU_CTRLDESCLN_4_DATA_SEL_CLUT	(1 << 29)
-#define DCU_CTRLDESCLN_4_SAFETY_EN	(1 << 28)
-#define DCU_CTRLDESCLN_4_TRANS(x)	((x) << 20)
-#define DCU_CTRLDESCLN_4_BPP(x)		((x) << 16)
-#define DCU_CTRLDESCLN_4_RLE_EN		(1 << 15)
-#define DCU_CTRLDESCLN_4_LUOFFS(x)	((x) << 4)
-#define DCU_CTRLDESCLN_4_BB_ON		(1 << 2)
-#define DCU_CTRLDESCLN_4_AB(x)		(x)
-#define DCU_CTRLDESCLN_5_CKMAX_R(x)	((x) << 16)
-#define DCU_CTRLDESCLN_5_CKMAX_G(x)	((x) << 8)
-#define DCU_CTRLDESCLN_5_CKMAX_B(x)	(x)
-#define DCU_CTRLDESCLN_6_CKMIN_R(x)	((x) << 16)
-#define DCU_CTRLDESCLN_6_CKMIN_G(x)	((x) << 8)
-#define DCU_CTRLDESCLN_6_CKMIN_B(x)	(x)
-#define DCU_CTRLDESCLN_7_TILE_VER(x)	((x) << 16)
-#define DCU_CTRLDESCLN_7_TILE_HOR(x)	(x)
-#define DCU_CTRLDESCLN_8_FG_FCOLOR(x)	(x)
-#define DCU_CTRLDESCLN_9_BG_BCOLOR(x)	(x)
-
-#define BPP_16_RGB565			4
-#define BPP_24_RGB888			5
-#define BPP_32_ARGB8888			6
-
-DECLARE_GLOBAL_DATA_PTR;
-
-/*
- * This setting is used for the TWR_LCD_RGB card
- */
-static struct fb_videomode fsl_dcu_mode_480_272 = {
-	.name		= "480x272-60",
-	.refresh	= 60,
-	.xres		= 480,
-	.yres		= 272,
-	.pixclock	= 91996,
-	.left_margin	= 2,
-	.right_margin	= 2,
-	.upper_margin	= 1,
-	.lower_margin	= 1,
-	.hsync_len	= 41,
-	.vsync_len	= 2,
-	.sync		= FB_SYNC_COMP_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
-	.vmode		= FB_VMODE_NONINTERLACED
-};
-
-/*
- * This setting is used for Siliconimage SiI9022A HDMI
- */
-static struct fb_videomode fsl_dcu_cea_mode_640_480 = {
-	.name		= "640x480-60",
-	.refresh	= 60,
-	.xres		= 640,
-	.yres		= 480,
-	.pixclock	= 39722,
-	.left_margin	= 48,
-	.right_margin	= 16,
-	.upper_margin	= 33,
-	.lower_margin	= 10,
-	.hsync_len	= 96,
-	.vsync_len	= 2,
-	.sync		= 0,
-	.vmode		= FB_VMODE_NONINTERLACED,
-};
-
-static struct fb_videomode fsl_dcu_mode_640_480 = {
-	.name		= "640x480-60",
-	.refresh	= 60,
-	.xres		= 640,
-	.yres		= 480,
-	.pixclock	= 25175,
-	.left_margin	= 40,
-	.right_margin	= 24,
-	.upper_margin	= 32,
-	.lower_margin	= 11,
-	.hsync_len	= 96,
-	.vsync_len	= 2,
-	.sync		= 0,
-	.vmode		= FB_VMODE_NONINTERLACED,
-};
-
-static struct fb_videomode fsl_dcu_mode_800_480 = {
-	.name		= "800x480-60",
-	.refresh	= 60,
-	.xres		= 800,
-	.yres		= 480,
-	.pixclock	= 33260,
-	.left_margin	= 216,
-	.right_margin	= 40,
-	.upper_margin	= 35,
-	.lower_margin	= 10,
-	.hsync_len	= 128,
-	.vsync_len	= 2,
-	.sync		= 0,
-	.vmode		= FB_VMODE_NONINTERLACED,
-};
-
-static struct fb_videomode fsl_dcu_mode_1024_600 = {
-	.name		= "1024x600-60",
-	.refresh	= 60,
-	.xres		= 1024,
-	.yres		= 600,
-	.pixclock	= 48000,
-	.left_margin	= 104,
-	.right_margin	= 43,
-	.upper_margin	= 24,
-	.lower_margin	= 20,
-	.hsync_len	= 5,
-	.vsync_len	= 5,
-	.sync		= 0,
-	.vmode		= FB_VMODE_NONINTERLACED,
-};
-
-/*
- * DCU register map
- */
-struct dcu_reg {
-	u32 desc_cursor[4];
-	u32 mode;
-	u32 bgnd;
-	u32 disp_size;
-	u32 hsyn_para;
-	u32 vsyn_para;
-	u32 synpol;
-	u32 threshold;
-	u32 int_status;
-	u32 int_mask;
-	u32 colbar[8];
-	u32 div_ratio;
-	u32 sign_calc[2];
-	u32 crc_val;
-	u8 res_064[0x6c-0x64];
-	u32 parr_err_status1;
-	u8 res_070[0x7c-0x70];
-	u32 parr_err_status3;
-	u32 mparr_err_status1;
-	u8 res_084[0x90-0x84];
-	u32 mparr_err_status3;
-	u32 threshold_inp_buf[2];
-	u8 res_09c[0xa0-0x9c];
-	u32 luma_comp;
-	u32 chroma_red;
-	u32 chroma_green;
-	u32 chroma_blue;
-	u32 crc_pos;
-	u32 lyr_intpol_en;
-	u32 lyr_luma_comp;
-	u32 lyr_chrm_red;
-	u32 lyr_chrm_grn;
-	u32 lyr_chrm_blue;
-	u8 res_0c4[0xcc-0xc8];
-	u32 update_mode;
-	u32 underrun;
-	u8 res_0d4[0x100-0xd4];
-	u32 gpr;
-	u32 slr_l[2];
-	u32 slr_disp_size;
-	u32 slr_hvsync_para;
-	u32 slr_pol;
-	u32 slr_l_transp[2];
-	u8 res_120[0x200-0x120];
-	u32 ctrldescl[DCU_LAYER_MAX_NUM][16];
-};
-
-static void reset_total_layers(void)
-{
-	struct dcu_reg *regs = (struct dcu_reg *)CONFIG_SYS_DCU_ADDR;
-	int i;
-
-	for (i = 0; i < DCU_LAYER_MAX_NUM; i++) {
-		dcu_write32(&regs->ctrldescl[i][0], 0);
-		dcu_write32(&regs->ctrldescl[i][1], 0);
-		dcu_write32(&regs->ctrldescl[i][2], 0);
-		dcu_write32(&regs->ctrldescl[i][3], 0);
-		dcu_write32(&regs->ctrldescl[i][4], 0);
-		dcu_write32(&regs->ctrldescl[i][5], 0);
-		dcu_write32(&regs->ctrldescl[i][6], 0);
-		dcu_write32(&regs->ctrldescl[i][7], 0);
-		dcu_write32(&regs->ctrldescl[i][8], 0);
-		dcu_write32(&regs->ctrldescl[i][9], 0);
-		dcu_write32(&regs->ctrldescl[i][10], 0);
-	}
-}
-
-static int layer_ctrldesc_init(struct fb_info fbinfo,
-			       int index, u32 pixel_format)
-{
-	struct dcu_reg *regs = (struct dcu_reg *)CONFIG_SYS_DCU_ADDR;
-	unsigned int bpp = BPP_24_RGB888;
-
-	dcu_write32(&regs->ctrldescl[index][0],
-		    DCU_CTRLDESCLN_1_HEIGHT(fbinfo.var.yres) |
-		    DCU_CTRLDESCLN_1_WIDTH(fbinfo.var.xres));
-
-	dcu_write32(&regs->ctrldescl[index][1],
-		    DCU_CTRLDESCLN_2_POSY(0) |
-		    DCU_CTRLDESCLN_2_POSX(0));
-
-	dcu_write32(&regs->ctrldescl[index][2],
-		    (unsigned int)fbinfo.screen_base);
-
-	switch (pixel_format) {
-	case 16:
-		bpp = BPP_16_RGB565;
-		break;
-	case 24:
-		bpp = BPP_24_RGB888;
-		break;
-	case 32:
-		bpp = BPP_32_ARGB8888;
-		break;
-	default:
-		printf("unsupported color depth: %u\n", pixel_format);
-	}
-
-	dcu_write32(&regs->ctrldescl[index][3],
-		    DCU_CTRLDESCLN_4_EN |
-		    DCU_CTRLDESCLN_4_TRANS(0xff) |
-		    DCU_CTRLDESCLN_4_BPP(bpp) |
-		    DCU_CTRLDESCLN_4_AB(0));
-
-	dcu_write32(&regs->ctrldescl[index][4],
-		    DCU_CTRLDESCLN_5_CKMAX_R(0xff) |
-		    DCU_CTRLDESCLN_5_CKMAX_G(0xff) |
-		    DCU_CTRLDESCLN_5_CKMAX_B(0xff));
-	dcu_write32(&regs->ctrldescl[index][5],
-		    DCU_CTRLDESCLN_6_CKMIN_R(0) |
-		    DCU_CTRLDESCLN_6_CKMIN_G(0) |
-		    DCU_CTRLDESCLN_6_CKMIN_B(0));
-
-	dcu_write32(&regs->ctrldescl[index][6],
-		    DCU_CTRLDESCLN_7_TILE_VER(0) |
-		    DCU_CTRLDESCLN_7_TILE_HOR(0));
-
-	dcu_write32(&regs->ctrldescl[index][7], DCU_CTRLDESCLN_8_FG_FCOLOR(0));
-	dcu_write32(&regs->ctrldescl[index][8], DCU_CTRLDESCLN_9_BG_BCOLOR(0));
-
-	return 0;
-}
-
-int fsl_dcu_init(struct fb_info *fbinfo, unsigned int xres,
-		 unsigned int yres, unsigned int pixel_format)
-{
-	struct dcu_reg *regs = (struct dcu_reg *)CONFIG_SYS_DCU_ADDR;
-	unsigned int div, mode;
-/*
- * When DM_VIDEO is enabled reservation of framebuffer is done
- * in advance during bind() call.
- */
-#if !CONFIG_IS_ENABLED(DM_VIDEO)
-	fbinfo->screen_size = fbinfo->var.xres * fbinfo->var.yres *
-			     (fbinfo->var.bits_per_pixel / 8);
-
-	if (fbinfo->screen_size > CONFIG_VIDEO_FSL_DCU_MAX_FB_SIZE_MB) {
-		fbinfo->screen_size = 0;
-		return -ENOMEM;
-	}
-	/* Reserve framebuffer at the end of memory */
-	gd->fb_base = gd->bd->bi_dram[0].start +
-			gd->bd->bi_dram[0].size - fbinfo->screen_size;
-	fbinfo->screen_base = (char *)gd->fb_base;
-
-	memset(fbinfo->screen_base, 0, fbinfo->screen_size);
-#endif
-
-	reset_total_layers();
-
-	dcu_write32(&regs->disp_size,
-		    DCU_DISP_SIZE_DELTA_Y(fbinfo->var.yres) |
-		    DCU_DISP_SIZE_DELTA_X(fbinfo->var.xres / 16));
-
-	dcu_write32(&regs->hsyn_para,
-		    DCU_HSYN_PARA_BP(fbinfo->var.left_margin) |
-		    DCU_HSYN_PARA_PW(fbinfo->var.hsync_len) |
-		    DCU_HSYN_PARA_FP(fbinfo->var.right_margin));
-
-	dcu_write32(&regs->vsyn_para,
-		    DCU_VSYN_PARA_BP(fbinfo->var.upper_margin) |
-		    DCU_VSYN_PARA_PW(fbinfo->var.vsync_len) |
-		    DCU_VSYN_PARA_FP(fbinfo->var.lower_margin));
-
-	dcu_write32(&regs->synpol,
-		    DCU_SYN_POL_INV_PXCK_FALL |
-		    DCU_SYN_POL_NEG_REMAIN |
-		    DCU_SYN_POL_INV_VS_LOW |
-		    DCU_SYN_POL_INV_HS_LOW);
-
-	dcu_write32(&regs->bgnd,
-		    DCU_BGND_R(0) | DCU_BGND_G(0) | DCU_BGND_B(0));
-
-	dcu_write32(&regs->mode,
-		    DCU_MODE_BLEND_ITER(2) |
-		    DCU_MODE_RASTER_EN);
-
-	dcu_write32(&regs->threshold,
-		    DCU_THRESHOLD_LS_BF_VS(0x3) |
-		    DCU_THRESHOLD_OUT_BUF_HIGH(0x78) |
-		    DCU_THRESHOLD_OUT_BUF_LOW(0));
-
-	mode = dcu_read32(&regs->mode);
-	dcu_write32(&regs->mode, mode | DCU_MODE_NORMAL);
-
-	layer_ctrldesc_init(*fbinfo, 0, pixel_format);
-
-	div = dcu_set_pixel_clock(fbinfo->var.pixclock);
-	dcu_write32(&regs->div_ratio, (div - 1));
-
-	dcu_write32(&regs->update_mode, DCU_UPDATE_MODE_READREG);
-
-	return 0;
-}
-
-ulong board_get_usable_ram_top(ulong total_size)
-{
-	return gd->ram_top - CONFIG_VIDEO_FSL_DCU_MAX_FB_SIZE_MB;
-}
-
-int fsl_probe_common(struct fb_info *fbinfo, unsigned int *win_x,
-		     unsigned int *win_y)
-{
-	const char *options;
-	unsigned int depth = 0, freq = 0;
-
-	struct fb_videomode *fsl_dcu_mode_db = &fsl_dcu_mode_480_272;
-
-	if (!video_get_video_mode(win_x, win_y, &depth, &freq,
-				  &options))
-		return -EINVAL;
-
-	/* Find the monitor port, which is a required option */
-	if (!options)
-		return -EINVAL;
-
-	if (strncmp(options, "monitor=", 8) != 0)
-		return -EINVAL;
-
-	switch (RESOLUTION(*win_x, *win_y)) {
-	case RESOLUTION(480, 272):
-		fsl_dcu_mode_db = &fsl_dcu_mode_480_272;
-		break;
-	case RESOLUTION(640, 480):
-		if (!strncmp(options, "monitor=hdmi", 12))
-			fsl_dcu_mode_db = &fsl_dcu_cea_mode_640_480;
-		else
-			fsl_dcu_mode_db = &fsl_dcu_mode_640_480;
-		break;
-	case RESOLUTION(800, 480):
-		fsl_dcu_mode_db = &fsl_dcu_mode_800_480;
-		break;
-	case RESOLUTION(1024, 600):
-		fsl_dcu_mode_db = &fsl_dcu_mode_1024_600;
-		break;
-	default:
-		printf("unsupported resolution %ux%u\n",
-		       *win_x, *win_y);
-	}
-
-	fbinfo->var.xres = fsl_dcu_mode_db->xres;
-	fbinfo->var.yres = fsl_dcu_mode_db->yres;
-	fbinfo->var.bits_per_pixel = 32;
-	fbinfo->var.pixclock = fsl_dcu_mode_db->pixclock;
-	fbinfo->var.left_margin = fsl_dcu_mode_db->left_margin;
-	fbinfo->var.right_margin = fsl_dcu_mode_db->right_margin;
-	fbinfo->var.upper_margin = fsl_dcu_mode_db->upper_margin;
-	fbinfo->var.lower_margin = fsl_dcu_mode_db->lower_margin;
-	fbinfo->var.hsync_len = fsl_dcu_mode_db->hsync_len;
-	fbinfo->var.vsync_len = fsl_dcu_mode_db->vsync_len;
-	fbinfo->var.sync = fsl_dcu_mode_db->sync;
-	fbinfo->var.vmode = fsl_dcu_mode_db->vmode;
-	fbinfo->fix.line_length = fbinfo->var.xres *
-				  fbinfo->var.bits_per_pixel / 8;
-
-	return platform_dcu_init(fbinfo, *win_x, *win_y,
-				 options + 8, fsl_dcu_mode_db);
-}
-
-#ifndef CONFIG_DM_VIDEO
-static struct fb_info info;
-
-#if defined(CONFIG_OF_BOARD_SETUP)
-int fsl_dcu_fixedfb_setup(void *blob)
-{
-	u64 start, size;
-	int ret;
-
-	start = gd->bd->bi_dram[0].start;
-	size = gd->bd->bi_dram[0].size - info.screen_size;
-
-	/*
-	 * Align size on section size (1 MiB).
-	 */
-	size &= 0xfff00000;
-	ret = fdt_fixup_memory_banks(blob, &start, &size, 1);
-	if (ret) {
-		eprintf("Cannot setup fb: Error reserving memory\n");
-		return ret;
-	}
-
-	return 0;
-}
-#endif
-
-void *video_hw_init(void)
-{
-	static GraphicDevice ctfb;
-
-	if (fsl_probe_common(&info, &ctfb.winSizeX, &ctfb.winSizeY) < 0)
-		return NULL;
-
-	ctfb.frameAdrs = (unsigned int)info.screen_base;
-	ctfb.plnSizeX = ctfb.winSizeX;
-	ctfb.plnSizeY = ctfb.winSizeY;
-
-	ctfb.gdfBytesPP = 4;
-	ctfb.gdfIndex = GDF_32BIT_X888RGB;
-
-	ctfb.memSize = info.screen_size;
-
-	return &ctfb;
-}
-
-#else /* ifndef CONFIG_DM_VIDEO */
-
-static int fsl_dcu_video_probe(struct udevice *dev)
-{
-	struct video_uc_plat *plat = dev_get_uclass_plat(dev);
-	struct video_priv *uc_priv = dev_get_uclass_priv(dev);
-	struct fb_info fbinfo = { 0 };
-	unsigned int win_x;
-	unsigned int win_y;
-	u32 fb_start, fb_end;
-	int ret = 0;
-
-	fb_start = plat->base & ~(MMU_SECTION_SIZE - 1);
-	fb_end = plat->base + plat->size;
-	fb_end = ALIGN(fb_end, 1 << MMU_SECTION_SHIFT);
-
-	fbinfo.screen_base = (char *)fb_start;
-	fbinfo.screen_size = plat->size;
-
-	ret = fsl_probe_common(&fbinfo, &win_x, &win_y);
-	if (ret < 0)
-		return ret;
-
-	uc_priv->bpix = VIDEO_BPP32;
-	uc_priv->xsize = win_x;
-	uc_priv->ysize = win_y;
-
-	/* Enable dcache for the frame buffer */
-	mmu_set_region_dcache_behaviour(fb_start, fb_end - fb_start,
-					DCACHE_WRITEBACK);
-	video_set_flush_dcache(dev, true);
-	return ret;
-}
-
-static int fsl_dcu_video_bind(struct udevice *dev)
-{
-	struct video_uc_plat *plat = dev_get_uclass_plat(dev);
-	unsigned int win_x;
-	unsigned int win_y;
-	unsigned int depth = 0, freq = 0;
-	const char *options;
-	int ret = 0;
-
-	ret = video_get_video_mode(&win_x, &win_y, &depth, &freq, &options);
-	if (ret < 0)
-		return ret;
-
-	plat->size = win_x * win_y * 32;
-
-	return 0;
-}
-
-static const struct udevice_id fsl_dcu_video_ids[] = {
-	{ .compatible = "fsl,vf610-dcu" },
-	{ /* sentinel */ }
-};
-
-U_BOOT_DRIVER(fsl_dcu_video) = {
-	.name	= "fsl_dcu_video",
-	.id	= UCLASS_VIDEO,
-	.of_match = fsl_dcu_video_ids,
-	.bind	= fsl_dcu_video_bind,
-	.probe	= fsl_dcu_video_probe,
-	.flags	= DM_FLAG_PRE_RELOC,
-};
-#endif /* ifndef CONFIG_DM_VIDEO */
diff --git a/drivers/video/fsl_diu_fb.c b/drivers/video/fsl_diu_fb.c
deleted file mode 100644
index 2c21e29..0000000
--- a/drivers/video/fsl_diu_fb.c
+++ /dev/null
@@ -1,416 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0+
-/*
- * Copyright 2007, 2010-2011 Freescale Semiconductor, Inc.
- * Authors: York Sun <yorksun@freescale.com>
- *          Timur Tabi <timur@freescale.com>
- *
- * FSL DIU Framebuffer driver
- */
-
-#include <common.h>
-#include <malloc.h>
-#include <asm/io.h>
-
-#include "videomodes.h"
-#include <video_fb.h>
-#include <fsl_diu_fb.h>
-#include <linux/list.h>
-#include <linux/fb.h>
-
-/* This setting is used for the ifm pdm360ng with PRIMEVIEW PM070WL3 */
-static struct fb_videomode fsl_diu_mode_800_480 = {
-	.name		= "800x480-60",
-	.refresh	= 60,
-	.xres		= 800,
-	.yres		= 480,
-	.pixclock	= 31250,
-	.left_margin	= 86,
-	.right_margin	= 42,
-	.upper_margin	= 33,
-	.lower_margin	= 10,
-	.hsync_len	= 128,
-	.vsync_len	= 2,
-	.sync		= 0,
-	.vmode		= FB_VMODE_NONINTERLACED
-};
-
-/* For the SHARP LQ084S3LG01, used on the P1022DS board */
-static struct fb_videomode fsl_diu_mode_800_600 = {
-	.name		= "800x600-60",
-	.refresh	= 60,
-	.xres		= 800,
-	.yres		= 600,
-	.pixclock	= 25000,
-	.left_margin	= 88,
-	.right_margin	= 40,
-	.upper_margin	= 23,
-	.lower_margin	= 1,
-	.hsync_len	= 128,
-	.vsync_len	= 4,
-	.sync		= FB_SYNC_COMP_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
-	.vmode		= FB_VMODE_NONINTERLACED
-};
-
-/*
- * These parameters give default parameters
- * for video output 1024x768,
- * FIXME - change timing to proper amounts
- * hsync 31.5kHz, vsync 60Hz
- */
-static struct fb_videomode fsl_diu_mode_1024_768 = {
-	.name		= "1024x768-60",
-	.refresh	= 60,
-	.xres		= 1024,
-	.yres		= 768,
-	.pixclock	= 15385,
-	.left_margin	= 160,
-	.right_margin	= 24,
-	.upper_margin	= 29,
-	.lower_margin	= 3,
-	.hsync_len	= 136,
-	.vsync_len	= 6,
-	.sync		= FB_SYNC_COMP_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
-	.vmode		= FB_VMODE_NONINTERLACED
-};
-
-static struct fb_videomode fsl_diu_mode_1280_1024 = {
-	.name		= "1280x1024-60",
-	.refresh	= 60,
-	.xres		= 1280,
-	.yres		= 1024,
-	.pixclock	= 9375,
-	.left_margin	= 38,
-	.right_margin	= 128,
-	.upper_margin	= 2,
-	.lower_margin	= 7,
-	.hsync_len	= 216,
-	.vsync_len	= 37,
-	.sync		= FB_SYNC_COMP_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
-	.vmode		= FB_VMODE_NONINTERLACED
-};
-
-static struct fb_videomode fsl_diu_mode_1280_720 = {
-	.name		= "1280x720-60",
-	.refresh	= 60,
-	.xres		= 1280,
-	.yres		= 720,
-	.pixclock	= 13426,
-	.left_margin	= 192,
-	.right_margin	= 64,
-	.upper_margin	= 22,
-	.lower_margin	= 1,
-	.hsync_len	= 136,
-	.vsync_len	= 3,
-	.sync		= FB_SYNC_COMP_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
-	.vmode		= FB_VMODE_NONINTERLACED
-};
-
-static struct fb_videomode fsl_diu_mode_1920_1080 = {
-	.name		= "1920x1080-60",
-	.refresh	= 60,
-	.xres		= 1920,
-	.yres		= 1080,
-	.pixclock	= 5787,
-	.left_margin	= 328,
-	.right_margin	= 120,
-	.upper_margin	= 34,
-	.lower_margin	= 1,
-	.hsync_len	= 208,
-	.vsync_len	= 3,
-	.sync		= FB_SYNC_COMP_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
-	.vmode		= FB_VMODE_NONINTERLACED
-};
-
-/*
- * These are the fields of area descriptor(in DDR memory) for every plane
- */
-struct diu_ad {
-	/* Word 0(32-bit) in DDR memory */
-	__le32 pix_fmt; /* hard coding pixel format */
-	/* Word 1(32-bit) in DDR memory */
-	__le32 addr;
-	/* Word 2(32-bit) in DDR memory */
-	__le32 src_size_g_alpha;
-	/* Word 3(32-bit) in DDR memory */
-	__le32 aoi_size;
-	/* Word 4(32-bit) in DDR memory */
-	__le32 offset_xyi;
-	/* Word 5(32-bit) in DDR memory */
-	__le32 offset_xyd;
-	/* Word 6(32-bit) in DDR memory */
-	__le32 ckmax_r:8;
-	__le32 ckmax_g:8;
-	__le32 ckmax_b:8;
-	__le32 res9:8;
-	/* Word 7(32-bit) in DDR memory */
-	__le32 ckmin_r:8;
-	__le32 ckmin_g:8;
-	__le32 ckmin_b:8;
-	__le32 res10:8;
-	/* Word 8(32-bit) in DDR memory */
-	__le32 next_ad;
-	/* Word 9(32-bit) in DDR memory, just for 64-bit aligned */
-	__le32 res[3];
-} __attribute__ ((packed));
-
-/*
- * DIU register map
- */
-struct diu {
-	__be32 desc[3];
-	__be32 gamma;
-	__be32 pallete;
-	__be32 cursor;
-	__be32 curs_pos;
-	__be32 diu_mode;
-	__be32 bgnd;
-	__be32 bgnd_wb;
-	__be32 disp_size;
-	__be32 wb_size;
-	__be32 wb_mem_addr;
-	__be32 hsyn_para;
-	__be32 vsyn_para;
-	__be32 syn_pol;
-	__be32 thresholds;
-	__be32 int_status;
-	__be32 int_mask;
-	__be32 colorbar[8];
-	__be32 filling;
-	__be32 plut;
-} __attribute__ ((packed));
-
-struct diu_addr {
-	void *vaddr;		/* Virtual address */
-	u32 paddr;		/* 32-bit physical address */
-	unsigned int offset;	/* Alignment offset */
-};
-
-static struct fb_info info;
-
-/*
- * Align to 64-bit(8-byte), 32-byte, etc.
- */
-static int allocate_buf(struct diu_addr *buf, u32 size, u32 bytes_align)
-{
-	u32 offset, ssize;
-	u32 mask;
-
-	ssize = size + bytes_align;
-	buf->vaddr = malloc(ssize);
-	if (!buf->vaddr)
-		return -1;
-
-	memset(buf->vaddr, 0, ssize);
-	mask = bytes_align - 1;
-	offset = (u32)buf->vaddr & mask;
-	if (offset) {
-		buf->offset = bytes_align - offset;
-		buf->vaddr += offset;
-	} else
-		buf->offset = 0;
-
-	buf->paddr = virt_to_phys(buf->vaddr);
-	return 0;
-}
-
-/*
- * Allocate a framebuffer and an Area Descriptor that points to it.  Both
- * are created in the same memory block.  The Area Descriptor is updated to
- * point to the framebuffer memory. Memory is aligned as needed.
- */
-static struct diu_ad *allocate_fb(unsigned int xres, unsigned int yres,
-				  unsigned int depth, char **fb)
-{
-	unsigned long size = xres * yres * depth;
-	struct diu_addr addr;
-	struct diu_ad *ad;
-	size_t ad_size = roundup(sizeof(struct diu_ad), 32);
-
-	/*
-	 * Allocate a memory block that holds the Area Descriptor and the
-	 * frame buffer right behind it.  To keep the code simple, everything
-	 * is aligned on a 32-byte address.
-	 */
-	if (allocate_buf(&addr, ad_size + size, 32) < 0)
-		return NULL;
-
-	ad = addr.vaddr;
-	ad->addr = cpu_to_le32(addr.paddr + ad_size);
-	ad->aoi_size = cpu_to_le32((yres << 16) | xres);
-	ad->src_size_g_alpha = cpu_to_le32((yres << 12) | xres);
-	ad->offset_xyi = 0;
-	ad->offset_xyd = 0;
-
-	if (fb)
-		*fb = addr.vaddr + ad_size;
-
-	return ad;
-}
-
-int fsl_diu_init(u16 xres, u16 yres, u32 pixel_format, int gamma_fix)
-{
-	struct fb_videomode *fsl_diu_mode_db;
-	struct diu_ad *ad;
-	struct diu *hw = (struct diu *)CONFIG_SYS_DIU_ADDR;
-	u8 *gamma_table_base;
-	unsigned int i, j;
-	struct diu_addr gamma;
-	struct diu_addr cursor;
-
-/* Convert the X,Y resolution pair into a single number */
-#define RESOLUTION(x, y) (((u32)(x) << 16) | (y))
-
-	switch (RESOLUTION(xres, yres)) {
-	case RESOLUTION(800, 480):
-		fsl_diu_mode_db = &fsl_diu_mode_800_480;
-		break;
-	case RESOLUTION(800, 600):
-		fsl_diu_mode_db = &fsl_diu_mode_800_600;
-		break;
-	case RESOLUTION(1024, 768):
-		fsl_diu_mode_db = &fsl_diu_mode_1024_768;
-		break;
-	case RESOLUTION(1280, 1024):
-		fsl_diu_mode_db = &fsl_diu_mode_1280_1024;
-		break;
-	case RESOLUTION(1280, 720):
-		fsl_diu_mode_db = &fsl_diu_mode_1280_720;
-		break;
-	case RESOLUTION(1920, 1080):
-		fsl_diu_mode_db = &fsl_diu_mode_1920_1080;
-		break;
-	default:
-		printf("DIU:   Unsupported resolution %ux%u\n", xres, yres);
-		return -1;
-	}
-
-	/* read mode info */
-	info.var.xres = fsl_diu_mode_db->xres;
-	info.var.yres = fsl_diu_mode_db->yres;
-	info.var.bits_per_pixel = 32;
-	info.var.pixclock = fsl_diu_mode_db->pixclock;
-	info.var.left_margin = fsl_diu_mode_db->left_margin;
-	info.var.right_margin = fsl_diu_mode_db->right_margin;
-	info.var.upper_margin = fsl_diu_mode_db->upper_margin;
-	info.var.lower_margin = fsl_diu_mode_db->lower_margin;
-	info.var.hsync_len = fsl_diu_mode_db->hsync_len;
-	info.var.vsync_len = fsl_diu_mode_db->vsync_len;
-	info.var.sync = fsl_diu_mode_db->sync;
-	info.var.vmode = fsl_diu_mode_db->vmode;
-	info.fix.line_length = info.var.xres * info.var.bits_per_pixel / 8;
-
-	/* Memory allocation for framebuffer */
-	info.screen_size =
-		info.var.xres * info.var.yres * (info.var.bits_per_pixel / 8);
-	ad = allocate_fb(info.var.xres, info.var.yres,
-			 info.var.bits_per_pixel / 8, &info.screen_base);
-	if (!ad) {
-		printf("DIU:   Out of memory\n");
-		return -1;
-	}
-
-	ad->pix_fmt = pixel_format;
-
-	/* Disable chroma keying function */
-	ad->ckmax_r = 0;
-	ad->ckmax_g = 0;
-	ad->ckmax_b = 0;
-
-	ad->ckmin_r = 255;
-	ad->ckmin_g = 255;
-	ad->ckmin_b = 255;
-
-	/* Initialize the gamma table */
-	if (allocate_buf(&gamma, 256 * 3, 32) < 0) {
-		printf("DIU:   Out of memory\n");
-		return -1;
-	}
-	gamma_table_base = gamma.vaddr;
-	for (i = 0; i <= 2; i++)
-		for (j = 0; j < 256; j++)
-			*gamma_table_base++ = j;
-
-	if (gamma_fix == 1) {	/* fix the gamma */
-		gamma_table_base = gamma.vaddr;
-		for (i = 0; i < 256 * 3; i++) {
-			gamma_table_base[i] = (gamma_table_base[i] << 2)
-				| ((gamma_table_base[i] >> 6) & 0x03);
-		}
-	}
-
-	/* Initialize the cursor */
-	if (allocate_buf(&cursor, 32 * 32 * 2, 32) < 0) {
-		printf("DIU:   Can't alloc cursor data\n");
-		return -1;
-	}
-
-	/* Program DIU registers */
-	out_be32(&hw->diu_mode, 0);	/* Temporarily disable the DIU */
-
-	out_be32(&hw->gamma, gamma.paddr);
-	out_be32(&hw->cursor, cursor.paddr);
-	out_be32(&hw->bgnd, 0x007F7F7F);
-	out_be32(&hw->disp_size, info.var.yres << 16 | info.var.xres);
-	out_be32(&hw->hsyn_para, info.var.left_margin << 22 |
-			info.var.hsync_len << 11 |
-			info.var.right_margin);
-
-	out_be32(&hw->vsyn_para, info.var.upper_margin << 22 |
-			info.var.vsync_len << 11 |
-			info.var.lower_margin);
-
-	/* Pixel Clock configuration */
-	diu_set_pixel_clock(info.var.pixclock);
-
-	/* Set the frame buffers */
-	out_be32(&hw->desc[0], virt_to_phys(ad));
-	out_be32(&hw->desc[1], 0);
-	out_be32(&hw->desc[2], 0);
-
-	/* Enable the DIU, set display to all three planes */
-	out_be32(&hw->diu_mode, 1);
-
-	return 0;
-}
-
-void *video_hw_init(void)
-{
-	static GraphicDevice ctfb;
-	const char *options;
-	unsigned int depth = 0, freq = 0;
-
-	if (!video_get_video_mode(&ctfb.winSizeX, &ctfb.winSizeY, &depth, &freq,
-				  &options))
-		return NULL;
-
-	/* Find the monitor port, which is a required option */
-	if (!options)
-		return NULL;
-	if (strncmp(options, "monitor=", 8) != 0)
-		return NULL;
-
-	if (platform_diu_init(ctfb.winSizeX, ctfb.winSizeY, options + 8) < 0)
-		return NULL;
-
-	/* fill in Graphic device struct */
-	sprintf(ctfb.modeIdent, "%ix%ix%i %ikHz %iHz",
-		ctfb.winSizeX, ctfb.winSizeY, depth, 64, freq);
-
-	ctfb.frameAdrs = (unsigned int)info.screen_base;
-	ctfb.plnSizeX = ctfb.winSizeX;
-	ctfb.plnSizeY = ctfb.winSizeY;
-
-	ctfb.gdfBytesPP = 4;
-	ctfb.gdfIndex = GDF_32BIT_X888RGB;
-
-	ctfb.isaBase = 0;
-	ctfb.pciBase = 0;
-	ctfb.memSize = info.screen_size;
-
-	/* Cursor Start Address */
-	ctfb.dprBase = 0;
-	ctfb.vprBase = 0;
-	ctfb.cprBase = 0;
-
-	return &ctfb;
-}
diff --git a/drivers/video/imx/mxc_ipuv3_fb.c b/drivers/video/imx/mxc_ipuv3_fb.c
index 98228f2..49bbeef 100644
--- a/drivers/video/imx/mxc_ipuv3_fb.c
+++ b/drivers/video/imx/mxc_ipuv3_fb.c
@@ -22,7 +22,6 @@
 #include <asm/io.h>
 #include <asm/mach-imx/video.h>
 #include <malloc.h>
-#include <video_fb.h>
 #include "../videomodes.h"
 #include "ipu.h"
 #include "mxcfb.h"
diff --git a/drivers/video/mxsfb.c b/drivers/video/mxsfb.c
index 5f85c0c..1043394 100644
--- a/drivers/video/mxsfb.c
+++ b/drivers/video/mxsfb.c
@@ -15,7 +15,6 @@
 #include <linux/errno.h>
 #include <malloc.h>
 #include <video.h>
-#include <video_fb.h>
 
 #include <asm/arch/clock.h>
 #include <asm/arch/imx-regs.h>
@@ -253,94 +252,6 @@ static int mxs_remove_common(u32 fb)
 	return 0;
 }
 
-#ifndef CONFIG_DM_VIDEO
-
-static GraphicDevice panel;
-
-void lcdif_power_down(void)
-{
-	mxs_remove_common(panel.frameAdrs);
-}
-
-void *video_hw_init(void)
-{
-	int bpp = -1;
-	int ret = 0;
-	char *penv;
-	void *fb = NULL;
-	struct ctfb_res_modes mode;
-	struct display_timing timings;
-
-	puts("Video: ");
-
-	/* Suck display configuration from "videomode" variable */
-	penv = env_get("videomode");
-	if (!penv) {
-		puts("MXSFB: 'videomode' variable not set!\n");
-		return NULL;
-	}
-
-	bpp = video_get_params(&mode, penv);
-
-	/* fill in Graphic device struct */
-	sprintf(panel.modeIdent, "%dx%dx%d", mode.xres, mode.yres, bpp);
-
-	panel.winSizeX = mode.xres;
-	panel.winSizeY = mode.yres;
-	panel.plnSizeX = mode.xres;
-	panel.plnSizeY = mode.yres;
-
-	switch (bpp) {
-	case 24:
-	case 18:
-		panel.gdfBytesPP = 4;
-		panel.gdfIndex = GDF_32BIT_X888RGB;
-		break;
-	case 16:
-		panel.gdfBytesPP = 2;
-		panel.gdfIndex = GDF_16BIT_565RGB;
-		break;
-	case 8:
-		panel.gdfBytesPP = 1;
-		panel.gdfIndex = GDF__8BIT_INDEX;
-		break;
-	default:
-		printf("MXSFB: Invalid BPP specified! (bpp = %i)\n", bpp);
-		return NULL;
-	}
-
-	panel.memSize = mode.xres * mode.yres * panel.gdfBytesPP;
-
-	/* Allocate framebuffer */
-	fb = memalign(ARCH_DMA_MINALIGN,
-		      roundup(panel.memSize, ARCH_DMA_MINALIGN));
-	if (!fb) {
-		printf("MXSFB: Error allocating framebuffer!\n");
-		return NULL;
-	}
-
-	/* Wipe framebuffer */
-	memset(fb, 0, panel.memSize);
-
-	panel.frameAdrs = (u32)fb;
-
-	printf("%s\n", panel.modeIdent);
-
-	video_ctfb_mode_to_display_timing(&mode, &timings);
-
-	ret = mxs_probe_common(NULL, &timings, bpp, (u32)fb);
-	if (ret)
-		goto dealloc_fb;
-
-	return (void *)&panel;
-
-dealloc_fb:
-	free(fb);
-
-	return NULL;
-}
-#else /* ifndef CONFIG_DM_VIDEO */
-
 static int mxs_of_get_timings(struct udevice *dev,
 			      struct display_timing *timings,
 			      u32 *bpp)
@@ -490,4 +401,3 @@ U_BOOT_DRIVER(mxs_video) = {
 	.remove = mxs_video_remove,
 	.flags	= DM_FLAG_PRE_RELOC | DM_FLAG_OS_PREPARE,
 };
-#endif /* ifndef CONFIG_DM_VIDEO */
diff --git a/drivers/video/nexell_display.c b/drivers/video/nexell_display.c
index c7621ef..090fd6e 100644
--- a/drivers/video/nexell_display.c
+++ b/drivers/video/nexell_display.c
@@ -16,7 +16,6 @@
 #include <linux/compat.h>
 #include <linux/err.h>
 #include <video.h>		/* For struct video_uc_plat */
-#include <video_fb.h>
 #include <lcd.h>
 #include <asm/global_data.h>
 #include <asm/io.h>
@@ -537,7 +536,6 @@ static int nx_display_probe(struct udevice *dev)
 	struct video_uc_plat *uc_plat = dev_get_uclass_plat(dev);
 	struct video_priv *uc_priv = dev_get_uclass_priv(dev);
 	struct nx_display_plat *plat = dev_get_plat(dev);
-	static GraphicDevice *graphic_device;
 	char addr[64];
 
 	debug("%s()\n", __func__);
@@ -564,7 +562,6 @@ static int nx_display_probe(struct udevice *dev)
 	}
 
 	struct nx_display_dev *dp;
-	unsigned int pp_index = 0;
 
 	dp = nx_display_setup();
 	if (!dp) {
@@ -575,7 +572,6 @@ static int nx_display_probe(struct udevice *dev)
 
 	switch (dp->depth) {
 	case 2:
-		pp_index = GDF_16BIT_565RGB;
 		uc_priv->bpix = VIDEO_BPP16;
 		break;
 	case 3:
@@ -583,7 +579,6 @@ static int nx_display_probe(struct udevice *dev)
 		 * type video_log2_bpp
 		 */
 	case 4:
-		pp_index = GDF_32BIT_X888RGB;
 		uc_priv->bpix = VIDEO_BPP32;
 		break;
 	default:
@@ -596,19 +591,9 @@ static int nx_display_probe(struct udevice *dev)
 	uc_priv->ysize = dp->fb_plane->height;
 	uc_priv->rot = 0;
 
-	graphic_device = &dp->graphic_device;
-	graphic_device->frameAdrs = dp->fb_addr;
-	graphic_device->gdfIndex = pp_index;
-	graphic_device->gdfBytesPP = dp->depth;
-	graphic_device->winSizeX = dp->fb_plane->width;
-	graphic_device->winSizeY = dp->fb_plane->height;
-	graphic_device->plnSizeX =
-	    graphic_device->winSizeX * graphic_device->gdfBytesPP;
-
 	/*
 	 * set environment variable "fb_addr" (frame buffer address), required
-	 * for splash image. Because drv_video_init() in common/stdio.c is only
-	 * called when CONFIG_VIDEO is set (and not if CONFIG_DM_VIDEO is set).
+	 * for splash image, which is not set if CONFIG_DM_VIDEO is enabled).
 	 */
 	sprintf(addr, "0x%x", dp->fb_addr);
 	debug("%s(): env_set(\"fb_addr\", %s) ...\n", __func__, addr);
diff --git a/drivers/video/omap3_dss.c b/drivers/video/omap3_dss.c
index 6efba12..432b16b 100644
--- a/drivers/video/omap3_dss.c
+++ b/drivers/video/omap3_dss.c
@@ -28,7 +28,6 @@
 #include <common.h>
 #include <asm/io.h>
 #include <asm/arch/dss.h>
-#include <video_fb.h>
 
 /* Configure VENC for a given Mode (NTSC / PAL) */
 void omap3_dss_venc_config(const struct venc_regs *venc_cfg,
@@ -137,31 +136,3 @@ void omap3_dss_enable(void)
 	l |= LCD_ENABLE | GO_LCD | DIG_ENABLE | GO_DIG | GP_OUT0 | GP_OUT1;
 	writel(l, &dispc->control);
 }
-
-#ifdef CONFIG_CFB_CONSOLE
-int __board_video_init(void)
-{
-	return -1;
-}
-
-int board_video_init(void)
-			__attribute__((weak, alias("__board_video_init")));
-
-void *video_hw_init(void)
-{
-	static GraphicDevice dssfb;
-	GraphicDevice *pGD = &dssfb;
-	struct dispc_regs *dispc = (struct dispc_regs *) OMAP3_DISPC_BASE;
-
-	if (board_video_init() || !readl(&dispc->gfx_ba0))
-		return NULL;
-
-	pGD->winSizeX = (readl(&dispc->size_lcd) & 0x7FF) + 1;
-	pGD->winSizeY = ((readl(&dispc->size_lcd) >> 16) & 0x7FF) + 1;
-	pGD->gdfBytesPP = 4;
-	pGD->gdfIndex = GDF_32BIT_X888RGB;
-	pGD->frameAdrs = readl(&dispc->gfx_ba0);
-
-	return pGD;
-}
-#endif
diff --git a/drivers/video/sunxi/sunxi_display.c b/drivers/video/sunxi/sunxi_display.c
index 5a21f7a..2ee6212 100644
--- a/drivers/video/sunxi/sunxi_display.c
+++ b/drivers/video/sunxi/sunxi_display.c
@@ -30,7 +30,6 @@
 #include <i2c.h>
 #include <malloc.h>
 #include <video.h>
-#include <video_fb.h>
 #include <dm/uclass-internal.h>
 #include "../videomodes.h"
 #include "../anx9804.h"
diff --git a/include/asm-generic/global_data.h b/include/asm-generic/global_data.h
index e49f5bf..beb8bb9 100644
--- a/include/asm-generic/global_data.h
+++ b/include/asm-generic/global_data.h
@@ -67,7 +67,7 @@ struct global_data {
 	 * @mem_clk: memory clock rate in Hz
 	 */
 	unsigned long mem_clk;
-#if defined(CONFIG_LCD) || defined(CONFIG_VIDEO) || defined(CONFIG_DM_VIDEO)
+#if defined(CONFIG_LCD) || defined(CONFIG_DM_VIDEO)
 	/**
 	 * @fb_base: base address of frame buffer memory
 	 */
diff --git a/include/configs/T102xRDB.h b/include/configs/T102xRDB.h
index dfb9e91..1fa1fc0 100644
--- a/include/configs/T102xRDB.h
+++ b/include/configs/T102xRDB.h
@@ -365,18 +365,6 @@
 #define CONFIG_SYS_NS16550_COM3	(CONFIG_SYS_CCSRBAR+0x11D500)
 #define CONFIG_SYS_NS16550_COM4	(CONFIG_SYS_CCSRBAR+0x11D600)
 
-/* Video */
-#undef CONFIG_FSL_DIU_FB	/* RDB doesn't support DIU */
-#ifdef CONFIG_FSL_DIU_FB
-#define CONFIG_SYS_DIU_ADDR	(CONFIG_SYS_CCSRBAR + 0x180000)
-#define CONFIG_VIDEO_BMP_LOGO
-/*
- * With CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS, flash I/O is really slow, so
- * disable empty flash sector detection, which is I/O-intensive.
- */
-#undef CONFIG_SYS_FLASH_EMPTY_INFO
-#endif
-
 /* I2C */
 
 #define I2C_PCA6408_BUS_NUM		1
diff --git a/include/configs/T104xRDB.h b/include/configs/T104xRDB.h
index 6fbeebc..562f7b3 100644
--- a/include/configs/T104xRDB.h
+++ b/include/configs/T104xRDB.h
@@ -345,19 +345,6 @@
 #define CONFIG_SYS_NS16550_COM3	(CONFIG_SYS_CCSRBAR+0x11D500)
 #define CONFIG_SYS_NS16550_COM4	(CONFIG_SYS_CCSRBAR+0x11D600)
 
-#if defined(CONFIG_TARGET_T1042RDB_PI) || defined(CONFIG_TARGET_T1042D4RDB)
-/* Video */
-#define CONFIG_FSL_DIU_FB
-
-#ifdef CONFIG_FSL_DIU_FB
-#define CONFIG_FSL_DIU_CH7301
-#define CONFIG_SYS_DIU_ADDR	(CONFIG_SYS_CCSRBAR + 0x180000)
-#define CONFIG_VIDEO_BMP_LOGO
-#endif
-#endif
-
-/* I2C */
-
 /* I2C bus multiplexer */
 #define I2C_MUX_PCA_ADDR                0x70
 #define I2C_MUX_CH_DEFAULT      0x8
@@ -559,18 +546,11 @@
 #define FDTFILE		"t1042rdb/t1042d4rdb.dtb"
 #endif
 
-#ifdef CONFIG_FSL_DIU_FB
-#define DIU_ENVIRONMENT "video-mode=fslfb:1024x768-32@60,monitor=dvi"
-#else
-#define DIU_ENVIRONMENT
-#endif
-
 #define	CONFIG_EXTRA_ENV_SETTINGS				\
 	"hwconfig=fsl_ddr:bank_intlv=cs0_cs1;"			\
 	"usb1:dr_mode=host,phy_type=" __stringify(__USB_PHY_TYPE) ";"\
 	"usb2:dr_mode=host,phy_type=" __stringify(__USB_PHY_TYPE) "\0"\
 	"netdev=eth0\0"						\
-	"video-mode=" __stringify(DIU_ENVIRONMENT) "\0"		\
 	"uboot=" __stringify(CONFIG_UBOOTPATH) "\0"		\
 	"ubootaddr=" __stringify(CONFIG_SYS_TEXT_BASE) "\0"	\
 	"tftpflash=tftpboot $loadaddr $uboot && "		\
diff --git a/include/configs/apalis_imx6.h b/include/configs/apalis_imx6.h
index bbdcab2..ea5711d 100644
--- a/include/configs/apalis_imx6.h
+++ b/include/configs/apalis_imx6.h
@@ -45,7 +45,6 @@
 #define CONFIG_USBD_HS
 
 /* Framebuffer and LCD */
-#define CONFIG_VIDEO_BMP_LOGO
 #define CONFIG_IMX_HDMI
 #define CONFIG_IMX_VIDEO_SKIP
 
diff --git a/include/configs/aristainetos2.h b/include/configs/aristainetos2.h
index fcf364b..611b6d7 100644
--- a/include/configs/aristainetos2.h
+++ b/include/configs/aristainetos2.h
@@ -438,7 +438,6 @@
 /* Framebuffer */
 /* check this console not needed, after test remove it */
 #define CONFIG_IMX_VIDEO_SKIP
-#define CONFIG_VIDEO_BMP_LOGO
 
 #define CONFIG_IMX6_PWM_PER_CLK	66000000
 
diff --git a/include/configs/cm_fx6.h b/include/configs/cm_fx6.h
index 90720c2..f836f92 100644
--- a/include/configs/cm_fx6.h
+++ b/include/configs/cm_fx6.h
@@ -171,8 +171,6 @@
 /* Display */
 #define CONFIG_IMX_HDMI
 
-#define CONFIG_VIDEO_BMP_LOGO
-
 /* EEPROM */
 
 #endif	/* __CONFIG_CM_FX6_H */
diff --git a/include/configs/colibri-imx6ull.h b/include/configs/colibri-imx6ull.h
index 91f0f95..53bfab4 100644
--- a/include/configs/colibri-imx6ull.h
+++ b/include/configs/colibri-imx6ull.h
@@ -165,7 +165,6 @@
 
 #if defined(CONFIG_DM_VIDEO)
 #define MXS_LCDIF_BASE MX6UL_LCDIF1_BASE_ADDR
-#define CONFIG_VIDEO_BMP_LOGO
 #endif
 
 #endif /* __COLIBRI_IMX6ULL_CONFIG_H */
diff --git a/include/configs/colibri_imx6.h b/include/configs/colibri_imx6.h
index 1dbc77d..0d1a1bc 100644
--- a/include/configs/colibri_imx6.h
+++ b/include/configs/colibri_imx6.h
@@ -35,7 +35,6 @@
 #define CONFIG_USBD_HS
 
 /* Framebuffer and LCD */
-#define CONFIG_VIDEO_BMP_LOGO
 #define CONFIG_IMX_HDMI
 #define CONFIG_IMX_VIDEO_SKIP
 
diff --git a/include/configs/colibri_imx7.h b/include/configs/colibri_imx7.h
index 92e24ea..0382724 100644
--- a/include/configs/colibri_imx7.h
+++ b/include/configs/colibri_imx7.h
@@ -201,8 +201,4 @@
 
 #define CONFIG_USBD_HS
 
-#if defined(CONFIG_DM_VIDEO)
-#define CONFIG_VIDEO_BMP_LOGO
-#endif
-
 #endif
diff --git a/include/configs/colibri_vf.h b/include/configs/colibri_vf.h
index 62f8518..2e7b640 100644
--- a/include/configs/colibri_vf.h
+++ b/include/configs/colibri_vf.h
@@ -14,14 +14,6 @@
 #include <asm/arch/imx-regs.h>
 #include <linux/sizes.h>
 
-#ifdef CONFIG_VIDEO_FSL_DCU_FB
-#define CONFIG_VIDEO_BMP_LOGO
-#define CONFIG_SYS_FSL_DCU_LE
-
-#define CONFIG_SYS_DCU_ADDR		DCU0_BASE_ADDR
-#define DCU_LAYER_MAX_NUM		64
-#endif
-
 /* NAND support */
 #define CONFIG_SYS_MAX_NAND_DEVICE	1
 
diff --git a/include/configs/embestmx6boards.h b/include/configs/embestmx6boards.h
index 98fd8ac..1bf564c 100644
--- a/include/configs/embestmx6boards.h
+++ b/include/configs/embestmx6boards.h
@@ -50,7 +50,6 @@
 #endif
 
 /* Framebuffer */
-#define CONFIG_VIDEO_BMP_LOGO
 #define CONFIG_IMX_HDMI
 #define CONFIG_IMX_VIDEO_SKIP
 
diff --git a/include/configs/gw_ventana.h b/include/configs/gw_ventana.h
index 668d00c..8158222 100644
--- a/include/configs/gw_ventana.h
+++ b/include/configs/gw_ventana.h
@@ -72,7 +72,6 @@
 /* Framebuffer and LCD */
 #define CONFIG_IMX_HDMI
 #define CONFIG_IMX_VIDEO_SKIP
-#define CONFIG_VIDEO_BMP_LOGO
 #define CONFIG_HIDE_LOGO_VERSION  /* Custom config to hide U-boot version */
 
 /* Miscellaneous configurable options */
diff --git a/include/configs/imx6-engicam.h b/include/configs/imx6-engicam.h
index ff774ec..26d7a88 100644
--- a/include/configs/imx6-engicam.h
+++ b/include/configs/imx6-engicam.h
@@ -152,8 +152,6 @@
 /* Framebuffer */
 #ifdef CONFIG_VIDEO_IPUV3
 # define CONFIG_IMX_VIDEO_SKIP
-
-# define CONFIG_VIDEO_BMP_LOGO
 #endif
 
 /* SPL */
diff --git a/include/configs/imxrt1050-evk.h b/include/configs/imxrt1050-evk.h
index b507895..5c2f975 100644
--- a/include/configs/imxrt1050-evk.h
+++ b/include/configs/imxrt1050-evk.h
@@ -21,8 +21,6 @@
 					 DMAMEM_SZ_ALL)
 
 #ifdef CONFIG_DM_VIDEO
-#define CONFIG_VIDEO_BMP_LOGO
-
 #define CONFIG_EXTRA_ENV_SETTINGS \
 		"stdin=serial\0" \
 		"stdout=serial,vidconsole\0" \
diff --git a/include/configs/ls1021aqds.h b/include/configs/ls1021aqds.h
index 91e73c7..6a27111 100644
--- a/include/configs/ls1021aqds.h
+++ b/include/configs/ls1021aqds.h
@@ -300,18 +300,6 @@
  */
 
 /*
- * Video
- */
-#ifdef CONFIG_VIDEO_FSL_DCU_FB
-#define CONFIG_VIDEO_BMP_LOGO
-
-#define CONFIG_FSL_DIU_CH7301
-#define CONFIG_SYS_I2C_DVI_BUS_NUM	0
-#define CONFIG_SYS_I2C_QIXIS_ADDR	0x66
-#define CONFIG_SYS_I2C_DVI_ADDR		0x75
-#endif
-
-/*
  * eTSEC
  */
 
diff --git a/include/configs/ls1021atwr.h b/include/configs/ls1021atwr.h
index f5d40aa..03a4ce5 100644
--- a/include/configs/ls1021atwr.h
+++ b/include/configs/ls1021atwr.h
@@ -185,21 +185,6 @@
 #define CONFIG_SYS_I2C_EEPROM_NXID
 #define CONFIG_SYS_EEPROM_BUS_NUM		1
 
-/*
- * MMC
- */
-
-/*
- * Video
- */
-#ifdef CONFIG_VIDEO_FSL_DCU_FB
-#define CONFIG_VIDEO_BMP_LOGO
-
-#define CONFIG_FSL_DCU_SII9022A
-#define CONFIG_SYS_I2C_DVI_BUS_NUM	1
-#define CONFIG_SYS_I2C_DVI_ADDR		0x39
-#endif
-
 /* PCIe */
 #define CONFIG_PCIE1		/* PCIE controller 1 */
 #define CONFIG_PCIE2		/* PCIE controller 2 */
diff --git a/include/configs/mx6cuboxi.h b/include/configs/mx6cuboxi.h
index 1c25857..832f73f 100644
--- a/include/configs/mx6cuboxi.h
+++ b/include/configs/mx6cuboxi.h
@@ -24,7 +24,6 @@
 #endif
 
 /* Framebuffer */
-#define CONFIG_VIDEO_BMP_LOGO
 #define CONFIG_IMX_HDMI
 #define CONFIG_IMX_VIDEO_SKIP
 
diff --git a/include/configs/mx6sabre_common.h b/include/configs/mx6sabre_common.h
index 4f6e385..d7408e0 100644
--- a/include/configs/mx6sabre_common.h
+++ b/include/configs/mx6sabre_common.h
@@ -151,7 +151,6 @@
 /* Environment organization */
 
 /* Framebuffer */
-#define CONFIG_VIDEO_BMP_LOGO
 #define CONFIG_IMX_HDMI
 #define CONFIG_IMX_VIDEO_SKIP
 
diff --git a/include/configs/mx6sxsabresd.h b/include/configs/mx6sxsabresd.h
index a46f515..b679d13 100644
--- a/include/configs/mx6sxsabresd.h
+++ b/include/configs/mx6sxsabresd.h
@@ -145,7 +145,6 @@
 
 #ifndef CONFIG_SPL_BUILD
 #ifdef CONFIG_DM_VIDEO
-#define CONFIG_VIDEO_BMP_LOGO
 #define MXS_LCDIF_BASE MX6SX_LCDIF1_BASE_ADDR
 #endif
 #endif
diff --git a/include/configs/mx6ul_14x14_evk.h b/include/configs/mx6ul_14x14_evk.h
index 4be5d78..17e7ae0 100644
--- a/include/configs/mx6ul_14x14_evk.h
+++ b/include/configs/mx6ul_14x14_evk.h
@@ -145,7 +145,6 @@
 
 #ifndef CONFIG_SPL_BUILD
 #if defined(CONFIG_DM_VIDEO)
-#define CONFIG_VIDEO_BMP_LOGO
 #define MXS_LCDIF_BASE MX6UL_LCDIF1_BASE_ADDR
 #endif
 #endif
diff --git a/include/configs/mx7dsabresd.h b/include/configs/mx7dsabresd.h
index d5b38fd..d411b1a 100644
--- a/include/configs/mx7dsabresd.h
+++ b/include/configs/mx7dsabresd.h
@@ -122,8 +122,4 @@
 
 #define CONFIG_USBD_HS
 
-#ifdef CONFIG_DM_VIDEO
-#define CONFIG_VIDEO_BMP_LOGO
-#endif
-
 #endif	/* __CONFIG_H */
diff --git a/include/configs/opos6uldev.h b/include/configs/opos6uldev.h
index ac8eb05..2810418 100644
--- a/include/configs/opos6uldev.h
+++ b/include/configs/opos6uldev.h
@@ -41,7 +41,6 @@
 /* LCD */
 #ifndef CONFIG_SPL_BUILD
 #ifdef CONFIG_DM_VIDEO
-#define CONFIG_VIDEO_BMP_LOGO
 #define MXS_LCDIF_BASE MX6UL_LCDIF1_BASE_ADDR
 #endif
 #endif
diff --git a/include/configs/pico-imx6.h b/include/configs/pico-imx6.h
index 63f6b14..536e07b 100644
--- a/include/configs/pico-imx6.h
+++ b/include/configs/pico-imx6.h
@@ -133,7 +133,6 @@
 #define CONFIG_FEC_MXC_PHYADDR		1
 
 /* Framebuffer */
-#define CONFIG_VIDEO_BMP_LOGO
 #define CONFIG_IMX_HDMI
 #define CONFIG_IMX_VIDEO_SKIP
 
diff --git a/include/configs/pico-imx6ul.h b/include/configs/pico-imx6ul.h
index f63ebb4..2646f19 100644
--- a/include/configs/pico-imx6ul.h
+++ b/include/configs/pico-imx6ul.h
@@ -129,7 +129,6 @@
 #define CONFIG_BOARD_SIZE_LIMIT		715776
 
 #ifdef CONFIG_DM_VIDEO
-#define CONFIG_VIDEO_BMP_LOGO
 #define MXS_LCDIF_BASE MX6UL_LCDIF1_BASE_ADDR
 #endif
 
diff --git a/include/configs/pico-imx7d.h b/include/configs/pico-imx7d.h
index eb87073..a90befc 100644
--- a/include/configs/pico-imx7d.h
+++ b/include/configs/pico-imx7d.h
@@ -119,10 +119,6 @@
 #define CONFIG_POWER_PFUZE3000
 #define CONFIG_POWER_PFUZE3000_I2C_ADDR	0x08
 
-#ifdef CONFIG_DM_VIDEO
-#define CONFIG_VIDEO_BMP_LOGO
-#endif
-
 /* FLASH and environment organization */
 
 /* Environment starts at 768k = 768 * 1024 = 786432 */
diff --git a/include/configs/pxm2.h b/include/configs/pxm2.h
index 753fc14..7272470 100644
--- a/include/configs/pxm2.h
+++ b/include/configs/pxm2.h
@@ -74,12 +74,4 @@
 #endif
 #endif	/* CONFIG_SPL_BUILD */
 
-#if defined(CONFIG_VIDEO)
-#define CONFIG_VIDEO_DA8XX
-#define CONFIG_VIDEO_BMP_LOGO
-#define DA8XX_LCD_CNTL_BASE	LCD_CNTL_BASE
-#define PWM_TICKS	0x1388
-#define PWM_DUTY	0x200
-#endif
-
 #endif	/* ! __CONFIG_PXM2_H */
diff --git a/include/configs/rpi.h b/include/configs/rpi.h
index d5e064f..c439ec1 100644
--- a/include/configs/rpi.h
+++ b/include/configs/rpi.h
@@ -44,7 +44,6 @@
 /* GPIO */
 #define CONFIG_BCM2835_GPIO
 /* LCD */
-#define CONFIG_VIDEO_BCM2835
 
 /* DFU over USB/UDC */
 #ifdef CONFIG_CMD_DFU
diff --git a/include/configs/rut.h b/include/configs/rut.h
index 02d330e..b30b12a 100644
--- a/include/configs/rut.h
+++ b/include/configs/rut.h
@@ -67,14 +67,4 @@
 
 #endif /* CONFIG_SPL_BUILD */
 
-#if defined(CONFIG_VIDEO)
-#define CONFIG_VIDEO_DA8XX
-#define CONFIG_VIDEO_BMP_LOGO
-#define DA8XX_LCD_CNTL_BASE	LCD_CNTL_BASE
-
-#define BOARD_LCD_RESET		115	/* Bank 3 pin 19 */
-#define CONFIG_FORMIKE
-#define DISPL_PLL_SPREAD_SPECTRUM
-#endif
-
 #endif	/* ! __CONFIG_RUT_H */
diff --git a/include/configs/wandboard.h b/include/configs/wandboard.h
index 80e8fe1..d44b4a0 100644
--- a/include/configs/wandboard.h
+++ b/include/configs/wandboard.h
@@ -31,7 +31,6 @@
 #define CONFIG_MXC_USB_FLAGS		0
 
 /* Framebuffer */
-#define CONFIG_VIDEO_BMP_LOGO
 #define CONFIG_IMX_HDMI
 #define CONFIG_IMX_VIDEO_SKIP
 
diff --git a/include/fsl_dcu_fb.h b/include/fsl_dcu_fb.h
deleted file mode 100644
index 7a5347a..0000000
--- a/include/fsl_dcu_fb.h
+++ /dev/null
@@ -1,22 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0+ */
-/*
- * Copyright 2014 Freescale Semiconductor, Inc.
- *
- * FSL DCU Framebuffer driver
- */
-#include <linux/fb.h>
-
-int fsl_dcu_init(struct fb_info *fbinfo,
-		 unsigned int xres,
-		 unsigned int yres,
-		 unsigned int pixel_format);
-
-int fsl_dcu_fixedfb_setup(void *blob);
-
-/* Prototypes for external board-specific functions */
-int platform_dcu_init(struct fb_info *fbinfo,
-		      unsigned int xres,
-		      unsigned int yres,
-		      const char *port,
-		      struct fb_videomode *dcu_fb_videomode);
-unsigned int dcu_set_pixel_clock(unsigned int pixclock);
diff --git a/include/fsl_diu_fb.h b/include/fsl_diu_fb.h
deleted file mode 100644
index 139851b..0000000
--- a/include/fsl_diu_fb.h
+++ /dev/null
@@ -1,14 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0+ */
-/*
- * Copyright 2007, 2011 Freescale Semiconductor, Inc.
- * Authors: York Sun <yorksun@freescale.com>
- *          Timur Tabi <timur@freescale.com>
- *
- * FSL DIU Framebuffer driver
- */
-
-int fsl_diu_init(u16 xres, u16 yres, u32 pixel_format, int gamma_fix);
-
-/* Prototypes for external board-specific functions */
-int platform_diu_init(unsigned int xres, unsigned int yres, const char *port);
-void diu_set_pixel_clock(unsigned int pixclock);
diff --git a/include/video.h b/include/video.h
index 48a71dc..43e2c89 100644
--- a/include/video.h
+++ b/include/video.h
@@ -1,13 +1,7 @@
 /*
- * Video uclass and legacy implementation
+ * Video uclass to support displays (see also vidconsole for text)
  *
  * Copyright (c) 2015 Google, Inc
- *
- * MPC823 Video Controller
- * =======================
- * (C) 2000 by Paolo Scaffardi (arsenio@tin.it)
- * AIRVENT SAM s.p.a - RIMINI(ITALY)
- *
  */
 
 #ifndef _VIDEO_H_
@@ -155,7 +149,6 @@ struct video_ops {
  */
 int video_reserve(ulong *addrp);
 
-#ifdef CONFIG_DM_VIDEO
 /**
  * video_clear() - Clear a device's frame buffer to background color.
  *
@@ -163,7 +156,6 @@ int video_reserve(ulong *addrp);
  * Return: 0
  */
 int video_clear(struct udevice *dev);
-#endif /* CONFIG_DM_VIDEO */
 
 /**
  * video_sync() - Sync a device's frame buffer with its hardware
@@ -283,78 +275,4 @@ static inline int video_sync_copy_all(struct udevice *dev)
  */
 bool video_is_active(void);
 
-#ifndef CONFIG_DM_VIDEO
-
-/* Video functions */
-
-/**
- * Display a BMP format bitmap on the screen
- *
- * @param bmp_image	Address of BMP image
- * @param x		X position to draw image
- * @param y		Y position to draw image
- */
-int video_display_bitmap(ulong bmp_image, int x, int y);
-
-/**
- * Get the width of the screen in pixels
- *
- * Return: width of screen in pixels
- */
-int video_get_pixel_width(void);
-
-/**
- * Get the height of the screen in pixels
- *
- * Return: height of screen in pixels
- */
-int video_get_pixel_height(void);
-
-/**
- * Get the number of text lines/rows on the screen
- *
- * Return: number of rows
- */
-int video_get_screen_rows(void);
-
-/**
- * Get the number of text columns on the screen
- *
- * Return: number of columns
- */
-int video_get_screen_columns(void);
-
-/**
- * Set the position of the text cursor
- *
- * @param col	Column to place cursor (0 = left side)
- * @param row	Row to place cursor (0 = top line)
- */
-void video_position_cursor(unsigned col, unsigned row);
-
-/* Clear the display */
-void video_clear(void);
-
-#if defined(CONFIG_FORMIKE)
-int kwh043st20_f01_spi_startup(unsigned int bus, unsigned int cs,
-	unsigned int max_hz, unsigned int spi_mode);
-#endif
-#if defined(CONFIG_LG4573)
-int lg4573_spi_startup(unsigned int bus, unsigned int cs,
-	unsigned int max_hz, unsigned int spi_mode);
-#endif
-
-/*
- * video_get_info_str() - obtain a board string: type, speed, etc.
- *
- * This is called if CONFIG_CONSOLE_EXTRA_INFO is enabled.
- *
- * line_number:	location to place info string beside logo
- * info:	buffer for info string (empty if nothing to display on this
- * line)
- */
-void video_get_info_str(int line_number, char *info);
-
-#endif /* !CONFIG_DM_VIDEO */
-
 #endif
diff --git a/include/video_fb.h b/include/video_fb.h
deleted file mode 100644
index e410226..0000000
--- a/include/video_fb.h
+++ /dev/null
@@ -1,91 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0+ */
-/*
- * (C) Copyright 1997-2002 ELTEC Elektronik AG
- * Frank Gottschling <fgottschling@eltec.de>
- */
-
-/*
- * smiLynxEM.h
- * Silicon Motion graphic interface for sm810/sm710/sm712 accelerator
- *
- *
- *  modification history
- *  --------------------
- *  04-18-2002 Rewritten for U-Boot <fgottschling@eltec.de>.
- */
-
-#ifndef _VIDEO_FB_H_
-#define _VIDEO_FB_H_
-
-/*
- * Graphic Data Format (GDF) bits for VIDEO_DATA_FORMAT
- */
-#define GDF__8BIT_INDEX         0
-#define GDF_15BIT_555RGB        1
-#define GDF_16BIT_565RGB        2
-#define GDF_32BIT_X888RGB       3
-#define GDF_24BIT_888RGB        4
-#define GDF__8BIT_332RGB        5
-
-/******************************************************************************/
-/* Export Graphic Driver Control                                              */
-/******************************************************************************/
-
-typedef struct graphic_device {
-    unsigned int isaBase;
-    unsigned int pciBase;
-    unsigned int dprBase;
-    unsigned int vprBase;
-    unsigned int cprBase;
-    unsigned int frameAdrs;
-    unsigned int memSize;
-    unsigned int mode;
-    unsigned int gdfIndex;
-    unsigned int gdfBytesPP;
-    unsigned int fg;
-    unsigned int bg;
-    unsigned int plnSizeX;
-    unsigned int plnSizeY;
-    unsigned int winSizeX;
-    unsigned int winSizeY;
-    char modeIdent[80];
-} GraphicDevice;
-
-
-/******************************************************************************/
-/* Export Graphic Functions                                                   */
-/******************************************************************************/
-
-void *video_hw_init (void);       /* returns GraphicDevice struct or NULL */
-
-#ifdef VIDEO_HW_BITBLT
-void video_hw_bitblt (
-    unsigned int bpp,             /* bytes per pixel */
-    unsigned int src_x,           /* source pos x */
-    unsigned int src_y,           /* source pos y */
-    unsigned int dst_x,           /* dest pos x */
-    unsigned int dst_y,           /* dest pos y */
-    unsigned int dim_x,           /* frame width */
-    unsigned int dim_y            /* frame height */
-    );
-#endif
-
-#ifdef VIDEO_HW_RECTFILL
-void video_hw_rectfill (
-    unsigned int bpp,             /* bytes per pixel */
-    unsigned int dst_x,           /* dest pos x */
-    unsigned int dst_y,           /* dest pos y */
-    unsigned int dim_x,           /* frame width */
-    unsigned int dim_y,           /* frame height */
-    unsigned int color            /* fill color */
-     );
-#endif
-
-void video_set_lut (
-    unsigned int index,           /* color number */
-    unsigned char r,              /* red */
-    unsigned char g,              /* green */
-    unsigned char b               /* blue */
-    );
-
-#endif /*_VIDEO_FB_H_ */
diff --git a/lib/efi_loader/Kconfig b/lib/efi_loader/Kconfig
index e5e35fe..28657f5 100644
--- a/lib/efi_loader/Kconfig
+++ b/lib/efi_loader/Kconfig
@@ -18,7 +18,6 @@ config EFI_LOADER
 	select PARTITION_UUIDS
 	select HAVE_BLOCK_DEVICE
 	select REGEX
-	imply CFB_CONSOLE_ANSI
 	imply FAT
 	imply FAT_WRITE
 	imply USB_KEYBOARD_FN_KEYS
diff --git a/scripts/config_whitelist.txt b/scripts/config_whitelist.txt
index 88fd64e..c797b30 100644
--- a/scripts/config_whitelist.txt
+++ b/scripts/config_whitelist.txt
@@ -151,16 +151,12 @@ CONFIG_FLASH_SHOW_PROGRESS
 CONFIG_FLASH_SPANSION_S29WS_N
 CONFIG_FLASH_VERIFY
 CONFIG_FM_PLAT_CLK_DIV
-CONFIG_FORMIKE
 CONFIG_FPGA_COUNT
 CONFIG_FPGA_STRATIX_V
 CONFIG_FSL_CADMUS
 CONFIG_FSL_CORENET
 CONFIG_FSL_CPLD
-CONFIG_FSL_DCU_SII9022A
 CONFIG_FSL_DEVICE_DISABLE
-CONFIG_FSL_DIU_CH7301
-CONFIG_FSL_DIU_FB
 CONFIG_FSL_DSPI1
 CONFIG_FSL_ESDHC_PIN_MUX
 CONFIG_FSL_FIXED_MMC_LOCATION
@@ -989,7 +985,6 @@ CONFIG_SYS_DEFAULT_LPDDR2_TIMINGS
 CONFIG_SYS_DIALOG_PMIC_I2C_ADDR
 CONFIG_SYS_DIRECT_FLASH_TFTP
 CONFIG_SYS_DISCOVER_PHY
-CONFIG_SYS_DIU_ADDR
 CONFIG_SYS_DPAA_DCE
 CONFIG_SYS_DPAA_FMAN
 CONFIG_SYS_DPAA_PME
@@ -1131,8 +1126,6 @@ CONFIG_SYS_FSL_DCSR_DDR2_ADDR
 CONFIG_SYS_FSL_DCSR_DDR3_ADDR
 CONFIG_SYS_FSL_DCSR_DDR4_ADDR
 CONFIG_SYS_FSL_DCSR_DDR_ADDR
-CONFIG_SYS_FSL_DCU_BE
-CONFIG_SYS_FSL_DCU_LE
 CONFIG_SYS_FSL_DDR2_ADDR
 CONFIG_SYS_FSL_DDR3_ADDR
 CONFIG_SYS_FSL_DDR_ADDR
@@ -2008,9 +2001,6 @@ CONFIG_USE_ONENAND_BOARD_INIT
 CONFIG_U_BOOT_HDR_SIZE
 CONFIG_VAR_SIZE_SPL
 CONFIG_VERY_BIG_RAM
-CONFIG_VIDEO_BCM2835
-CONFIG_VIDEO_BMP_LOGO
-CONFIG_VIDEO_DA8XX
 CONFIG_VSC7385_ENET
 CONFIG_VSC7385_IMAGE
 CONFIG_VSC7385_IMAGE_SIZE