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| author | Chris Morgan <macromorgan@hotmail.com> | 2023-05-15 11:00:27 -0500 |
|---|---|---|
| committer | Kever Yang <kever.yang@rock-chips.com> | 2023-07-28 18:45:02 +0800 |
| commit | 59c255ae5f3000f9bf7f3d703415f81f721afc88 (patch) | |
| tree | fe1ff84cb890929d258123ec301d4767fd06d839 | |
| parent | a6bd5bc9884eb679ba955bf043a325446f985178 (diff) | |
| download | u-boot-59c255ae5f3000f9bf7f3d703415f81f721afc88.zip u-boot-59c255ae5f3000f9bf7f3d703415f81f721afc88.tar.gz u-boot-59c255ae5f3000f9bf7f3d703415f81f721afc88.tar.bz2 | |
board: rockchip: Correct i2c2 pinctrl for RGxx3
The pinctrl on the Anbernic RGxx3 for the i2c2 bus does not use the
default value, so explicitly define it.
Fixes: 6cf6fe25370c ("board: rockchip: add Anbernic RGXX3 Series Devices")
Signed-off-by: Chris Morgan <macromorgan@hotmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
| -rw-r--r-- | arch/arm/dts/rk3566-anbernic-rgxx3-u-boot.dtsi | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/arch/arm/dts/rk3566-anbernic-rgxx3-u-boot.dtsi b/arch/arm/dts/rk3566-anbernic-rgxx3-u-boot.dtsi index a18e5d1..62e7522 100644 --- a/arch/arm/dts/rk3566-anbernic-rgxx3-u-boot.dtsi +++ b/arch/arm/dts/rk3566-anbernic-rgxx3-u-boot.dtsi @@ -47,6 +47,8 @@ }; &i2c2 { + pinctrl-0 = <&i2c2m1_xfer>; + pinctrl-names = "default"; status = "okay"; }; |