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authorTudor Ambarus <tudor.ambarus@microchip.com>2022-04-08 11:41:11 +0300
committerEugen Hristev <eugen.hristev@microchip.com>2022-04-26 09:54:41 +0300
commit51ca6a2583474f764edd3800f6fc0734506fed1d (patch)
treecfc002a29cfebdb6e4667f0d80c7904e872416cd
parent20ced4b22af212874e033a64567b82b469dcd612 (diff)
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ARM: dts: at91: sama7g5: Fix QSPI1 clock
QSPI1 used the clock of QSPI0, fix it. Fixes: 5eecc37bb1 ("ARM: dts: at91: sama7g5: Add QSPI0 and OSPI1 nodes") Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
-rw-r--r--arch/arm/dts/sama7g5.dtsi2
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm/dts/sama7g5.dtsi b/arch/arm/dts/sama7g5.dtsi
index 7015bd7..4efecdb 100644
--- a/arch/arm/dts/sama7g5.dtsi
+++ b/arch/arm/dts/sama7g5.dtsi
@@ -323,7 +323,7 @@
dma-names = "tx", "rx";
clocks = <&pmc PMC_TYPE_PERIPHERAL 79>, <&pmc PMC_TYPE_GCK 79>;
clock-names = "pclk", "gclk";
- assigned-clocks = <&pmc PMC_TYPE_GCK 78>;
+ assigned-clocks = <&pmc PMC_TYPE_GCK 79>;
assigned-clock-parents = <&pmc PMC_TYPE_CORE 10>; /* sys pll div. */
#address-cells = <1>;
#size-cells = <0>;