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author | Tom Rini <trini@konsulko.com> | 2020-12-16 08:13:37 -0500 |
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committer | Tom Rini <trini@konsulko.com> | 2020-12-16 08:13:37 -0500 |
commit | 25e6bd18c51d42bbd7fbb5f606a11ad8b80b78c9 (patch) | |
tree | 6d4903fdf0b75b39f7dbd30f4291361ac1f07a2c | |
parent | af22790a3bc2ab85108bdffad4bbe079a52160c1 (diff) | |
parent | f89e8acbc81ee6d9e57f0156c3ee6de44528c8b7 (diff) | |
download | u-boot-25e6bd18c51d42bbd7fbb5f606a11ad8b80b78c9.zip u-boot-25e6bd18c51d42bbd7fbb5f606a11ad8b80b78c9.tar.gz u-boot-25e6bd18c51d42bbd7fbb5f606a11ad8b80b78c9.tar.bz2 |
Merge https://gitlab.denx.de/u-boot/custodians/u-boot-x86
- Update cmdline parameter to be an env var in zimage boot
- Various minor fixes for Intel Edison board
-rw-r--r-- | arch/x86/cpu/tangier/Kconfig | 8 | ||||
-rw-r--r-- | arch/x86/cpu/tangier/sdram.c | 43 | ||||
-rw-r--r-- | arch/x86/dts/edison.dts | 14 | ||||
-rw-r--r-- | arch/x86/lib/zimage.c | 15 | ||||
-rw-r--r-- | board/intel/edison/Kconfig | 1 | ||||
-rw-r--r-- | board/intel/edison/edison.c | 35 | ||||
-rw-r--r-- | configs/edison_defconfig | 2 | ||||
-rw-r--r-- | drivers/usb/dwc3/dwc3-generic.c | 1 | ||||
-rw-r--r-- | include/configs/chromebook_coral.h | 11 |
9 files changed, 77 insertions, 53 deletions
diff --git a/arch/x86/cpu/tangier/Kconfig b/arch/x86/cpu/tangier/Kconfig index 571470c..19aaf16 100644 --- a/arch/x86/cpu/tangier/Kconfig +++ b/arch/x86/cpu/tangier/Kconfig @@ -10,9 +10,11 @@ config INTEL_TANGIER imply MMC_SDHCI imply MMC_SDHCI_SDMA imply MMC_SDHCI_TANGIER + imply MISC imply USB + imply USB_XHCI_HCD imply USB_DWC3 - imply BINMAN + imply USB_DWC3_GENERIC if INTEL_TANGIER @@ -27,8 +29,4 @@ config SYS_CAR_SIZE Space in bytes in eSRAM used as Cache-As-RAM (CAR). Note this size must not exceed eSRAM's total size. -config SYS_USB_OTG_BASE - hex - default 0xf9100000 - endif diff --git a/arch/x86/cpu/tangier/sdram.c b/arch/x86/cpu/tangier/sdram.c index df3b9e4..afb0847 100644 --- a/arch/x86/cpu/tangier/sdram.c +++ b/arch/x86/cpu/tangier/sdram.c @@ -196,6 +196,49 @@ unsigned int install_e820_map(unsigned int max_entries, return sfi_setup_e820(max_entries, entries); } +/* + * This function looks for the highest region of memory lower than 2GB which + * has enough space for U-Boot where U-Boot is aligned on a page boundary. It + * overrides the default implementation found elsewhere which simply picks the + * end of RAM, wherever that may be. The location of the stack, the relocation + * address, and how far U-Boot is moved by relocation are set in the global + * data structure. + */ +ulong board_get_usable_ram_top(ulong total_size) +{ + struct sfi_table_simple *sb; + struct sfi_mem_entry *mentry; + ulong dest_addr = 0; + u32 i; + + sb = sfi_search_mmap(); + if (!sb) + panic("No available memory found for relocation"); + + sfi_for_each_mentry(i, sb, mentry) { + unsigned long long start, end; + + if (mentry->type != SFI_MEM_CONV) + continue; + + start = mentry->phys_start; + end = start + (mentry->pages << 12); + + /* Filter memory over 2GB. */ + if (end > 0x7fffffffULL) + end = 0x80000000ULL; + /* Skip this region if it's too small. */ + if (end - start < total_size) + continue; + + /* Use this address if it's the largest so far. */ + if (end > dest_addr) + dest_addr = end; + } + + return dest_addr; +} + int dram_init_banksize(void) { sfi_get_bank_size(); diff --git a/arch/x86/dts/edison.dts b/arch/x86/dts/edison.dts index bc84bc8..8d245bf 100644 --- a/arch/x86/dts/edison.dts +++ b/arch/x86/dts/edison.dts @@ -16,7 +16,7 @@ / { model = "Intel Edison"; - compatible = "intel,edison"; + compatible = "intel,edison", "intel,tangier"; aliases { serial0 = &serial0; @@ -105,6 +105,18 @@ reg = <0xff009000 0x1000>; }; + usb: usb@f9100000 { + compatible = "intel,tangier-dwc3"; + #address-cells = <1>; + #size-cells = <1>; + + dwc3: dwc3 { + reg = <0xf9100000 0x100000>; + maximum-speed = "high-speed"; + dr_mode = "peripheral"; + }; + }; + watchdog: wdt@0 { compatible = "intel,tangier-wdt"; }; diff --git a/arch/x86/lib/zimage.c b/arch/x86/lib/zimage.c index 50fb16d..24a503d 100644 --- a/arch/x86/lib/zimage.c +++ b/arch/x86/lib/zimage.c @@ -60,8 +60,8 @@ * BZIMAGE_LOAD_ADDR or ZIMAGE_LOAD_ADDR * @base_ptr: Pointer to the boot parameters, typically at address * DEFAULT_SETUP_BASE - * @cmdline: Address of 'override' command line, or 0 to use the one in the - * setup block + * @cmdline: Environment variable containing the 'override' command line, or + * NULL to use the one in the setup block */ struct zboot_state { ulong bzimage_addr; @@ -70,7 +70,7 @@ struct zboot_state { ulong initrd_size; ulong load_address; struct boot_params *base_ptr; - ulong cmdline; + char *cmdline; } state; enum { @@ -406,7 +406,7 @@ static int do_zboot_start(struct cmd_tbl *cmdtp, int flag, int argc, state.bzimage_addr = 0; } if (argc >= 7) - state.cmdline = simple_strtoul(argv[6], NULL, 16); + state.cmdline = env_get(argv[6]); return 0; } @@ -452,7 +452,7 @@ static int do_zboot_setup(struct cmd_tbl *cmdtp, int flag, int argc, } ret = setup_zimage(base_ptr, (char *)base_ptr + COMMAND_LINE_OFFSET, 0, state.initrd_addr, state.initrd_size, - state.cmdline); + (ulong)state.cmdline); if (ret) { puts("Setting up boot parameters failed ...\n"); return CMD_RET_FAILURE; @@ -743,8 +743,9 @@ U_BOOT_CMDREP_COMPLETE( " initrd size - The size of the initrd image to use, if any.\n" " setup - The address of the kernel setup region, if this\n" " is not at addr\n" - " cmdline - The address of the kernel command line, to\n" - " override U-Boot's normal cmdline generation\n" + " cmdline - Environment variable containing the kernel\n" + " command line, to override U-Boot's normal\n" + " cmdline generation\n" "\n" "Sub-commands to do part of the zboot sequence:\n" "\tstart [addr [arg ...]] - specify arguments\n" diff --git a/board/intel/edison/Kconfig b/board/intel/edison/Kconfig index 05d6544..23b2af4 100644 --- a/board/intel/edison/Kconfig +++ b/board/intel/edison/Kconfig @@ -31,5 +31,6 @@ config BOARD_SPECIFIC_OPTIONS # dummy select INTEL_TANGIER select BOARD_LATE_INIT select MD5 + imply BINMAN endif diff --git a/board/intel/edison/edison.c b/board/intel/edison/edison.c index 652f975..11e7f74 100644 --- a/board/intel/edison/edison.c +++ b/board/intel/edison/edison.c @@ -3,15 +3,10 @@ * Copyright (c) 2017 Intel Corporation */ #include <common.h> -#include <dwc3-uboot.h> #include <env.h> #include <init.h> #include <mmc.h> #include <u-boot/md5.h> -#include <usb.h> -#include <watchdog.h> - -#include <linux/usb/gadget.h> #include <asm/cache.h> #include <asm/pmu.h> @@ -27,36 +22,6 @@ int board_early_init_r(void) return 0; } -static struct dwc3_device dwc3_device_data = { - .maximum_speed = USB_SPEED_HIGH, - .base = CONFIG_SYS_USB_OTG_BASE, - .dr_mode = USB_DR_MODE_PERIPHERAL, - .index = 0, -}; - -int usb_gadget_handle_interrupts(int controller_index) -{ - dwc3_uboot_handle_interrupt(controller_index); - WATCHDOG_RESET(); - return 0; -} - -int board_usb_init(int index, enum usb_init_type init) -{ - if (index == 0 && init == USB_INIT_DEVICE) - return dwc3_uboot_init(&dwc3_device_data); - return -EINVAL; -} - -int board_usb_cleanup(int index, enum usb_init_type init) -{ - if (index == 0 && init == USB_INIT_DEVICE) { - dwc3_uboot_exit(index); - return 0; - } - return -EINVAL; -} - static void assign_serial(void) { struct mmc *mmc = find_mmc_device(0); diff --git a/configs/edison_defconfig b/configs/edison_defconfig index c69c3f8..304a172 100644 --- a/configs/edison_defconfig +++ b/configs/edison_defconfig @@ -37,7 +37,7 @@ CONFIG_DFU_TIMEOUT=y CONFIG_DFU_MMC=y CONFIG_DFU_RAM=y CONFIG_SUPPORT_EMMC_BOOT=y -CONFIG_DM_PCI_COMPAT=y +CONFIG_DM_USB_GADGET=y CONFIG_USB_GADGET=y CONFIG_USB_GADGET_MANUFACTURER="Intel" CONFIG_USB_GADGET_VENDOR_NUM=0x8087 diff --git a/drivers/usb/dwc3/dwc3-generic.c b/drivers/usb/dwc3/dwc3-generic.c index a936f71..222358d 100644 --- a/drivers/usb/dwc3/dwc3-generic.c +++ b/drivers/usb/dwc3/dwc3-generic.c @@ -449,6 +449,7 @@ static const struct udevice_id dwc3_glue_ids[] = { { .compatible = "rockchip,rk3328-dwc3" }, { .compatible = "rockchip,rk3399-dwc3" }, { .compatible = "qcom,dwc3" }, + { .compatible = "intel,tangier-dwc3" }, { } }; diff --git a/include/configs/chromebook_coral.h b/include/configs/chromebook_coral.h index d4d3275..6e8e8ec 100644 --- a/include/configs/chromebook_coral.h +++ b/include/configs/chromebook_coral.h @@ -15,10 +15,13 @@ "read mmc 2:2 100000 0 80; setexpr loader *001004f0; " \ "setexpr size *00100518; setexpr blocks $size / 200; " \ "read mmc 2:2 100000 80 $blocks; setexpr setup $loader - 1000; " \ - "setexpr cmdline $loader - 2000; " \ - "part uuid mmc 2:2 uuid; setenv bootargs_U $uuid; " \ - "zboot start 100000 0 0 0 $setup $cmdline; " \ - "zboot load; zboot setup; zboot dump; zboot go" + "setexpr cmdline_ptr $loader - 2000; " \ + "setexpr.s cmdline *$cmdline_ptr; " \ + "setexpr cmdline gsub %U \\\\${uuid}; " \ + "if part uuid mmc 2:2 uuid; then " \ + "zboot start 100000 0 0 0 $setup cmdline; " \ + "zboot load; zboot setup; zboot dump; zboot go;" \ + "fi" #include <configs/x86-common.h> #include <configs/x86-chromebook.h> |