diff options
author | Tom Rini <trini@konsulko.com> | 2022-02-10 07:37:14 -0500 |
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committer | Tom Rini <trini@konsulko.com> | 2022-02-10 07:37:14 -0500 |
commit | 6662e5e406fdee26ba981dd4af3308f51f254f0a (patch) | |
tree | 67a143bca226590f60bbfa6b739f9c9d5b528f34 | |
parent | 83d4b7b1e7d785574bba43a66a3b35bdeb080833 (diff) | |
parent | d2a44ceddc2bc603cf97c27c9d1491ffc1b58a48 (diff) | |
download | u-boot-6662e5e406fdee26ba981dd4af3308f51f254f0a.zip u-boot-6662e5e406fdee26ba981dd4af3308f51f254f0a.tar.gz u-boot-6662e5e406fdee26ba981dd4af3308f51f254f0a.tar.bz2 |
Merge https://gitlab.denx.de/u-boot/custodians/u-boot-marvell
- kwboot: Misc improvements and fixes (Pali)
- Kirkwood: Move to DM ethernet support for some boards (Tony)
- Minor misc stuff
-rw-r--r-- | MAINTAINERS | 9 | ||||
-rw-r--r-- | board/Marvell/dreamplug/MAINTAINERS | 1 | ||||
-rw-r--r-- | board/Marvell/dreamplug/dreamplug.c | 94 | ||||
-rw-r--r-- | board/Marvell/dreamplug/dreamplug.h | 25 | ||||
-rw-r--r-- | board/Seagate/dockstar/dockstar.c | 62 | ||||
-rw-r--r-- | board/Seagate/dockstar/dockstar.h | 27 | ||||
-rw-r--r-- | board/cloudengines/pogo_e02/pogo_e02.c | 51 | ||||
-rw-r--r-- | board/cloudengines/pogo_e02/pogo_e02.h | 29 | ||||
-rw-r--r-- | board/iomega/iconnect/iconnect.c | 17 | ||||
-rw-r--r-- | board/iomega/iconnect/iconnect.h | 24 | ||||
-rw-r--r-- | configs/dockstar_defconfig | 5 | ||||
-rw-r--r-- | configs/dreamplug_defconfig | 1 | ||||
-rw-r--r-- | configs/iconnect_defconfig | 6 | ||||
-rw-r--r-- | configs/pogo_e02_defconfig | 6 | ||||
-rw-r--r-- | include/configs/dockstar.h | 20 | ||||
-rw-r--r-- | include/configs/dreamplug.h | 20 | ||||
-rw-r--r-- | include/configs/iconnect.h | 21 | ||||
-rw-r--r-- | include/configs/pogo_e02.h | 13 | ||||
-rw-r--r-- | tools/kwboot.c | 21 |
19 files changed, 120 insertions, 332 deletions
diff --git a/MAINTAINERS b/MAINTAINERS index 54985ae..b6a4b5d 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -278,11 +278,20 @@ T: git https://source.denx.de/u-boot/custodians/u-boot-marvell.git F: arch/arm/mach-kirkwood/ F: arch/arm/mach-mvebu/ F: drivers/ata/ahci_mvebu.c +F: drivers/clk/mvebu/ F: drivers/ddr/marvell/ F: drivers/gpio/mvebu_gpio.c +F: drivers/i2c/mvtwsi.c +F: drivers/mmc/xenon_sdhci.c +F: drivers/phy/marvell/ +F: drivers/pinctrl/mvebu/ +F: drivers/rtc/armada38x.c F: drivers/spi/kirkwood_spi.c +F: drivers/spi/mvebu_a3700_spi.c F: drivers/pci/pcie_dw_mvebu.c +F: drivers/watchdog/armada-37xx-wdt.c F: drivers/watchdog/orion_wdt.c +F: include/configs/mv-common.h ARM MARVELL PCIE CONTROLLER DRIVERS M: Pali Rohár <pali@kernel.org> diff --git a/board/Marvell/dreamplug/MAINTAINERS b/board/Marvell/dreamplug/MAINTAINERS index 2561ba8..6bad3ea 100644 --- a/board/Marvell/dreamplug/MAINTAINERS +++ b/board/Marvell/dreamplug/MAINTAINERS @@ -1,4 +1,5 @@ DREAMPLUG BOARD +M: Tony Dinh <mibodhi@gmail.com> M: Jason Cooper <u-boot@lakedaemon.net> S: Maintained F: board/Marvell/dreamplug/ diff --git a/board/Marvell/dreamplug/dreamplug.c b/board/Marvell/dreamplug/dreamplug.c index 7ba1402..d15faa1 100644 --- a/board/Marvell/dreamplug/dreamplug.c +++ b/board/Marvell/dreamplug/dreamplug.c @@ -1,8 +1,7 @@ // SPDX-License-Identifier: GPL-2.0+ /* - * Copyright (C) 2021 Tony Dinh <mibodhi@gmail.com> - * (C) Copyright 2011 - * Jason Cooper <u-boot@lakedaemon.net> + * Copyright (C) 2021-2022 Tony Dinh <mibodhi@gmail.com> + * Copyright (C) 2011 Jason Cooper <u-boot@lakedaemon.net> * * Based on work by: * Marvell Semiconductor <www.marvell.com> @@ -11,16 +10,19 @@ #include <common.h> #include <init.h> -#include <miiphy.h> -#include <net.h> +#include <netdev.h> #include <asm/arch/cpu.h> #include <asm/arch/soc.h> #include <asm/arch/mpp.h> #include <asm/global_data.h> -#include "dreamplug.h" DECLARE_GLOBAL_DATA_PTR; +#define DREAMPLUG_OE_LOW (~(0)) +#define DREAMPLUG_OE_HIGH (~(0)) +#define DREAMPLUG_OE_VAL_LOW 0 +#define DREAMPLUG_OE_VAL_HIGH (0xf << 16) /* 4 LED Pins high */ + int board_early_init_f(void) { /* @@ -90,83 +92,15 @@ int board_early_init_f(void) return 0; } -int board_init(void) -{ - /* adress of boot parameters */ - gd->bd->bi_boot_params = mvebu_sdram_bar(0) + 0x100; - - return 0; -} - -static int fdt_get_phy_addr(const char *path) -{ - const void *fdt = gd->fdt_blob; - const u32 *reg; - const u32 *val; - int node, phandle, addr; - - /* Find the node by its full path */ - node = fdt_path_offset(fdt, path); - if (node >= 0) { - /* Look up phy-handle */ - val = fdt_getprop(fdt, node, "phy-handle", NULL); - if (val) { - phandle = fdt32_to_cpu(*val); - if (!phandle) - return -1; - /* Follow it to its node */ - node = fdt_node_offset_by_phandle(fdt, phandle); - if (node) { - /* Look up reg */ - reg = fdt_getprop(fdt, node, "reg", NULL); - if (reg) { - addr = fdt32_to_cpu(*reg); - return addr; - } - } - } - } - return -1; -} - -#ifdef CONFIG_RESET_PHY_R -void mv_phy_88e1116_init(const char *name, const char *path) +int board_eth_init(struct bd_info *bis) { - u16 reg; - int phyaddr; - - if (miiphy_set_current_dev(name)) - return; - - phyaddr = fdt_get_phy_addr(path); - if (phyaddr < 0) - return; - - /* - * Enable RGMII delay on Tx and Rx for CPU port - * Ref: sec 4.7.2 of chip datasheet - */ - miiphy_write(name, phyaddr, MV88E1116_PGADR_REG, 2); - miiphy_read(name, phyaddr, MV88E1116_MAC_CTRL2_REG, ®); - reg |= (MV88E1116_RGMII_RXTM_CTRL | MV88E1116_RGMII_TXTM_CTRL); - miiphy_write(name, phyaddr, MV88E1116_MAC_CTRL2_REG, reg); - miiphy_write(name, phyaddr, MV88E1116_PGADR_REG, 0); - - /* reset the phy */ - miiphy_reset(name, phyaddr); - - printf("88E1116 Initialized on %s\n", name); + return cpu_eth_init(bis); } -void reset_phy(void) +int board_init(void) { - char *eth0_name = "ethernet-controller@72000"; - char *eth0_path = "/ocp@f1000000/ethernet-controller@72000/ethernet0-port@0"; - char *eth1_name = "ethernet-controller@76000"; - char *eth1_path = "/ocp@f1000000/ethernet-controller@76000/ethernet1-port@0"; + /* address of boot parameters */ + gd->bd->bi_boot_params = mvebu_sdram_bar(0) + 0x100; - /* configure and initialize both PHY's */ - mv_phy_88e1116_init(eth0_name, eth0_path); - mv_phy_88e1116_init(eth1_name, eth1_path); + return 0; } -#endif /* CONFIG_RESET_PHY_R */ diff --git a/board/Marvell/dreamplug/dreamplug.h b/board/Marvell/dreamplug/dreamplug.h deleted file mode 100644 index 6f62238..0000000 --- a/board/Marvell/dreamplug/dreamplug.h +++ /dev/null @@ -1,25 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0+ */ -/* - * (C) Copyright 2011 - * Jason Cooper <u-boot@lakedaemon.net> - * - * Based on work by: - * Marvell Semiconductor <www.marvell.com> - * Written-by: Siddarth Gore <gores@marvell.com> - */ - -#ifndef __DREAMPLUG_H -#define __DREAMPLUG_H - -#define DREAMPLUG_OE_LOW (~(0)) -#define DREAMPLUG_OE_HIGH (~(0)) -#define DREAMPLUG_OE_VAL_LOW 0 -#define DREAMPLUG_OE_VAL_HIGH (0xf << 16) /* 4 LED Pins high */ - -/* PHY related */ -#define MV88E1116_MAC_CTRL2_REG 21 -#define MV88E1116_PGADR_REG 22 -#define MV88E1116_RGMII_TXTM_CTRL (1 << 4) -#define MV88E1116_RGMII_RXTM_CTRL (1 << 5) - -#endif /* __DREAMPLUG_H */ diff --git a/board/Seagate/dockstar/dockstar.c b/board/Seagate/dockstar/dockstar.c index fb69193..d72e3ef 100644 --- a/board/Seagate/dockstar/dockstar.c +++ b/board/Seagate/dockstar/dockstar.c @@ -1,5 +1,6 @@ // SPDX-License-Identifier: GPL-2.0+ /* + * Copyright (C) 2022 Tony Dinh <mibodhi@gmail.com> * Copyright (C) 2010 Eric C. Cooper <ecc@cmu.edu> * * Based on sheevaplug.c originally written by @@ -11,18 +12,22 @@ #include <common.h> #include <bootstage.h> #include <init.h> -#include <miiphy.h> -#include <net.h> +#include <netdev.h> #include <asm/arch/soc.h> #include <asm/arch/mpp.h> #include <asm/arch/cpu.h> #include <asm/global_data.h> #include <asm/io.h> #include <asm/mach-types.h> -#include "dockstar.h" +#include <linux/bitops.h> DECLARE_GLOBAL_DATA_PTR; +#define DOCKSTAR_OE_LOW (~(0)) +#define DOCKSTAR_OE_HIGH (~(0)) +#define DOCKSTAR_OE_VAL_LOW BIT(29) /* USB_PWEN low */ +#define DOCKSTAR_OE_VAL_HIGH BIT(17) /* LED pin high */ + int board_early_init_f(void) { /* @@ -92,6 +97,11 @@ int board_early_init_f(void) return 0; } +int board_eth_init(struct bd_info *bis) +{ + return cpu_eth_init(bis); +} + int board_init(void) { /* @@ -105,53 +115,21 @@ int board_init(void) return 0; } -#ifdef CONFIG_RESET_PHY_R -/* Configure and enable MV88E1116 PHY */ -void reset_phy(void) -{ - u16 reg; - u16 devadr; - char *name = "egiga0"; - - if (miiphy_set_current_dev(name)) - return; - - /* command to read PHY dev address */ - if (miiphy_read(name, 0xEE, 0xEE, (u16 *) &devadr)) { - printf("Err..%s could not read PHY dev address\n", - __FUNCTION__); - return; - } - - /* - * Enable RGMII delay on Tx and Rx for CPU port - * Ref: sec 4.7.2 of chip datasheet - */ - miiphy_write(name, devadr, MV88E1116_PGADR_REG, 2); - miiphy_read(name, devadr, MV88E1116_MAC_CTRL_REG, ®); - reg |= (MV88E1116_RGMII_RXTM_CTRL | MV88E1116_RGMII_TXTM_CTRL); - miiphy_write(name, devadr, MV88E1116_MAC_CTRL_REG, reg); - miiphy_write(name, devadr, MV88E1116_PGADR_REG, 0); - - /* reset the phy */ - miiphy_reset(name, devadr); - - printf("88E1116 Initialized on %s\n", name); -} -#endif /* CONFIG_RESET_PHY_R */ - #if CONFIG_IS_ENABLED(BOOTSTAGE) -#define GREEN_LED (1 << 14) -#define ORANGE_LED (1 << 15) +#define GREEN_LED BIT(14) +#define ORANGE_LED BIT(15) #define BOTH_LEDS (GREEN_LED | ORANGE_LED) #define NEITHER_LED 0 static void set_leds(u32 leds, u32 blinking) { struct kwgpio_registers *r = (struct kwgpio_registers *)MVEBU_GPIO1_BASE; - u32 oe = readl(&r->oe) | BOTH_LEDS; + u32 oe; + u32 bl; + + oe = readl(&r->oe) | BOTH_LEDS; writel(oe & ~leds, &r->oe); /* active low */ - u32 bl = readl(&r->blink_en) & ~BOTH_LEDS; + bl = readl(&r->blink_en) & ~BOTH_LEDS; writel(bl | blinking, &r->blink_en); } diff --git a/board/Seagate/dockstar/dockstar.h b/board/Seagate/dockstar/dockstar.h deleted file mode 100644 index cbb1644..0000000 --- a/board/Seagate/dockstar/dockstar.h +++ /dev/null @@ -1,27 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0+ */ -/* - * Copyright (C) 2010 Eric C. Cooper <ecc@cmu.edu> - * - * Based on sheevaplug.h originally written by - * Prafulla Wadaskar <prafulla@marvell.com> - * (C) Copyright 2009 - * Marvell Semiconductor <www.marvell.com> - */ - -#ifndef __DOCKSTAR_H -#define __DOCKSTAR_H - -#define DOCKSTAR_OE_LOW (~(0)) -#define DOCKSTAR_OE_HIGH (~(0)) -#define DOCKSTAR_OE_VAL_LOW (1 << 29) /* USB_PWEN low */ -#define DOCKSTAR_OE_VAL_HIGH (1 << 17) /* LED pin high */ - -/* PHY related */ -#define MV88E1116_LED_FCTRL_REG 10 -#define MV88E1116_CPRSP_CR3_REG 21 -#define MV88E1116_MAC_CTRL_REG 21 -#define MV88E1116_PGADR_REG 22 -#define MV88E1116_RGMII_TXTM_CTRL (1 << 4) -#define MV88E1116_RGMII_RXTM_CTRL (1 << 5) - -#endif /* __DOCKSTAR_H */ diff --git a/board/cloudengines/pogo_e02/pogo_e02.c b/board/cloudengines/pogo_e02/pogo_e02.c index 039fd6e..59e1218 100644 --- a/board/cloudengines/pogo_e02/pogo_e02.c +++ b/board/cloudengines/pogo_e02/pogo_e02.c @@ -1,5 +1,6 @@ // SPDX-License-Identifier: GPL-2.0+ /* + * Copyright (C) 2022 Tony Dinh <mibodhi@gmail.com> * Copyright (C) 2012 * David Purdy <david.c.purdy@gmail.com> * @@ -12,16 +13,21 @@ #include <common.h> #include <init.h> #include <log.h> -#include <miiphy.h> -#include <net.h> +#include <netdev.h> #include <asm/arch/cpu.h> #include <asm/arch/soc.h> #include <asm/arch/mpp.h> #include <asm/global_data.h> -#include "pogo_e02.h" +#include <linux/bitops.h> DECLARE_GLOBAL_DATA_PTR; +/* GPIO configuration */ +#define POGO_E02_OE_LOW (~(0)) +#define POGO_E02_OE_HIGH (~(0)) +#define POGO_E02_OE_VAL_LOW BIT(29) +#define POGO_E02_OE_VAL_HIGH 0 + int board_early_init_f(void) { /* @@ -64,6 +70,11 @@ int board_early_init_f(void) return 0; } +int board_eth_init(struct bd_info *bis) +{ + return cpu_eth_init(bis); +} + int board_init(void) { /* Boot parameters address */ @@ -71,37 +82,3 @@ int board_init(void) return 0; } - -#ifdef CONFIG_RESET_PHY_R -/* Configure and initialize PHY */ -void reset_phy(void) -{ - u16 reg; - u16 devadr; - char *name = "egiga0"; - - if (miiphy_set_current_dev(name)) - return; - - /* command to read PHY dev address */ - if (miiphy_read(name, 0xEE, 0xEE, (u16 *) &devadr)) { - printf("Err..(%s) could not read PHY dev address\n", __func__); - return; - } - - /* - * Enable RGMII delay on Tx and Rx for CPU port - * Ref: sec 4.7.2 of chip datasheet - */ - miiphy_write(name, devadr, MV88E1116_PGADR_REG, 2); - miiphy_read(name, devadr, MV88E1116_MAC_CTRL_REG, ®); - reg |= (MV88E1116_RGMII_RXTM_CTRL | MV88E1116_RGMII_TXTM_CTRL); - miiphy_write(name, devadr, MV88E1116_MAC_CTRL_REG, reg); - miiphy_write(name, devadr, MV88E1116_PGADR_REG, 0); - - /* reset the phy */ - miiphy_reset(name, devadr); - - debug("88E1116 Initialized on %s\n", name); -} -#endif /* CONFIG_RESET_PHY_R */ diff --git a/board/cloudengines/pogo_e02/pogo_e02.h b/board/cloudengines/pogo_e02/pogo_e02.h deleted file mode 100644 index c8397b4..0000000 --- a/board/cloudengines/pogo_e02/pogo_e02.h +++ /dev/null @@ -1,29 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0+ */ -/* - * Copyright (C) 2012 - * David Purdy <david.c.purdy@gmail.com> - * - * Based on Kirkwood support: - * (C) Copyright 2009 - * Marvell Semiconductor <www.marvell.com> - * Written-by: Prafulla Wadaskar <prafulla@marvell.com> - */ - -#ifndef __POGO_E02_H -#define __POGO_E02_H - -/* GPIO configuration */ -#define POGO_E02_OE_LOW (~(0)) -#define POGO_E02_OE_HIGH (~(0)) -#define POGO_E02_OE_VAL_LOW (1 << 29) -#define POGO_E02_OE_VAL_HIGH 0 - -/* PHY related */ -#define MV88E1116_LED_FCTRL_REG 10 -#define MV88E1116_CPRSP_CR3_REG 21 -#define MV88E1116_MAC_CTRL_REG 21 -#define MV88E1116_PGADR_REG 22 -#define MV88E1116_RGMII_TXTM_CTRL (1 << 4) -#define MV88E1116_RGMII_RXTM_CTRL (1 << 5) - -#endif /* __POGO_E02_H */ diff --git a/board/iomega/iconnect/iconnect.c b/board/iomega/iconnect/iconnect.c index 9e123aa..0387160 100644 --- a/board/iomega/iconnect/iconnect.c +++ b/board/iomega/iconnect/iconnect.c @@ -1,5 +1,6 @@ // SPDX-License-Identifier: GPL-2.0+ /* + * Copyright (C) 2022 Tony Dinh <mibodhi@gmail.com> * Copyright (C) 2009-2012 * Wojciech Dubowik <wojciech.dubowik@neratec.com> * Luka Perkov <luka@openwrt.org> @@ -7,15 +8,20 @@ #include <common.h> #include <init.h> -#include <miiphy.h> +#include <netdev.h> #include <asm/arch/cpu.h> #include <asm/arch/soc.h> #include <asm/arch/mpp.h> #include <asm/global_data.h> -#include "iconnect.h" +#include <linux/bitops.h> DECLARE_GLOBAL_DATA_PTR; +#define ICONNECT_OE_LOW (~BIT(7)) +#define ICONNECT_OE_HIGH (~BIT(10)) +#define ICONNECT_OE_VAL_LOW (0) +#define ICONNECT_OE_VAL_HIGH BIT(10) + int board_early_init_f(void) { /* @@ -85,9 +91,14 @@ int board_early_init_f(void) return 0; } +int board_eth_init(struct bd_info *bis) +{ + return cpu_eth_init(bis); +} + int board_init(void) { - /* adress of boot parameters */ + /* address of boot parameters */ gd->bd->bi_boot_params = mvebu_sdram_bar(0) + 0x100; return 0; diff --git a/board/iomega/iconnect/iconnect.h b/board/iomega/iconnect/iconnect.h deleted file mode 100644 index 4f0be71..0000000 --- a/board/iomega/iconnect/iconnect.h +++ /dev/null @@ -1,24 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0+ */ -/* - * Copyright (C) 2009-2012 - * Wojciech Dubowik <wojciech.dubowik@neratec.com> - * Luka Perkov <luka@openwrt.org> - */ - -#ifndef __ICONNECT_H -#define __ICONNECT_H - -#define ICONNECT_OE_LOW (~(1 << 7)) -#define ICONNECT_OE_HIGH (~(1 << 10)) -#define ICONNECT_OE_VAL_LOW (0) -#define ICONNECT_OE_VAL_HIGH (1 << 10) - -/* PHY related */ -#define MV88E1116_LED_FCTRL_REG 10 -#define MV88E1116_CPRSP_CR3_REG 21 -#define MV88E1116_MAC_CTRL_REG 21 -#define MV88E1116_PGADR_REG 22 -#define MV88E1116_RGMII_TXTM_CTRL (1 << 4) -#define MV88E1116_RGMII_RXTM_CTRL (1 << 5) - -#endif /* __ICONNECT_H */ diff --git a/configs/dockstar_defconfig b/configs/dockstar_defconfig index 6c89a9a..cbc2bf6 100644 --- a/configs/dockstar_defconfig +++ b/configs/dockstar_defconfig @@ -2,6 +2,7 @@ CONFIG_ARM=y CONFIG_SKIP_LOWLEVEL_INIT=y CONFIG_SYS_DCACHE_OFF=y CONFIG_ARCH_CPU_INIT=y +CONFIG_SYS_THUMB_BUILD=y CONFIG_ARCH_KIRKWOOD=y CONFIG_SYS_KWD_CONFIG="board/Seagate/dockstar/kwbimage.cfg" CONFIG_SYS_TEXT_BASE=0x600000 @@ -18,6 +19,7 @@ CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="setenv bootargs ${console} ${mtdparts} ${bootargs_root}; ubi part root; ubifsmount ubi:root; ubifsload 0x800000 ${kernel}; ubifsload 0x1100000 ${initrd}; bootm 0x800000 0x1100000" CONFIG_USE_PREBOOT=y # CONFIG_DISPLAY_BOARDINFO is not set +CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="DockStar> " # CONFIG_CMD_FLASH is not set CONFIG_CMD_NAND=y @@ -36,11 +38,14 @@ CONFIG_ISO_PARTITION=y CONFIG_OF_CONTROL=y CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_NAND=y +CONFIG_NET_RANDOM_ETHADDR=y CONFIG_NETCONSOLE=y CONFIG_DM=y # CONFIG_MMC is not set CONFIG_MTD=y CONFIG_MTD_RAW_NAND=y +CONFIG_PHY_MARVELL=y +CONFIG_DM_ETH=y CONFIG_MVGBE=y CONFIG_MII=y CONFIG_SYS_NS16550=y diff --git a/configs/dreamplug_defconfig b/configs/dreamplug_defconfig index 2d2b7f5..72ab695 100644 --- a/configs/dreamplug_defconfig +++ b/configs/dreamplug_defconfig @@ -50,6 +50,7 @@ CONFIG_SYS_ATA_ALT_OFFSET=0x100 CONFIG_MTD=y CONFIG_DM_SPI_FLASH=y CONFIG_SPI_FLASH_MACRONIX=y +CONFIG_PHY_MARVELL=y CONFIG_DM_ETH=y CONFIG_MVGBE=y CONFIG_MII=y diff --git a/configs/iconnect_defconfig b/configs/iconnect_defconfig index 1c9c77a..336fae2 100644 --- a/configs/iconnect_defconfig +++ b/configs/iconnect_defconfig @@ -20,7 +20,8 @@ CONFIG_BOOTCOMMAND="setenv bootargs ${console} ${mtdparts} ${bootargs_root}; ubi CONFIG_USE_PREBOOT=y # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_BOARD_LATE_INIT=y -CONFIG_SYS_PROMPT="iconnect => " +CONFIG_HUSH_PARSER=y +CONFIG_SYS_PROMPT="iConnect> " # CONFIG_CMD_FLASH is not set CONFIG_CMD_NAND=y CONFIG_CMD_PCI=y @@ -39,11 +40,14 @@ CONFIG_OF_CONTROL=y CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_NAND=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_NET_RANDOM_ETHADDR=y CONFIG_NETCONSOLE=y CONFIG_DM=y # CONFIG_MMC is not set CONFIG_MTD=y CONFIG_MTD_RAW_NAND=y +CONFIG_PHY_MARVELL=y +CONFIG_DM_ETH=y CONFIG_MVGBE=y CONFIG_MII=y CONFIG_PCI=y diff --git a/configs/pogo_e02_defconfig b/configs/pogo_e02_defconfig index 10f08a5..7853cc7 100644 --- a/configs/pogo_e02_defconfig +++ b/configs/pogo_e02_defconfig @@ -2,13 +2,14 @@ CONFIG_ARM=y CONFIG_SKIP_LOWLEVEL_INIT=y CONFIG_SYS_DCACHE_OFF=y CONFIG_ARCH_CPU_INIT=y +CONFIG_SYS_THUMB_BUILD=y CONFIG_ARCH_KIRKWOOD=y CONFIG_SYS_KWD_CONFIG="board/cloudengines/pogo_e02/kwbimage.cfg" CONFIG_SYS_TEXT_BASE=0x600000 CONFIG_NR_DRAM_BANKS=2 CONFIG_TARGET_POGO_E02=y CONFIG_ENV_SIZE=0x20000 -CONFIG_ENV_OFFSET=0x60000 +CONFIG_ENV_OFFSET=0xC0000 CONFIG_DEFAULT_DEVICE_TREE="kirkwood-pogo_e02" CONFIG_IDENT_STRING="\nPogo E02" # CONFIG_SYS_MALLOC_F is not set @@ -36,11 +37,14 @@ CONFIG_OF_CONTROL=y CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_NAND=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_NET_RANDOM_ETHADDR=y CONFIG_NETCONSOLE=y CONFIG_DM=y # CONFIG_MMC is not set CONFIG_MTD=y CONFIG_MTD_RAW_NAND=y +CONFIG_PHY_MARVELL=y +CONFIG_DM_ETH=y CONFIG_MVGBE=y CONFIG_MII=y CONFIG_SYS_NS16550=y diff --git a/include/configs/dockstar.h b/include/configs/dockstar.h index 0ad04ee..736c724 100644 --- a/include/configs/dockstar.h +++ b/include/configs/dockstar.h @@ -1,5 +1,6 @@ /* SPDX-License-Identifier: GPL-2.0+ */ /* + * Copyright (C) 2022 Tony Dinh <mibodhi@gmail.com> * Copyright (C) 2010 Eric C. Cooper <ecc@cmu.edu> * * Based on sheevaplug.h originally written by @@ -18,21 +19,13 @@ #include "mv-common.h" /* - * Environment variables configurations - */ -/* - * max 4k env size is enough, but in case of nand - * it has to be rounded to sector size - */ - -/* * Default environment variables */ #define CONFIG_EXTRA_ENV_SETTINGS \ "console=console=ttyS0,115200\0" \ "mtdids=nand0=orion_nand\0" \ - "mtdparts="CONFIG_MTDPARTS_DEFAULT \ + "mtdparts=" CONFIG_MTDPARTS_DEFAULT \ "kernel=/boot/uImage\0" \ "initrd=/boot/uInitrd\0" \ "bootargs_root=ubi.mtd=1 root=ubi0:root rootfstype=ubifs ro\0" @@ -40,13 +33,10 @@ /* * Ethernet Driver configuration */ -#ifdef CONFIG_CMD_NET #define CONFIG_MVGBE_PORTS {1, 0} /* enable port 0 only */ #define CONFIG_PHY_BASE_ADR 0 -#endif /* CONFIG_CMD_NET */ - -/* - * File system - */ +#ifdef CONFIG_RESET_PHY_R +#undef CONFIG_RESET_PHY_R /* remove legacy reset_phy() */ +#endif #endif /* _CONFIG_DOCKSTAR_H */ diff --git a/include/configs/dreamplug.h b/include/configs/dreamplug.h index 0b3ee13..fd12a39 100644 --- a/include/configs/dreamplug.h +++ b/include/configs/dreamplug.h @@ -1,7 +1,7 @@ /* SPDX-License-Identifier: GPL-2.0+ */ /* - * (C) Copyright 2011 - * Jason Cooper <u-boot@lakedaemon.net> + * (C) Copyright 2022 Tony Dinh <mibodhi@gmail.com> + * (C) Copyright 2011 Jason Cooper <u-boot@lakedaemon.net> * * Based on work by: * Marvell Semiconductor <www.marvell.com> @@ -14,15 +14,6 @@ #include "mv-common.h" /* - * Environment variables configurations - */ - -/* - * max 4k env size is enough, but in case of nand - * it has to be rounded to sector size - */ - -/* * Default environment variables */ @@ -36,16 +27,15 @@ /* * Ethernet Driver configuration */ -#ifdef CONFIG_CMD_NET #define CONFIG_MVGBE_PORTS {1, 1} /* enable both ports */ #define CONFIG_PHY_BASE_ADR 0 -#endif /* CONFIG_CMD_NET */ +#ifdef CONFIG_RESET_PHY_R +#undef CONFIG_RESET_PHY_R /* remove legacy reset_phy() */ +#endif /* * SATA Driver configuration */ -#ifdef CONFIG_SATA #define CONFIG_LBA48 -#endif /* CONFIG_SATA */ #endif /* _CONFIG_DREAMPLUG_H */ diff --git a/include/configs/iconnect.h b/include/configs/iconnect.h index f1aad1e..44a4b44 100644 --- a/include/configs/iconnect.h +++ b/include/configs/iconnect.h @@ -1,5 +1,6 @@ /* SPDX-License-Identifier: GPL-2.0+ */ /* + * Copyright (C) 2022 Tony Dinh <mibodhi@gmail.com> * (C) Copyright 2009-2012 * Wojciech Dubowik <wojciech.dubowik@neratec.com> * Luka Perkov <luka@openwrt.org> @@ -10,32 +11,24 @@ #include "mv-common.h" -/* - * Environment variables configuration - */ - -/* - * Default environment variables - */ - #define CONFIG_EXTRA_ENV_SETTINGS \ "console=console=ttyS0,115200\0" \ "mtdids=nand0=orion_nand\0" \ - "mtdparts="CONFIG_MTDPARTS_DEFAULT \ + "mtdparts=" CONFIG_MTDPARTS_DEFAULT \ "kernel=/boot/uImage\0" \ "bootargs_root=noinitrd ubi.mtd=2 root=ubi0:rootfs rootfstype=ubifs\0" /* * Ethernet driver configuration + * + * This board has PCIe Wifi card, so allow Ethernet to be disabled */ #ifdef CONFIG_CMD_NET #define CONFIG_MVGBE_PORTS {1, 0} /* enable port 0 only */ #define CONFIG_PHY_BASE_ADR 11 -#undef CONFIG_RESET_PHY_R +#ifdef CONFIG_RESET_PHY_R +#undef CONFIG_RESET_PHY_R /* remove legacy reset_phy() */ +#endif #endif /* CONFIG_CMD_NET */ -/* - * File system - */ - #endif /* _CONFIG_ICONNECT_H */ diff --git a/include/configs/pogo_e02.h b/include/configs/pogo_e02.h index 3e94125..51c802f 100644 --- a/include/configs/pogo_e02.h +++ b/include/configs/pogo_e02.h @@ -15,10 +15,6 @@ #include "mv-common.h" /* - * Environment variables configurations - */ - -/* * Default environment variables */ @@ -33,13 +29,10 @@ /* * Ethernet Driver configuration */ -#ifdef CONFIG_CMD_NET #define CONFIG_MVGBE_PORTS {1, 0} /* enable port 0 only */ #define CONFIG_PHY_BASE_ADR 0 -#endif /* CONFIG_CMD_NET */ - -/* - * File system - */ +#ifdef CONFIG_RESET_PHY_R +#undef CONFIG_RESET_PHY_R /* remove legacy reset_phy() */ +#endif #endif /* _CONFIG_POGO_E02_H */ diff --git a/tools/kwboot.c b/tools/kwboot.c index 2684f0e..68c0ef1 100644 --- a/tools/kwboot.c +++ b/tools/kwboot.c @@ -1183,10 +1183,10 @@ kwboot_xmodem(int tty, const void *_img, size_t size, int baudrate) static int kwboot_term_pipe(int in, int out, const char *quit, int *s) { + char buf[128]; ssize_t nin; - char _buf[128], *buf = _buf; - nin = read(in, buf, sizeof(_buf)); + nin = read(in, buf, sizeof(buf)); if (nin <= 0) return -1; @@ -1194,18 +1194,21 @@ kwboot_term_pipe(int in, int out, const char *quit, int *s) int i; for (i = 0; i < nin; i++) { - if (*buf == quit[*s]) { + if (buf[i] == quit[*s]) { (*s)++; - if (!quit[*s]) - return 0; - buf++; - nin--; + if (!quit[*s]) { + nin = i - *s; + break; + } } else { - if (kwboot_write(out, quit, *s) < 0) + if (*s > i && kwboot_write(out, quit, *s - i) < 0) return -1; *s = 0; } } + + if (i == nin) + nin -= *s; } if (kwboot_write(out, buf, nin) < 0) @@ -1767,7 +1770,7 @@ main(int argc, char **argv) bootmsg = kwboot_msg_boot; if (prev_optind == optind) goto usage; - if (argv[optind] && argv[optind][0] != '-') + if (optind < argc - 1 && argv[optind] && argv[optind][0] != '-') imgpath = argv[optind++]; break; |