1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
251
252
253
254
255
256
257
258
259
260
261
262
263
264
265
266
267
268
269
270
271
272
273
274
275
276
277
278
279
280
281
282
283
284
285
286
287
288
289
290
291
292
293
294
295
296
297
298
299
300
301
302
303
304
305
306
307
308
309
310
311
312
313
314
315
316
317
318
319
320
321
322
323
324
325
326
327
328
329
330
331
332
333
334
335
336
337
338
339
340
341
342
343
344
345
346
347
348
349
350
351
352
353
354
355
356
357
358
359
360
361
362
363
364
365
366
367
368
369
370
371
372
373
374
375
376
377
378
379
380
381
382
383
384
385
386
387
388
389
390
391
392
393
394
395
396
397
398
399
400
401
402
403
404
405
406
407
408
409
410
411
412
413
414
415
416
417
418
419
420
421
422
423
424
425
426
427
428
429
430
431
432
433
434
435
436
437
438
439
440
441
442
443
444
445
446
447
448
449
450
451
452
453
454
455
456
457
458
459
460
461
462
463
464
465
466
467
468
469
470
471
472
473
474
475
476
477
478
479
480
481
482
483
484
485
486
487
488
489
490
491
492
493
494
495
496
497
498
499
500
501
502
503
504
505
506
507
508
509
510
511
512
513
514
515
516
517
518
519
520
521
522
523
524
525
526
527
528
529
530
531
532
533
534
535
536
537
538
539
540
541
542
543
544
545
546
547
548
549
550
551
552
553
554
555
556
557
558
559
560
561
562
563
564
565
566
567
568
569
570
571
572
573
574
575
576
577
578
579
580
581
582
583
584
585
586
587
588
589
590
591
592
593
594
595
596
597
598
599
600
601
602
603
604
605
606
607
608
609
610
611
612
613
614
615
616
617
618
619
620
621
622
623
624
625
626
627
628
629
630
631
632
633
634
635
636
637
638
639
640
641
642
643
644
645
646
647
648
649
650
651
652
653
654
655
656
657
658
659
660
661
662
663
664
665
666
667
668
669
670
671
672
673
674
675
676
677
678
679
680
681
682
683
684
685
686
687
688
689
690
691
692
693
694
695
696
697
698
699
700
701
702
703
704
705
706
707
708
709
710
711
712
713
714
715
716
717
718
719
720
721
722
723
724
725
726
727
728
729
730
731
732
733
734
735
736
737
738
739
740
741
742
743
744
745
746
747
748
749
750
751
752
753
754
755
756
757
758
759
760
761
762
763
764
765
766
767
768
769
770
771
772
773
774
775
776
777
778
779
780
781
782
783
784
785
786
787
788
789
790
791
792
793
794
795
796
797
798
799
800
801
802
803
804
805
806
807
808
809
810
811
812
813
814
815
816
817
818
819
820
821
822
823
824
825
826
827
828
829
830
831
832
833
834
835
836
837
838
839
840
841
842
843
844
845
846
847
848
849
850
851
852
853
854
855
856
857
858
859
860
861
862
863
864
865
866
867
868
869
870
871
872
873
874
875
876
877
878
879
880
881
882
883
884
885
886
887
888
889
890
891
892
893
894
895
896
897
898
899
900
901
902
903
904
905
906
907
908
909
910
911
912
913
914
915
916
917
918
919
920
921
922
923
924
925
926
927
928
929
930
931
932
933
934
935
936
937
938
939
940
941
942
943
944
945
946
947
948
949
950
951
952
953
954
955
956
957
958
959
960
961
962
963
964
965
966
967
968
969
970
971
972
973
974
975
976
977
978
979
980
981
982
983
984
985
986
987
988
989
990
991
992
993
994
995
996
997
998
999
1000
1001
1002
1003
1004
1005
1006
1007
1008
1009
1010
1011
1012
1013
1014
1015
1016
1017
1018
1019
1020
1021
1022
1023
1024
1025
1026
1027
1028
1029
1030
1031
1032
1033
1034
1035
1036
1037
1038
1039
1040
1041
1042
1043
1044
1045
1046
1047
1048
1049
1050
1051
1052
1053
1054
1055
1056
1057
1058
1059
1060
1061
1062
1063
1064
1065
1066
1067
1068
1069
1070
1071
1072
1073
1074
1075
1076
1077
1078
1079
1080
1081
1082
1083
1084
1085
1086
1087
1088
1089
1090
1091
1092
1093
1094
1095
1096
1097
1098
1099
1100
1101
1102
1103
1104
1105
1106
1107
1108
1109
1110
1111
1112
1113
1114
1115
1116
1117
1118
1119
1120
1121
1122
1123
1124
1125
1126
1127
1128
1129
1130
1131
1132
1133
1134
1135
1136
1137
1138
1139
1140
1141
1142
1143
1144
1145
1146
1147
1148
1149
1150
1151
1152
1153
1154
1155
1156
1157
1158
1159
1160
1161
1162
1163
1164
1165
1166
1167
1168
1169
1170
1171
1172
1173
1174
1175
1176
1177
1178
1179
1180
1181
1182
1183
1184
1185
1186
1187
1188
1189
1190
1191
1192
1193
1194
1195
1196
1197
1198
1199
1200
1201
1202
1203
1204
1205
1206
1207
1208
1209
1210
1211
1212
1213
1214
1215
1216
1217
1218
1219
1220
1221
1222
1223
1224
1225
1226
1227
1228
1229
1230
1231
1232
1233
1234
1235
1236
1237
1238
1239
1240
1241
1242
1243
1244
1245
1246
1247
1248
1249
1250
1251
1252
1253
1254
1255
1256
1257
1258
1259
1260
1261
1262
1263
1264
1265
1266
1267
1268
1269
1270
1271
1272
1273
1274
1275
1276
1277
1278
1279
1280
1281
1282
1283
1284
1285
1286
1287
1288
1289
1290
1291
1292
1293
1294
1295
1296
1297
1298
1299
1300
1301
1302
1303
1304
1305
1306
1307
1308
1309
1310
1311
1312
1313
1314
1315
1316
1317
1318
1319
1320
1321
1322
1323
1324
1325
1326
1327
1328
1329
1330
1331
1332
1333
1334
1335
1336
1337
1338
1339
1340
1341
1342
1343
1344
1345
1346
1347
1348
1349
1350
1351
1352
1353
1354
1355
1356
1357
1358
1359
1360
1361
1362
1363
1364
1365
1366
1367
1368
1369
1370
1371
1372
1373
1374
1375
1376
1377
1378
1379
1380
1381
1382
1383
1384
1385
1386
1387
1388
1389
1390
1391
1392
1393
1394
1395
1396
1397
1398
1399
1400
1401
1402
1403
1404
1405
1406
1407
1408
1409
1410
1411
1412
1413
1414
1415
1416
1417
1418
1419
1420
1421
1422
1423
1424
1425
1426
1427
1428
1429
1430
1431
1432
1433
1434
1435
1436
1437
1438
1439
1440
1441
1442
1443
1444
1445
1446
1447
1448
1449
1450
1451
1452
1453
1454
1455
1456
1457
1458
1459
1460
1461
1462
1463
1464
1465
1466
1467
1468
1469
1470
1471
1472
1473
1474
1475
1476
1477
1478
1479
1480
1481
1482
1483
1484
1485
1486
1487
1488
1489
1490
1491
1492
1493
1494
1495
1496
1497
1498
1499
1500
1501
1502
1503
1504
1505
1506
1507
1508
1509
1510
1511
1512
1513
1514
1515
1516
1517
1518
1519
1520
1521
1522
1523
1524
1525
1526
1527
1528
1529
1530
1531
1532
1533
1534
1535
1536
1537
1538
1539
1540
1541
1542
1543
1544
1545
1546
1547
1548
1549
1550
1551
1552
1553
1554
1555
1556
1557
1558
1559
1560
1561
1562
1563
1564
1565
1566
1567
1568
1569
1570
1571
1572
1573
1574
1575
1576
1577
1578
1579
1580
1581
1582
1583
1584
1585
1586
1587
1588
1589
1590
1591
1592
1593
1594
1595
1596
1597
1598
1599
1600
1601
1602
1603
1604
1605
1606
1607
1608
1609
1610
1611
1612
1613
1614
1615
1616
1617
1618
1619
1620
1621
1622
1623
1624
1625
1626
1627
1628
1629
1630
1631
1632
1633
1634
1635
1636
1637
1638
1639
1640
1641
1642
1643
1644
1645
1646
1647
1648
1649
1650
1651
1652
1653
1654
1655
1656
1657
1658
1659
1660
1661
1662
1663
1664
1665
1666
1667
1668
1669
1670
1671
1672
1673
1674
1675
1676
1677
1678
1679
1680
1681
1682
1683
1684
1685
1686
1687
1688
1689
1690
1691
1692
1693
1694
1695
1696
1697
1698
1699
1700
1701
1702
1703
1704
1705
1706
1707
1708
1709
1710
1711
1712
1713
1714
1715
1716
1717
1718
1719
1720
1721
1722
1723
1724
1725
1726
1727
1728
1729
1730
1731
1732
1733
1734
1735
1736
1737
1738
1739
1740
1741
1742
1743
1744
1745
1746
1747
1748
1749
1750
1751
1752
1753
1754
1755
1756
1757
1758
1759
1760
1761
1762
1763
1764
1765
1766
1767
1768
1769
1770
1771
1772
1773
1774
1775
1776
1777
1778
1779
1780
1781
1782
1783
1784
1785
1786
1787
1788
1789
1790
1791
1792
1793
1794
1795
1796
1797
1798
1799
1800
1801
1802
1803
1804
1805
1806
1807
1808
1809
1810
1811
1812
1813
1814
1815
1816
1817
1818
1819
1820
1821
1822
1823
1824
1825
1826
1827
1828
1829
1830
1831
1832
1833
1834
1835
1836
1837
1838
1839
1840
1841
1842
1843
1844
1845
1846
1847
1848
1849
1850
1851
1852
1853
1854
1855
1856
1857
1858
1859
1860
1861
1862
1863
1864
1865
1866
1867
1868
1869
1870
1871
1872
1873
1874
1875
1876
1877
1878
1879
1880
|
<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN"
"http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd">
<html xmlns="http://www.w3.org/1999/xhtml">
<head>
<meta http-equiv="X-UA-Compatible" content="IE=Edge" />
<meta http-equiv="Content-Type" content="text/html; charset=utf-8" />
<title>skiboot-5.9 — skiboot 4d27f03
documentation</title>
<link rel="stylesheet" href="../_static/classic.css" type="text/css" />
<link rel="stylesheet" href="../_static/pygments.css" type="text/css" />
<script type="text/javascript" id="documentation_options" data-url_root="../" src="../_static/documentation_options.js"></script>
<script type="text/javascript" src="../_static/jquery.js"></script>
<script type="text/javascript" src="../_static/underscore.js"></script>
<script type="text/javascript" src="../_static/doctools.js"></script>
<script type="text/javascript" src="../_static/language_data.js"></script>
<link rel="index" title="Index" href="../genindex.html" />
<link rel="search" title="Search" href="../search.html" />
<link rel="next" title="skiboot-5.9-rc1" href="skiboot-5.9-rc1.html" />
<link rel="prev" title="skiboot-5.8-rc1" href="skiboot-5.8-rc1.html" />
</head><body>
<div class="related" role="navigation" aria-label="related navigation">
<h3>Navigation</h3>
<ul>
<li class="right" style="margin-right: 10px">
<a href="../genindex.html" title="General Index"
accesskey="I">index</a></li>
<li class="right" >
<a href="skiboot-5.9-rc1.html" title="skiboot-5.9-rc1"
accesskey="N">next</a> |</li>
<li class="right" >
<a href="skiboot-5.8-rc1.html" title="skiboot-5.8-rc1"
accesskey="P">previous</a> |</li>
<li class="nav-item nav-item-0"><a href="../index.html">skiboot 4d27f03
documentation</a> »</li>
<li class="nav-item nav-item-1"><a href="index.html" accesskey="U">Release Notes</a> »</li>
</ul>
</div>
<div class="document">
<div class="documentwrapper">
<div class="bodywrapper">
<div class="body" role="main">
<div class="section" id="skiboot-5-9">
<span id="id1"></span><h1>skiboot-5.9<a class="headerlink" href="#skiboot-5-9" title="Permalink to this headline">¶</a></h1>
<p>skiboot v5.9 was released on Tuesday October 31st 2017. It is the first
release of skiboot 5.9 and becomes the new stable release
of skiboot following the 5.8 release, first released August 31st 2017.
In this cyle we have had five release candidate releases, mostly centered
around bug fixing for POWER9 platforms.</p>
<p>This release should be considered suitable for early-access POWER9 systems.</p>
<p>skiboot v5.9 contains all bug fixes as of <a class="reference internal" href="skiboot-5.4.8.html#skiboot-5-4-8"><span class="std std-ref">skiboot-5.4.8</span></a>
and <a class="reference internal" href="skiboot-5.1.21.html#skiboot-5-1-21"><span class="std std-ref">skiboot-5.1.21</span></a> (the currently maintained stable releases).
There may be some 5.9.x stable releases, depending on what issues are found.</p>
<p>For how the skiboot stable releases work, see <a class="reference internal" href="../process/stable-skiboot-rules.html#stable-rules"><span class="std std-ref">Skiboot stable tree rules and releases</span></a> for details.</p>
<p>Over <a class="reference internal" href="skiboot-5.8.html#skiboot-5-8"><span class="std std-ref">skiboot-5.8</span></a>, we have the following changes:</p>
<div class="section" id="new-features">
<h2>New Features<a class="headerlink" href="#new-features" title="Permalink to this headline">¶</a></h2>
<div class="section" id="power8">
<h3>POWER8<a class="headerlink" href="#power8" title="Permalink to this headline">¶</a></h3>
<ul>
<li><p class="first">fast-reset by default (if possible)</p>
<p>Currently, this is limited to POWER8 systems.</p>
<p>A normal reboot will, rather than doing a full IPL, go through a
fast reboot procedure. This reduces the “reboot to petitboot” time
from minutes to a handful of seconds.</p>
</li>
</ul>
</div>
<div class="section" id="power9">
<h3>POWER9<a class="headerlink" href="#power9" title="Permalink to this headline">¶</a></h3>
<p>Since <a class="reference internal" href="skiboot-5.9-rc3.html#skiboot-5-9-rc3"><span class="std std-ref">skiboot-5.9-rc3</span></a>:</p>
<ul class="simple">
<li>occ-sensors : Add OCC inband sensor region to exports
(useful for debugging)</li>
</ul>
<p>Two SRESET fixes (see below for feature description):</p>
<ul>
<li><p class="first">core: direct-controls: Fix clearing of special wakeup</p>
<p>‘special_wakeup_count’ is incremented on successfully asserting
special wakeup. So we will never clear the special wakeup if we
check ‘special_wakeup_count’ to be zero. Fix this issue by checking
the ‘special_wakeup_count’ to 1 in dctl_clear_special_wakeup().</p>
</li>
<li><p class="first">core/direct-controls: increase special wakeup timeout on POWER9</p>
<p>Some instances have been observed where the special wakeup assert
times out. The current timeout is too short for deeper sleep states.
Hostboot uses 100ms, so match that.</p>
</li>
</ul>
<p>Since <a class="reference internal" href="skiboot-5.9-rc2.html#skiboot-5-9-rc2"><span class="std std-ref">skiboot-5.9-rc2</span></a>:
- cpu: Add OPAL_REINIT_CPUS_TM_SUSPEND_DISABLED</p>
<blockquote>
<div><p>Add a new CPU reinit flag, “TM Suspend Disabled”, which requests that
CPUs be configured so that TM (Transactional Memory) suspend mode is
disabled.</p>
<p>Currently this always fails, because skiboot has no way to query the
state. A future hostboot change will add a mechanism for skiboot to
determine the status and return an appropriate error code.</p>
</div></blockquote>
<p>Since <a class="reference internal" href="skiboot-5.8.html#skiboot-5-8"><span class="std std-ref">skiboot-5.8</span></a>:</p>
<ul>
<li><p class="first">POWER9 power management during boot</p>
<p>Less power should be consumed during boot.</p>
</li>
<li><p class="first">OPAL_SIGNAL_SYSTEM_RESET for POWER9</p>
<p>This implements OPAL_SIGNAL_SYSTEM_RESET, using scom registers to
quiesce the target thread and raise a system reset exception on it.
It has been tested on DD2 with stop0 ESL=0 and ESL=1 shallow power
saving modes.</p>
<p>DD1 is not implemented because it is sufficiently different as to
make support difficult.</p>
</li>
<li><p class="first">Enable deep idle states for POWER9</p>
<ul>
<li><p class="first">SLW: Add support for p9_stop_api</p>
<p>p9_stop_api’s are used to set SPR state on a core wakeup form a deeper
low power state. p9_stop_api uses low level platform formware and
self-restore microcode to restore the sprs to requested values.</p>
<p>Code is taken from :
<a class="reference external" href="https://github.com/open-power/hostboot/tree/master/src/import/chips/p9/procedures/utils/stopreg">https://github.com/open-power/hostboot/tree/master/src/import/chips/p9/procedures/utils/stopreg</a></p>
</li>
<li><p class="first">SLW: Removing timebase related flags for stop4</p>
<p>When a core enters stop4, it does not loose decrementer and time base.
Hence removing flags OPAL_PM_DEC_STOP and OPAL_PM_TIMEBASE_STOP.</p>
</li>
<li><p class="first">SLW: Allow deep states if homer address is known</p>
<p>Use a common variable has_wakeup_engine instead of has_slw to tell if
the:
- SLW image is populated in case of power8
- CME image is populated in case of power9</p>
<p>Currently we expect CME to be loaded if homer address is known ( except
for simulators)</p>
</li>
<li><p class="first">SLW: Configure self-restore for HRMOR</p>
<p>Make a stop api call using libpore to restore HRMOR register. HRMOR needs
to be cleared so that when thread exits stop, they arrives at linux
system_reset vector (0x100).</p>
</li>
<li><p class="first">SLW: Add opal_slw_set_reg support for power9</p>
<p>This OPAL call is made from Linux to OPAL to configure values in
various SPRs after wakeup from a deep idle state.</p>
</li>
</ul>
</li>
<li><p class="first">PHB4: CAPP recovery</p>
<p>CAPP recovery is initiated when a CAPP Machine Check is detected.
The capp recovery procedure is initiated via a Hypervisor Maintenance
interrupt (HMI).</p>
<p>CAPP Machine Check may arise from either an error that results in a PHB
freeze or from an internal CAPP error with CAPP checkstop FIR action.
An error that causes a PHB freeze will result in the link down signal
being asserted. The system continues running and the CAPP and PSL will
be re-initialized.</p>
<p>This implements CAPP recovery for POWER9 systems</p>
</li>
<li><p class="first">Add <code class="docutils literal notranslate"><span class="pre">wafer-location</span></code> property for POWER9</p>
<p>Extract wafer-location from ECID and add property under xscom node.
- bits 64:71 are the chip x location (7:0)
- bits 72:79 are the chip y location (7:0)</p>
<p>Sample output:</p>
<div class="highlight-default notranslate"><div class="highlight"><pre><span></span><span class="p">[</span><span class="n">root</span><span class="nd">@wsp</span> <span class="n">xscom</span><span class="nd">@623fc00000000</span><span class="p">]</span><span class="c1"># lsprop ecid</span>
<span class="n">ecid</span> <span class="mi">019</span><span class="n">a00d4</span> <span class="mi">03100718</span> <span class="mi">852</span><span class="n">c0000</span> <span class="mi">00</span><span class="n">fd7911</span>
<span class="p">[</span><span class="n">root</span><span class="nd">@wsp</span> <span class="n">xscom</span><span class="nd">@623fc00000000</span><span class="p">]</span><span class="c1"># lsprop wafer-location</span>
<span class="n">wafer</span><span class="o">-</span><span class="n">location</span> <span class="mi">00000085</span> <span class="mi">0000002</span><span class="n">c</span>
</pre></div>
</div>
</li>
<li><p class="first">Add <code class="docutils literal notranslate"><span class="pre">wafer-id</span></code> property for POWER9</p>
<p>Wafer id is derived from ECID data.
- bits 4:63 are the wafer id ( ten 6 bit fields each containing a code)</p>
<p>Sample output:</p>
<div class="highlight-default notranslate"><div class="highlight"><pre><span></span><span class="p">[</span><span class="n">root</span><span class="nd">@wsp</span> <span class="n">xscom</span><span class="nd">@623fc00000000</span><span class="p">]</span><span class="c1"># lsprop ecid</span>
<span class="n">ecid</span> <span class="mi">019</span><span class="n">a00d4</span> <span class="mi">03100718</span> <span class="mi">852</span><span class="n">c0000</span> <span class="mi">00</span><span class="n">fd7911</span>
<span class="p">[</span><span class="n">root</span><span class="nd">@wsp</span> <span class="n">xscom</span><span class="nd">@623fc00000000</span><span class="p">]</span><span class="c1"># lsprop wafer-id</span>
<span class="n">wafer</span><span class="o">-</span><span class="nb">id</span> <span class="s2">"6Q0DG340SO"</span>
</pre></div>
</div>
</li>
<li><p class="first">Add <code class="docutils literal notranslate"><span class="pre">ecid</span></code> property under <code class="docutils literal notranslate"><span class="pre">xscom</span></code> node for POWER9.
Sample output:</p>
<div class="highlight-default notranslate"><div class="highlight"><pre><span></span><span class="p">[</span><span class="n">root</span><span class="nd">@wsp</span> <span class="n">xscom</span><span class="nd">@623fc00000000</span><span class="p">]</span><span class="c1"># lsprop ecid</span>
<span class="n">ecid</span> <span class="mi">019</span><span class="n">a00d4</span> <span class="mi">03100718</span> <span class="mi">852</span><span class="n">c0000</span> <span class="mi">00</span><span class="n">fd7911</span>
</pre></div>
</div>
</li>
<li><p class="first">Add ibm,firmware-versions device tree node</p>
<p>In P8, hostboot provides mini device tree. It contains <code class="docutils literal notranslate"><span class="pre">/ibm,firmware-versions</span></code>
node which has various firmware component version details.</p>
<p>In P9, OPAL is building device tree. This patch adds support to parse VERSION
section of PNOR and create <code class="docutils literal notranslate"><span class="pre">/ibm,firmware-versions</span></code> device tree node.</p>
<p>Sample output:</p>
<div class="highlight-default notranslate"><div class="highlight"><pre><span></span><span class="o">/</span><span class="n">sys</span><span class="o">/</span><span class="n">firmware</span><span class="o">/</span><span class="n">devicetree</span><span class="o">/</span><span class="n">base</span><span class="o">/</span><span class="n">ibm</span><span class="p">,</span><span class="n">firmware</span><span class="o">-</span><span class="n">versions</span> <span class="c1"># lsprop .</span>
<span class="n">occ</span> <span class="s2">"6a00709"</span>
<span class="n">skiboot</span> <span class="s2">"v5.7-rc1-p344fb62"</span>
<span class="n">buildroot</span> <span class="s2">"2017.02.2-7-g23118ce"</span>
<span class="n">capp</span><span class="o">-</span><span class="n">ucode</span> <span class="s2">"9c73e9f"</span>
<span class="n">petitboot</span> <span class="s2">"v1.4.3-p98b6d83"</span>
<span class="n">sbe</span> <span class="s2">"02021c6"</span>
<span class="nb">open</span><span class="o">-</span><span class="n">power</span> <span class="s2">"witherspoon-v1.17-128-gf1b53c7-dirty"</span>
<span class="o">....</span>
<span class="o">....</span>
</pre></div>
</div>
</li>
</ul>
</div>
</div>
<div class="section" id="id2">
<h2>POWER9<a class="headerlink" href="#id2" title="Permalink to this headline">¶</a></h2>
<p>Since <a class="reference internal" href="skiboot-5.9-rc5.html#skiboot-5-9-rc5"><span class="std std-ref">skiboot-5.9-rc5</span></a>:</p>
<ul>
<li><p class="first">Suppress XSCOM chiplet-offline errors on P9</p>
<p>Workaround on P9: PRD does operations it <em>knows</em> will fail with this
error to work around a hardware issue where accesses via the PIB
(FSI or OCC) work as expected, accesses via the ADU (what xscom goes
through) do not. The chip logic will always return all FFs if there
is any error on the scom.</p>
</li>
<li><p class="first">asm/head: initialize preferred DSCR value</p>
<p>POWER7/8 use DSCR=0. POWER9 preferred value has “stride-N” enabled.</p>
</li>
</ul>
<p>Since <a class="reference internal" href="skiboot-5.9-rc4.html#skiboot-5-9-rc4"><span class="std std-ref">skiboot-5.9-rc4</span></a>:
- opal/hmi: Workaround Power9 hw logic bug for couple of TFMR TB errors.
- opal/hmi: Fix TB reside and HDEC parity error recovery for power9</p>
<p>Since <a class="reference internal" href="skiboot-5.9-rc2.html#skiboot-5-9-rc2"><span class="std std-ref">skiboot-5.9-rc2</span></a>:
- hw/imc: Fix IMC Catalog load for DD2.X processors</p>
<p>Since <a class="reference internal" href="skiboot-5.9-rc1.html#skiboot-5-9-rc1"><span class="std std-ref">skiboot-5.9-rc1</span></a>:
- xive: Fix VP free block group mode false-positive parameter check</p>
<blockquote>
<div><p>The check to ensure the buddy allocation idx is aligned to its
allocation order was not taking into account the allocation split.
This would result in opal_xive_free_vp_block failures despite
giving the same value as returned by opal_xive_alloc_vp_block.</p>
<p>E.g., starting then stopping 4 KVM guests gives the following pattern
in the host:</p>
<div class="highlight-default notranslate"><div class="highlight"><pre><span></span><span class="n">opal_xive_alloc_vp_block</span><span class="p">(</span><span class="mi">5</span><span class="p">)</span><span class="o">=</span><span class="mh">0x45000020</span>
<span class="n">opal_xive_alloc_vp_block</span><span class="p">(</span><span class="mi">5</span><span class="p">)</span><span class="o">=</span><span class="mh">0x45000040</span>
<span class="n">opal_xive_alloc_vp_block</span><span class="p">(</span><span class="mi">5</span><span class="p">)</span><span class="o">=</span><span class="mh">0x45000060</span>
<span class="n">opal_xive_alloc_vp_block</span><span class="p">(</span><span class="mi">5</span><span class="p">)</span><span class="o">=</span><span class="mh">0x45000080</span>
<span class="n">opal_xive_free_vp_block</span><span class="p">(</span><span class="mh">0x45000020</span><span class="p">)</span><span class="o">=-</span><span class="mi">1</span>
<span class="n">opal_xive_free_vp_block</span><span class="p">(</span><span class="mh">0x45000040</span><span class="p">)</span><span class="o">=</span><span class="mi">0</span>
<span class="n">opal_xive_free_vp_block</span><span class="p">(</span><span class="mh">0x45000060</span><span class="p">)</span><span class="o">=-</span><span class="mi">1</span>
<span class="n">opal_xive_free_vp_block</span><span class="p">(</span><span class="mh">0x45000080</span><span class="p">)</span><span class="o">=</span><span class="mi">0</span>
</pre></div>
</div>
</div></blockquote>
<ul>
<li><p class="first">hw/imc: pause microcode at boot</p>
<p>IMC nest counters has both in-band (ucode access) and out of
band access to it. Since not all nest counter configurations
are supported by ucode, out of band tools are used to characterize
other configuration.</p>
<p>So it is prefer to pause the nest microcode at boot to aid the
nest out of band tools. If the ucode not paused and OS does not
have IMC driver support, then out to band tools will race with
ucode and end up getting undesirable values. Patch to check and
pause the ucode at boot.</p>
<p>OPAL provides APIs to control IMC counters. OPAL_IMC_COUNTERS_INIT
is used to initialize these counters at boot. OPAL_IMC_COUNTERS_START
and OPAL_IMC_COUNTERS_STOP API calls should be used to start and pause
these IMC engines. <cite>doc/opal-api/opal-imc-counters.rst</cite> details the
OPAL APIs and their usage.</p>
</li>
<li><p class="first">hdata/i2c: update the list of known i2c devs</p>
<p>This updates the list of known i2c devices - as of HDAT spec v10.5e - so
that they can be properly identified during the hdat parsing.</p>
</li>
<li><p class="first">hdata/i2c: log unknown i2c devices</p>
<p>An i2c device is unknown if either the i2c device list is outdated or
the device is marked as unknown (0xFF) in the hdat.</p>
</li>
</ul>
<p>Since <a class="reference internal" href="skiboot-5.8.html#skiboot-5-8"><span class="std std-ref">skiboot-5.8</span></a>:</p>
<ul>
<li><p class="first">Disable Transactional Memory on Power9 DD 2.1</p>
<p>Update pa_features_p9[] to disable TM (Transactional Memory). On DD 2.1
TM is not usable by Linux without other workarounds, so skiboot must
disable it.</p>
</li>
<li><p class="first">xscom: Do not print error message for ‘chiplet offline’ return values</p>
<p>xscom_read/write operations returns CHIPLET_OFFLINE when chiplet is offline.
Some multicast xscom_read/write requests from HBRT results in xscom operation
on offline chiplet(s) and printing below warnings in OPAL console:</p>
<div class="highlight-default notranslate"><div class="highlight"><pre><span></span><span class="p">[</span> <span class="mf">135.036327572</span><span class="p">,</span><span class="mi">3</span><span class="p">]</span> <span class="n">XSCOM</span><span class="p">:</span> <span class="n">Read</span> <span class="n">failed</span><span class="p">,</span> <span class="n">ret</span> <span class="o">=</span> <span class="o">-</span><span class="mi">14</span>
<span class="p">[</span> <span class="mf">135.092689829</span><span class="p">,</span><span class="mi">3</span><span class="p">]</span> <span class="n">XSCOM</span><span class="p">:</span> <span class="n">Read</span> <span class="n">failed</span><span class="p">,</span> <span class="n">ret</span> <span class="o">=</span> <span class="o">-</span><span class="mi">14</span>
</pre></div>
</div>
<p>Some SCOM users can deal correctly with this error code (notably opal-prd),
so the error message is (in practice) erroneous.</p>
</li>
<li><p class="first">IMC: Fix the core_imc_event_mask</p>
<p>CORE_IMC_EVENT_MASK is a scom that contains bits to control event sampling for
different machine state for core imc. The current event-mask setting sample
events only on host kernel (hypervisor) and host userspace.</p>
<p>Patch to enable the sampling of events in other machine states (like guest
kernel and guest userspace).</p>
</li>
<li><p class="first">IMC: Update the nest_pmus array with occ/gpe microcode uav updates</p>
<p>OOC/gpe nest microcode maintains the list of individual nest units
supported. Sync the recent updates to the UAV with nest_pmus array.</p>
<p>For reference occ/gpr microcode link for the UAV:
<a class="reference external" href="https://github.com/open-power/occ/blob/master/src/occ_gpe1/gpe1_24x7.h">https://github.com/open-power/occ/blob/master/src/occ_gpe1/gpe1_24x7.h</a></p>
</li>
<li><p class="first">Parse IOSLOT information from HDAT</p>
<p>Add structure definitions that describe the physical PCIe topology of
a system and parse them into the device-tree based PCIe slot
description.</p>
</li>
<li><p class="first">idle: user context state loss flags fix for stop states</p>
<p>The “lite” stop variants with PSSCR[ESL]=PSSCR[EC]=1 do not lose user
context, while the non-lite variants do (ESL: enable state loss).</p>
<p>Some of the POWER9 idle states had these wrong.</p>
</li>
</ul>
<div class="section" id="capi">
<h3>CAPI<a class="headerlink" href="#capi" title="Permalink to this headline">¶</a></h3>
<ul>
<li><p class="first">POWER9 DD2 update</p>
<p>The CAPI initialization sequence has been updated in DD2.
This patch adapts to the changes, retaining compatibility with DD1.
The patch includes some changes to DD1 fix-ups as well.</p>
</li>
<li><p class="first">Load CAPP microcode for POWER9 DD2.0 and DD2.1</p>
</li>
<li><p class="first">capi: Mask Psl Credit timeout error for POWER9</p>
<p>Mask the PSL credit timeout error in CAPP FIR Mask register
bit(46). As per the h/w team this error is now deprecated and shouldn’t
cause any fir-action for P9.</p>
</li>
</ul>
</div>
<div class="section" id="nvlink2">
<h3>NVLINK2<a class="headerlink" href="#nvlink2" title="Permalink to this headline">¶</a></h3>
<p>A notabale change is that we now generate the device tree description of
NVLINK based on the HDAT we get from hostboot. Since Hostboot will generate
HDAT based on VPD, you now <em>MUST</em> have correct VPD programmed or we will
<em>default</em> to a Sequoia layout, which will lead to random problems if you
are not booting a Sequoia Witherspoon planar. In the case of booting with
old VPD and/or Hostboot, we print a <strong>giant scary warning</strong> in order to scare you.</p>
<p>Since <a class="reference internal" href="skiboot-5.9-rc2.html#skiboot-5-9-rc2"><span class="std std-ref">skiboot-5.9-rc2</span></a>:
- Revert “npu2: Add vendor cap for IRQ testing”</p>
<blockquote>
<div>This reverts commit 9817c9e29b6fe00daa3a0e4420e69a97c90eb373 which seems to
break setting the PCI dev flag and the link number in the PCIe vendor
specific config space. This leads to the device driver attempting to
re-init the DL when it shouldn’t which can cause HMI’s.</div></blockquote>
<p>Since <a class="reference internal" href="skiboot-5.8.html#skiboot-5-8"><span class="std std-ref">skiboot-5.8</span></a>:</p>
<ul>
<li><p class="first">npu2: Read slot label from the HDAT link node</p>
<p>Binding GPU to emulated NPU PCI devices is done using the slot labels
since the NPU devices do not have a patching slot node we need to
copy the label in here.</p>
</li>
<li><p class="first">npu2: Copy link speed from the npu HDAT node</p>
<p>This needs to be in the PCI device node so the speed of the NVLink
can be passed to the GPU driver.</p>
</li>
<li><p class="first">npu2: hw-procedures: Add settings to PHY_RESET</p>
<p>Set a few new values in the PHY_RESET procedure, as specified by our
updated programming guide documentation.</p>
</li>
<li><p class="first">Parse NVLink information from HDAT</p>
<p>Add the per-chip structures that descibe how the A-Bus/NVLink/OpenCAPI
phy is configured. This generates the <a class="reference external" href="mailto:npu%40xyz">npu<span>@</span>xyz</a> nodes for each chip on
systems that support it.</p>
</li>
<li><p class="first">npu2: Add vendor cap for IRQ testing</p>
<p>Provide a way to test recoverable data link interrupts via a new
vendor capability byte.</p>
</li>
<li><p class="first">npu2: Enable recoverable data link (no-stall) interrupts</p>
<p>Allow the NPU2 to trigger “recoverable data link” interrupts.</p>
</li>
<li><p class="first">npu2: Implement basic FLR (Function Level Reset)</p>
</li>
<li><p class="first">npu2: hw-procedures: Update PHY DC calibration procedure</p>
</li>
<li><p class="first">npu2: hw-procedures: Change rx_pr_phase_step value</p>
</li>
</ul>
</div>
<div class="section" id="xive">
<h3>XIVE<a class="headerlink" href="#xive" title="Permalink to this headline">¶</a></h3>
<ul>
<li><p class="first">xive: Fix opal_xive_dump_tm() to access W2 properly.
The HW only supported limited access sizes.</p>
</li>
<li><p class="first">xive: Make opal_xive_allocate_irq() properly try all chips</p>
<p>When requested via OPAL_XIVE_ANY_CHIP, we need to try all
chips. We first try the current one (on which the caller
sits) and if that fails, we iterate all chips until the
allocation succeeds.</p>
</li>
<li><p class="first">xive: Fix initialization & cleanup of HW thread contexts</p>
<p>Instead of trying to “pull” everything and clear VT (which didn’t
work and caused some FIRs to be set), instead just clear and then
set the PTER thread enable bit. This has the side effect of
completely resetting the corresponding thread context.</p>
<p>This fixes the spurrious XIVE FIRs reported by PRD and fircheck</p>
</li>
<li><p class="first">xive: Add debug option for detecting misrouted IPI in emulation</p>
<p>This is high overhead so we don’t enable it by default even
in debug builds, it’s also a bit messy, but it allowed me to
detect and debug a locking issue earlier so it can be useful.</p>
</li>
<li><p class="first">xive: Increase the interrupt “gap” on debug builds</p>
<p>We normally allocate IPIs from 0x10. Make that 0x1000 on debug
builds to limit the chances of overlapping with Linux interrupt
numbers which makes debugging code that confuses them easier.</p>
<p>Also add a warning in emulation if we get an interrupt in the
queue whose number is below the gap.</p>
</li>
<li><p class="first">xive: Fix locking around cache scrub & watch</p>
<p>Thankfully the missing locking only affects debug code and
init code that doesn’t run concurrently. Also adds a DEBUG
option that checks the lock is properly held.</p>
</li>
<li><p class="first">xive: Workaround HW issue with scrub facility</p>
<p>Without this, we sometimes don’t observe from a CPU the
values written to the ENDs or NVTs via the cache watch.</p>
</li>
<li><p class="first">xive: Add exerciser for cache watch/scrub facility in DEBUG builds</p>
</li>
<li><p class="first">xive: Make assertion in xive_eq_for_target() more informative</p>
</li>
<li><p class="first">xive: Add debug code to check initial cache updates</p>
</li>
<li><p class="first">xive: Ensure pressure relief interrupts are disabled</p>
<p>We don’t use them and we hijack the VP field with their
configuration to store the EQ reference, so make sure the
kernel or guest can’t turn them back on by doing MMIO
writes to ACK#</p>
</li>
<li><p class="first">xive: Don’t try setting the reserved ACK# field in VPs</p>
<p>That doesn’t work, the HW doesn’t implement it in the cache
watch facility anyway.</p>
</li>
<li><p class="first">xive: Remove useless memory barriers in VP/EQ inits</p>
<p>We no longer update “live” memory structures, we use a temporary
copy on the stack and update the actual memory structure using
the cache watch, so those barriers are pointless.</p>
</li>
</ul>
</div>
<div class="section" id="phb4">
<h3>PHB4<a class="headerlink" href="#phb4" title="Permalink to this headline">¶</a></h3>
<p>Since <a class="reference internal" href="skiboot-5.9-rc4.html#skiboot-5-9-rc4"><span class="std std-ref">skiboot-5.9-rc4</span></a>:</p>
<ul>
<li><p class="first">phb4: Escalate freeze to fence to avoid checkstop</p>
<p>Freeze events such as MMIO loads can cause the PHB to lose it’s
limited powerbus credits. If all credits are used and a further MMIO
will cause a checkstop.</p>
<p>To work around this, we escalate the troublesome freeze events to a
fence. The fence will cause a full PHB reset which resets the powerbus
credits and avoids the checkstop.</p>
</li>
<li><p class="first">phb4: Update some init registers</p>
<p>New inits based on next PHB4 workbook. Increases some timeouts to
avoid some spurious error conditions.</p>
</li>
<li><p class="first">phb4: Enable PHB MMIO in phb4_root_port_init()</p>
<p>Linux EEH flow is somewhat broken. It saves the PCIe config space of
the PHB on boot, which it then uses to restore on EEH recovery. It
does this to restore MMIO bars and some other pieces.</p>
<p>Unfortunately this save is done before any drivers are bound to
devices under the PHB. A number of other things are configured in the
PHB after drivers start, hence some configuration space settings
aren’t saved correctly. These include bus master and MMIO bits in the
command register.</p>
<p>Linux tried to hack around this in this linux commit
<code class="docutils literal notranslate"><span class="pre">bf898ec5cb</span></code> powerpc/eeh: Enable PCI_COMMAND_MASTER for PCI bridges
This sets the bus master bit but ignores the MMIO bit.</p>
<p>Hence we lose MMIO after a full PHB reset. This causes the next MMIO
access to the device to fail and for us to perform a PE freeze
recovery, which still doesn’t set the MMIO bit and hence we still
fail.</p>
<p>This works around this by forcing MMIO on during
phb4_root_port_init().</p>
<p>With this we can recovery from a PHB fence event on POWER9.</p>
</li>
<li><p class="first">phb4: Reduce link degraded message log level to debug</p>
<p>If we hit this message we’ll retry and fix the problem. If we run out
of retries and can’t fix the problem, we’ll still print a log message
at error level indicating a problem.</p>
</li>
<li><p class="first">phb4: Fix GEN3 for DD2.00</p>
<p>In this fix: <code class="docutils literal notranslate"><span class="pre">62ac7631ae</span> <span class="pre">phb4:</span> <span class="pre">Fix</span> <span class="pre">PCIe</span> <span class="pre">GEN4</span> <span class="pre">on</span> <span class="pre">DD2.1</span> <span class="pre">and</span> <span class="pre">above</span></code>
We fixed DD2.1 GEN4 but broke DD2.00 as GEN3.</p>
<p>This fixes DD2.00 back to GEN3. This time for sure!</p>
</li>
</ul>
<p>Since <a class="reference internal" href="skiboot-5.9-rc3.html#skiboot-5-9-rc3"><span class="std std-ref">skiboot-5.9-rc3</span></a>:
- phb4: Fix PCIe GEN4 on DD2.1 and above</p>
<blockquote>
<div><dl class="docutils">
<dt>In this change:</dt>
<dd>eef0e197ab PHB4: Default to PCIe GEN3 on POWER9 DD2.00</dd>
</dl>
<p>We clamped DD2.00 parts to GEN3 but unfortunately this change also
applies to DD2.1 and above.</p>
<p>This fixes this to only apply to DD2.00.</p>
</div></blockquote>
<p>Since <a class="reference internal" href="skiboot-5.8.html#skiboot-5-8"><span class="std std-ref">skiboot-5.8</span></a>:</p>
<ul>
<li><p class="first">phb4: Mask RXE_ARB: DEC Stage Valid Error</p>
<p>Change the inits to mask out the RXE ARB: DEC Stage Valid Error (bit
370. This has been a fatal error but should be informational only.</p>
<p>This update will be in the next version of the phb4 workbook.</p>
</li>
<li><p class="first">phb4: Add additional adapter to retrain whitelist</p>
<p>The single port version of the ConnectX-5 has a different device ID 0x1017.
Updated descriptions to match pciutils database.</p>
</li>
<li><p class="first">PHB4: Default to PCIe GEN3 on POWER9 DD2.00</p>
<p>You can use the NVRAM override for DD2.00 screened parts.</p>
</li>
<li><p class="first">phb4: Retrain link if degraded</p>
<p>On P9 Scale Out (Nimbus) DD2.0 and Scale in (Cumulus) DD1.0 (and
below) the PCIe PHY can lockup causing training issues. This can cause
a degradation in speed or width in ~5% of training cases (depending on
the card). This is fixed in later chip revisions. This issue can also
cause PCIe links to not train at all, but this case is already
handled.</p>
<p>This patch checks if the PCIe link has trained optimally and if not,
does a full PHB reset (to fix the PHY lockup) and retrain.</p>
<p>One complication is some devices are known to train degraded unless
device specific configuration is performed. Because of this, we only
retrain when the device is in a whitelist. All devices in the current
whitelist have been testing on a P9DSU/Boston, ZZ and Witherspoon.</p>
<p>We always gather information on the link and print it in the logs even
if the card is not in the whitelist.</p>
<p>For testing purposes, there’s an nvram to retry all PCIe cards and all
P9 chips when a degraded link is detected. The new option is
‘pci-retry-all=true’ which can be set using:
<cite>nvram -p ibm,skiboot –update-config pci-retry-all=true</cite>.
This option may increase the boot time if used on a badly behaving
card.</p>
</li>
</ul>
</div>
</div>
<div class="section" id="ibm-fsp-platforms">
<h2>IBM FSP platforms<a class="headerlink" href="#ibm-fsp-platforms" title="Permalink to this headline">¶</a></h2>
<p>Since <a class="reference internal" href="skiboot-5.9-rc5.html#skiboot-5-9-rc5"><span class="std std-ref">skiboot-5.9-rc5</span></a>:
- FSP/CONSOLE: Disable notification on unresponsive consoles</p>
<blockquote>
<div><p>Commit fd6b71fc fixed the situation where ipmi console was open (hvc0) but got
data on different console (hvc1).</p>
<p>During FSP Reset/Reload OPAL closes all consoles. After Reset/Reload
complete FSP requests to open hvc1 and sends data on this. If hvc1 registration failed or not opened in host kernel then it will not read data and results in RCU stalls.</p>
<p>Note that this is workaround for older kernel where we don’t have separate irq
for each console. Latest kernel works fine without this patch.</p>
</div></blockquote>
<p>Since <a class="reference internal" href="skiboot-5.9-rc1.html#skiboot-5-9-rc1"><span class="std std-ref">skiboot-5.9-rc1</span></a>:</p>
<ul>
<li><p class="first">FSP/CONSOLE: Limit number of error logging</p>
<p>Commit c8a7535f (FSP/CONSOLE: Workaround for unresponsive ipmi daemon) added
error logging when buffer is full. In some corner cases kernel may call this
function multiple time and we may endup logging error again and again.</p>
<p>This patch fixes it by generating error log only once.</p>
</li>
<li><p class="first">FSP/CONSOLE: Fix fsp_console_write_buffer_space() call</p>
<p>Kernel calls fsp_console_write_buffer_space() to check console buffer space
availability. If there is enough buffer space to write data, then kernel will
call fsp_console_write() to write actual data.</p>
<p>In some extreme corner cases (like one explained in commit c8a7535f)
console becomes full and this function returns 0 to kernel (or space available
in console buffer < next incoming data size). Kernel will continue retrying
until it gets enough space. So we will start seeing RCU stalls.</p>
<p>This patch keeps track of previous available space. If previous space is same
as current means not enough space in console buffer to write incoming data.
It may be due to very high console write operation and slow response from FSP
-OR- FSP has stopped processing data (ex: because of ipmi daemon died). At this
point we will start timer with timeout of SER_BUFFER_OUT_TIMEOUT (10 secs).
If situation is not improved within 10 seconds means something went bad. Lets
return OPAL_RESOURCE so that kernel can drop console write and continue.</p>
</li>
<li><p class="first">FSP/CONSOLE: Close SOL session during R/R</p>
<p>Presently we are not closing SOL and FW console sessions during R/R. Host will
continue to write to SOL buffer during FSP R/R. If there is heavy console write
operation happening during FSP R/R (like running <cite>top</cite> command inside console),
then at some point console buffer becomes full. fsp_console_write_buffer_space()
returns 0 (or less than required space to write data) to host. While one thread
is busy writing to console, if some other threads tries to write data to console
we may see RCU stalls (like below) in kernel.</p>
<div class="highlight-default notranslate"><div class="highlight"><pre><span></span><span class="p">[</span> <span class="mf">2082.828363</span><span class="p">]</span> <span class="n">INFO</span><span class="p">:</span> <span class="n">rcu_sched</span> <span class="n">detected</span> <span class="n">stalls</span> <span class="n">on</span> <span class="n">CPUs</span><span class="o">/</span><span class="n">tasks</span><span class="p">:</span> <span class="p">{</span> <span class="mi">32</span><span class="p">}</span> <span class="p">(</span><span class="n">detected</span> <span class="n">by</span> <span class="mi">16</span><span class="p">,</span> <span class="n">t</span><span class="o">=</span><span class="mi">6002</span> <span class="n">jiffies</span><span class="p">,</span> <span class="n">g</span><span class="o">=</span><span class="mi">23154</span><span class="p">,</span> <span class="n">c</span><span class="o">=</span><span class="mi">23153</span><span class="p">,</span> <span class="n">q</span><span class="o">=</span><span class="mi">254769</span><span class="p">)</span>
<span class="p">[</span> <span class="mf">2082.828365</span><span class="p">]</span> <span class="n">Task</span> <span class="n">dump</span> <span class="k">for</span> <span class="n">CPU</span> <span class="mi">32</span><span class="p">:</span>
<span class="p">[</span> <span class="mf">2082.828368</span><span class="p">]</span> <span class="n">kworker</span><span class="o">/</span><span class="mi">32</span><span class="p">:</span><span class="mi">3</span> <span class="n">R</span> <span class="n">running</span> <span class="n">task</span> <span class="mi">0</span> <span class="mi">4637</span> <span class="mi">2</span> <span class="mh">0x00000884</span>
<span class="p">[</span> <span class="mf">2082.828375</span><span class="p">]</span> <span class="n">Workqueue</span><span class="p">:</span> <span class="n">events</span> <span class="n">dump_work_fn</span>
<span class="p">[</span> <span class="mf">2082.828376</span><span class="p">]</span> <span class="n">Call</span> <span class="n">Trace</span><span class="p">:</span>
<span class="p">[</span> <span class="mf">2082.828382</span><span class="p">]</span> <span class="p">[</span><span class="n">c000000f1633fa00</span><span class="p">]</span> <span class="p">[</span><span class="n">c00000000013b6b0</span><span class="p">]</span> <span class="n">console_unlock</span><span class="o">+</span><span class="mh">0x570</span><span class="o">/</span><span class="mh">0x600</span> <span class="p">(</span><span class="n">unreliable</span><span class="p">)</span>
<span class="p">[</span> <span class="mf">2082.828384</span><span class="p">]</span> <span class="p">[</span><span class="n">c000000f1633fae0</span><span class="p">]</span> <span class="p">[</span><span class="n">c00000000013ba34</span><span class="p">]</span> <span class="n">vprintk_emit</span><span class="o">+</span><span class="mh">0x2f4</span><span class="o">/</span><span class="mh">0x5c0</span>
<span class="p">[</span> <span class="mf">2082.828389</span><span class="p">]</span> <span class="p">[</span><span class="n">c000000f1633fb60</span><span class="p">]</span> <span class="p">[</span><span class="n">c00000000099e644</span><span class="p">]</span> <span class="n">printk</span><span class="o">+</span><span class="mh">0x84</span><span class="o">/</span><span class="mh">0x98</span>
<span class="p">[</span> <span class="mf">2082.828391</span><span class="p">]</span> <span class="p">[</span><span class="n">c000000f1633fb90</span><span class="p">]</span> <span class="p">[</span><span class="n">c0000000000851a8</span><span class="p">]</span> <span class="n">dump_work_fn</span><span class="o">+</span><span class="mh">0x238</span><span class="o">/</span><span class="mh">0x250</span>
<span class="p">[</span> <span class="mf">2082.828394</span><span class="p">]</span> <span class="p">[</span><span class="n">c000000f1633fc60</span><span class="p">]</span> <span class="p">[</span><span class="n">c0000000000ecb98</span><span class="p">]</span> <span class="n">process_one_work</span><span class="o">+</span><span class="mh">0x198</span><span class="o">/</span><span class="mh">0x4b0</span>
<span class="p">[</span> <span class="mf">2082.828396</span><span class="p">]</span> <span class="p">[</span><span class="n">c000000f1633fcf0</span><span class="p">]</span> <span class="p">[</span><span class="n">c0000000000ed3dc</span><span class="p">]</span> <span class="n">worker_thread</span><span class="o">+</span><span class="mh">0x18c</span><span class="o">/</span><span class="mh">0x5a0</span>
<span class="p">[</span> <span class="mf">2082.828399</span><span class="p">]</span> <span class="p">[</span><span class="n">c000000f1633fd80</span><span class="p">]</span> <span class="p">[</span><span class="n">c0000000000f4650</span><span class="p">]</span> <span class="n">kthread</span><span class="o">+</span><span class="mh">0x110</span><span class="o">/</span><span class="mh">0x130</span>
<span class="p">[</span> <span class="mf">2082.828403</span><span class="p">]</span> <span class="p">[</span><span class="n">c000000f1633fe30</span><span class="p">]</span> <span class="p">[</span><span class="n">c000000000009674</span><span class="p">]</span> <span class="n">ret_from_kernel_thread</span><span class="o">+</span><span class="mh">0x5c</span><span class="o">/</span><span class="mh">0x68</span>
</pre></div>
</div>
<p>Hence lets close SOL (and FW console) during FSP R/R.</p>
</li>
<li><p class="first">FSP/CONSOLE: Do not associate unavailable console</p>
<p>Presently OPAL sends associate/unassociate MBOX command for all
FSP serial console (like below OPAL message). We have to check
console is available or not before sending this message.</p>
<div class="highlight-default notranslate"><div class="highlight"><pre><span></span><span class="p">[</span> <span class="mf">5013.227994012</span><span class="p">,</span><span class="mi">7</span><span class="p">]</span> <span class="n">FSP</span><span class="p">:</span> <span class="n">Reassociating</span> <span class="n">HVSI</span> <span class="n">console</span> <span class="mi">1</span>
<span class="p">[</span> <span class="mf">5013.227997540</span><span class="p">,</span><span class="mi">7</span><span class="p">]</span> <span class="n">FSP</span><span class="p">:</span> <span class="n">Reassociating</span> <span class="n">HVSI</span> <span class="n">console</span> <span class="mi">2</span>
</pre></div>
</div>
</li>
<li><p class="first">FSP: Disable PSI link whenever FSP tells OPAL about impending R/R</p>
<p>Commit 42d5d047 fixed scenario where DPO has been initiated, but FSP went
into reset before the CEC power down came in. But this is generic issue
that can happen in normal shutdown path as well.</p>
<p>Hence disable PSI link as soon as we detect FSP impending R/R.</p>
</li>
<li><p class="first">fsp: return OPAL_BUSY_EVENT on failure sending FSP_CMD_POWERDOWN_NORM
Also, return OPAL_BUSY_EVENT on failure sending FSP_CMD_REBOOT / DEEP_REBOOT.</p>
<p>We had a race condition between FSP Reset/Reload and powering down
the system from the host:</p>
<p>Roughly:</p>
<table border="1" class="docutils">
<colgroup>
<col width="2%" />
<col width="29%" />
<col width="69%" />
</colgroup>
<thead valign="bottom">
<tr class="row-odd"><th class="head">#</th>
<th class="head">FSP</th>
<th class="head">Host</th>
</tr>
</thead>
<tbody valign="top">
<tr class="row-even"><td>1</td>
<td>Power on</td>
<td> </td>
</tr>
<tr class="row-odd"><td>2</td>
<td> </td>
<td>Power on</td>
</tr>
<tr class="row-even"><td>3</td>
<td>(inject EPOW)</td>
<td> </td>
</tr>
<tr class="row-odd"><td>4</td>
<td>(trigger FSP R/R)</td>
<td> </td>
</tr>
<tr class="row-even"><td>5</td>
<td> </td>
<td>Processes EPOW event, starts shutting down</td>
</tr>
<tr class="row-odd"><td>6</td>
<td> </td>
<td>calls OPAL_CEC_POWER_DOWN</td>
</tr>
<tr class="row-even"><td>7</td>
<td>(is still in R/R)</td>
<td> </td>
</tr>
<tr class="row-odd"><td>8</td>
<td> </td>
<td>gets OPAL_INTERNAL_ERROR, spins in opal_poll_events</td>
</tr>
<tr class="row-even"><td>9</td>
<td>(FSP comes back)</td>
<td> </td>
</tr>
<tr class="row-odd"><td>10</td>
<td> </td>
<td>spinning in opal_poll_events</td>
</tr>
<tr class="row-even"><td>11</td>
<td>(thinks host is running)</td>
<td> </td>
</tr>
</tbody>
</table>
<p>The call to OPAL_CEC_POWER_DOWN is only made once as the reset/reload
error path for fsp_sync_msg() is to return -1, which means we give
the OS OPAL_INTERNAL_ERROR, which is fine, except that our own API
docs give us the opportunity to return OPAL_BUSY when trying again
later may be successful, and we’re ambiguous as to if you should retry
on OPAL_INTERNAL_ERROR.</p>
<p>For reference, the linux code looks like this:</p>
<div class="highlight-default notranslate"><div class="highlight"><pre><span></span><span class="n">static</span> <span class="n">void</span> <span class="n">__noreturn</span> <span class="n">pnv_power_off</span><span class="p">(</span><span class="n">void</span><span class="p">)</span>
<span class="p">{</span>
<span class="n">long</span> <span class="n">rc</span> <span class="o">=</span> <span class="n">OPAL_BUSY</span><span class="p">;</span>
<span class="n">pnv_prepare_going_down</span><span class="p">();</span>
<span class="k">while</span> <span class="p">(</span><span class="n">rc</span> <span class="o">==</span> <span class="n">OPAL_BUSY</span> <span class="o">||</span> <span class="n">rc</span> <span class="o">==</span> <span class="n">OPAL_BUSY_EVENT</span><span class="p">)</span> <span class="p">{</span>
<span class="n">rc</span> <span class="o">=</span> <span class="n">opal_cec_power_down</span><span class="p">(</span><span class="mi">0</span><span class="p">);</span>
<span class="k">if</span> <span class="p">(</span><span class="n">rc</span> <span class="o">==</span> <span class="n">OPAL_BUSY_EVENT</span><span class="p">)</span>
<span class="n">opal_poll_events</span><span class="p">(</span><span class="n">NULL</span><span class="p">);</span>
<span class="k">else</span>
<span class="n">mdelay</span><span class="p">(</span><span class="mi">10</span><span class="p">);</span>
<span class="p">}</span>
<span class="k">for</span> <span class="p">(;;)</span>
<span class="n">opal_poll_events</span><span class="p">(</span><span class="n">NULL</span><span class="p">);</span>
<span class="p">}</span>
</pre></div>
</div>
<p>Which means that <em>practically</em> our only option is to return OPAL_BUSY
or OPAL_BUSY_EVENT.</p>
<p>We choose OPAL_BUSY_EVENT for FSP systems as we do want to ensure we’re
running pollers to communicate with the FSP and do the final bits of
Reset/Reload handling before we power off the system.</p>
</li>
</ul>
<p>Since <a class="reference internal" href="skiboot-5.8.html#skiboot-5-8"><span class="std std-ref">skiboot-5.8</span></a>:</p>
<ul>
<li><p class="first">FSP/NVRAM: Handle “get vNVRAM statistics” command</p>
<p>FSP sends MBOX command (cmd : 0xEB, subcmd : 0x05, mod : 0x00) to get vNVRAM
statistics. OPAL doesn’t maintain any such statistics. Hence return
FSP_STATUS_INVALID_SUBCMD.</p>
<p>Fixes these messages appearing in the OPAL log:</p>
<div class="highlight-default notranslate"><div class="highlight"><pre><span></span><span class="p">[</span><span class="mf">16944.384670488</span><span class="p">,</span><span class="mi">3</span><span class="p">]</span> <span class="n">FSP</span><span class="p">:</span> <span class="n">Unhandled</span> <span class="n">message</span> <span class="n">eb0500</span>
<span class="p">[</span><span class="mf">16944.474110465</span><span class="p">,</span><span class="mi">3</span><span class="p">]</span> <span class="n">FSP</span><span class="p">:</span> <span class="n">Unhandled</span> <span class="n">message</span> <span class="n">eb0500</span>
<span class="p">[</span><span class="mf">16945.111280784</span><span class="p">,</span><span class="mi">3</span><span class="p">]</span> <span class="n">FSP</span><span class="p">:</span> <span class="n">Unhandled</span> <span class="n">message</span> <span class="n">eb0500</span>
<span class="p">[</span><span class="mf">16945.293393485</span><span class="p">,</span><span class="mi">3</span><span class="p">]</span> <span class="n">FSP</span><span class="p">:</span> <span class="n">Unhandled</span> <span class="n">message</span> <span class="n">eb0500</span>
</pre></div>
</div>
</li>
<li><p class="first">fsp: Move common prints to trace</p>
<p>These two prints just end up filling the skiboot logs on any machine
that’s been booted for more than a few hours.</p>
<dl class="docutils">
<dt>They have never been useful, so make them trace level. They were: ::</dt>
<dd><p class="first last">SURV: Received heartbeat acknowledge from FSP
SURV: Sending the heartbeat command to FSP</p>
</dd>
</dl>
</li>
</ul>
</div>
<div class="section" id="bmc-based-systems">
<h2>BMC based systems<a class="headerlink" href="#bmc-based-systems" title="Permalink to this headline">¶</a></h2>
<ul>
<li><p class="first">hw/lpc-uart: read from RBR to clear character timeout interrupts</p>
<p>When using the aspeed SUART, we see a condition where the UART sends
continuous character timeout interrupts. This change adds a (heavily
commented) dummy read from the RBR to clear the interrupt condition on
init.</p>
<p>This was observed on p9dsu systems, but likely applies to other systems
using the SUART.</p>
</li>
<li><p class="first">astbmc: Add methods for handing Device Tree based slots
e.g. ones from HDAT on POWER9.</p>
</li>
</ul>
</div>
<div class="section" id="general">
<h2>General<a class="headerlink" href="#general" title="Permalink to this headline">¶</a></h2>
<p>Since <a class="reference internal" href="skiboot-5.9-rc5.html#skiboot-5-9-rc5"><span class="std std-ref">skiboot-5.9-rc5</span></a>:</p>
<ul>
<li><p class="first">p8-i2c: Further timeout reworks</p>
<p>This patch reworks the way timeouts are set so that rather than imposing
a hard deadline based on the transaction length it uses a
kick-the-can-down-the-road approach where the timeout will be reset each
time data is written to or received from the master. This fits better
with the actual failure modes that timeouts are designed to handle, such
as unusually slow or broken devices.</p>
<p>Additionally this patch moves all the special case detection out of the
timeout handler. This is help to improve the robustness of the driver and
prepare for a more substantial rework of the driver as a whole later on.</p>
</li>
<li><p class="first">npu: Fix broken fast reset</p>
<p>0679f61244b “fast-reset: by default (if possible)” broke NPU - now
the NV links does not get enabled after reboot.</p>
<p>This disables fast reboot for NPU machines till a better solution is found.</p>
</li>
</ul>
<p>Since <a class="reference internal" href="skiboot-5.9-rc2.html#skiboot-5-9-rc2"><span class="std std-ref">skiboot-5.9-rc2</span></a>:</p>
<ul>
<li><p class="first">Improvements to vpd device tree entries</p>
<p>Previously we would miss some properties</p>
</li>
</ul>
<p>Since <a class="reference internal" href="skiboot-5.9-rc1.html#skiboot-5-9-rc1"><span class="std std-ref">skiboot-5.9-rc1</span></a>:</p>
<ul>
<li><p class="first">hw/p8-i2c: Fix deadlock in p9_i2c_bus_owner_change</p>
<p>When debugging a system where Linux was taking soft lockup errors with
two CPUs stuck in OPAL:</p>
<table border="1" class="docutils">
<colgroup>
<col width="50%" />
<col width="50%" />
</colgroup>
<thead valign="bottom">
<tr class="row-odd"><th class="head">CPU0</th>
<th class="head">CPU1</th>
</tr>
</thead>
<tbody valign="top">
<tr class="row-even"><td>lock</td>
<td> </td>
</tr>
<tr class="row-odd"><td>p8_i2c_recover</td>
<td> </td>
</tr>
<tr class="row-even"><td>opal_handle_interrupt</td>
<td>sync_timer
cancel_timer
p9_i2c_bus_owner_change
occ_p9_interrupt
xive_source_interrupt
opal_handle_interrupt</td>
</tr>
</tbody>
</table>
<p>p8_i2c_recover() is a timer, and is stuck trying to take master->lock.
p9_i2c_bus_owner_change() has taken master->lock, but then is stuck waiting
for all timers to complete. We deadlock.</p>
<p>Fix this by using cancel_timer_async().</p>
</li>
<li><p class="first">opal/cpu: Mark the core as bad while disabling threads of the core.</p>
<p>If any of the core fails to sync its TB during chipTOD initialization,
all the threads of that core are disabled. But this does not make
linux kernel to ignore the core/cpus. It crashes while bringing them up
with below backtrace:</p>
<div class="highlight-default notranslate"><div class="highlight"><pre><span></span>[ 38.883898] kexec_core: Starting new kernel
cpu 0x0: Vector: 300 (Data Access) at [c0000003f277b730]
pc: c0000000001b9890: internal_create_group+0x30/0x304
lr: c0000000001b9880: internal_create_group+0x20/0x304
sp: c0000003f277b9b0
msr: 900000000280b033
dar: 40
dsisr: 40000000
current = 0xc0000003f9f41000
paca = 0xc00000000fe00000 softe: 0 irq_happened: 0x01
pid = 2572, comm = kexec
Linux version 4.13.2-openpower1 (jenkins@p89) (gcc version 6.4.0 (Buildroot 2017.08-00006-g319c6e1)) #1 SMP Wed Sep 20 05:42:11 UTC 2017
enter ? for help
[c0000003f277b9b0] c0000000008a8780 (unreliable)
[c0000003f277ba50] c00000000041c3ac topology_add_dev+0x2c/0x40
[c0000003f277ba70] c00000000006b078 cpuhp_invoke_callback+0x88/0x170
[c0000003f277bac0] c00000000006b22c cpuhp_up_callbacks+0x54/0xb8
[c0000003f277bb10] c00000000006bc68 cpu_up+0x11c/0x168
[c0000003f277bbc0] c00000000002f0e0 default_machine_kexec+0x1fc/0x274
[c0000003f277bc50] c00000000002e2d8 machine_kexec+0x50/0x58
[c0000003f277bc70] c0000000000de4e8 kernel_kexec+0x98/0xb4
[c0000003f277bce0] c00000000008b0f0 SyS_reboot+0x1c8/0x1f4
[c0000003f277be30] c00000000000b118 system_call+0x58/0x6c
</pre></div>
</div>
</li>
</ul>
<p>Since <a class="reference internal" href="skiboot-5.8.html#skiboot-5-8"><span class="std std-ref">skiboot-5.8</span></a>:</p>
<ul>
<li><p class="first">ipmi: Convert common debug prints to trace</p>
<p>OPAL logs messages for every IPMI request from host. Sometime OPAL console
is filled with only these messages. This path is pretty stable now and
we have enough logs to cover bad path. Hence lets convert these debug
message to trace/info message. Examples are:</p>
<div class="highlight-default notranslate"><div class="highlight"><pre><span></span><span class="p">[</span> <span class="mf">1356.423958816</span><span class="p">,</span><span class="mi">7</span><span class="p">]</span> <span class="n">opal_ipmi_recv</span><span class="p">(</span><span class="n">cmd</span><span class="p">:</span> <span class="mh">0xf0</span> <span class="n">netfn</span><span class="p">:</span> <span class="mh">0x3b</span> <span class="n">resp_size</span><span class="p">:</span> <span class="mh">0x02</span><span class="p">)</span>
<span class="p">[</span> <span class="mf">1356.430774496</span><span class="p">,</span><span class="mi">7</span><span class="p">]</span> <span class="n">opal_ipmi_send</span><span class="p">(</span><span class="n">cmd</span><span class="p">:</span> <span class="mh">0xf0</span> <span class="n">netfn</span><span class="p">:</span> <span class="mh">0x3a</span> <span class="nb">len</span><span class="p">:</span> <span class="mh">0x3b</span><span class="p">)</span>
<span class="p">[</span> <span class="mf">1356.430797392</span><span class="p">,</span><span class="mi">7</span><span class="p">]</span> <span class="n">BT</span><span class="p">:</span> <span class="n">seq</span> <span class="mh">0x20</span> <span class="n">netfn</span> <span class="mh">0x3a</span> <span class="n">cmd</span> <span class="mh">0xf0</span><span class="p">:</span> <span class="n">Message</span> <span class="n">sent</span> <span class="n">to</span> <span class="n">host</span>
<span class="p">[</span> <span class="mf">1356.431668496</span><span class="p">,</span><span class="mi">7</span><span class="p">]</span> <span class="n">BT</span><span class="p">:</span> <span class="n">seq</span> <span class="mh">0x20</span> <span class="n">netfn</span> <span class="mh">0x3a</span> <span class="n">cmd</span> <span class="mh">0xf0</span><span class="p">:</span> <span class="n">IPMI</span> <span class="n">MSG</span> <span class="n">done</span>
</pre></div>
</div>
</li>
<li><p class="first">libflash/file: Handle short read()s and write()s correctly</p>
<p>Currently we don’t move the buffer along for a short read() or write()
and nor do we request only the remaining amount.</p>
</li>
<li><p class="first">hw/p8-i2c: Rework timeout handling</p>
<p>Currently we treat a timeout as a hard failure and will automatically
fail any transations that hit their timeout. This results in
unnecessarily failing I2C requests if interrupts are dropped, etc.
Although these are bad things that we should log we can handle them
better by checking the actual hardware status and completing the
transation if there are no real errors. This patch reworks the timeout
handling to check the status and continue the transaction if it can.
if it can while logging an error if it detects a timeout due to a
dropped interrupt.</p>
</li>
<li><p class="first">core/flash: Only expect ELF header for BOOTKERNEL partition flash resource</p>
<p>When loading a flash resource which isn’t signed (secure and trusted
boot) and which doesn’t have a subpartition, we assume it’s the
BOOTKERNEL since previously this was the only such resource. Thus we
also assumed it had an ELF header which we parsed to get the size of the
partition rather than trusting the actual_size field in the FFS header.
A previous commit (9727fe3 DT: Add ibm,firmware-versions node) added the
version resource which isn’t signed and also doesn’t have a subpartition,
thus we expect it to have an ELF header. It doesn’t so we print the
error message “FLASH: Invalid ELF header part VERSION”.</p>
<p>It is a fluke that this works currently since we load the secure boot
header unconditionally and this happen to be the same size as the
version partition. We also don’t update the return code on error so
happen to return OPAL_SUCCESS.</p>
<p>To make this explicitly correct; only check for an ELF header if we are
loading the BOOTKERNEL resource, otherwise use the partition size from
the FFS header. Also set the return code on error so we don’t
erroneously return OPAL_SUCCESS. Add a check that the resource will fit
in the supplied buffer to prevent buffer overrun.</p>
</li>
<li><p class="first">flash: Support adding the no-erase property to flash</p>
<p>The mbox protocol explicitly states that an erase is not required
before a write. This means that issuing an erase from userspace,
through the mtd device, and back returns a successful operation
that does nothing. Unfortunately, this makes userspace tools unhappy.
Linux MTD devices support the MTD_NO_ERASE flag which conveys that
writes do not require erases on the underlying flash devices. We
should set this property on all of our
devices which do not require erases to be performed.</p>
<p>NOTE: This still requires a linux kernel component to set the
MTD_NO_ERASE flag from the device tree property.</p>
</li>
</ul>
</div>
<div class="section" id="utilities">
<h2>Utilities<a class="headerlink" href="#utilities" title="Permalink to this headline">¶</a></h2>
<p>Since <a class="reference internal" href="skiboot-5.9-rc1.html#skiboot-5-9-rc1"><span class="std std-ref">skiboot-5.9-rc1</span></a>:
- opal-prd: Fix memory leak</p>
<p>Since <a class="reference internal" href="skiboot-5.8.html#skiboot-5-8"><span class="std std-ref">skiboot-5.8</span></a>:</p>
<ul>
<li><p class="first">external/gard: Clear entire guard partition instead of entry by entry</p>
<p>When using the current implementation of the gard tool to ecc clear the
entire GUARD partition it is done one gard record at a time. While this
may be ok when accessing the actual flash this is very slow when done
from the host over the mbox protocol (on the order of 4 minutes) because
the bmc side is required to do many read, erase, writes under the hood.</p>
<p>Fix this by rewriting the gard tool reset_partition() function. Now we
allocate all the erased guard entries and (if required) apply ecc to the
entire buffer. Then we can do one big erase and write of the entire
partition. This reduces the time to clear the guard partition to on the
order of 4 seconds.</p>
</li>
<li><p class="first">opal-prd: Fix opal-prd command line options</p>
<p>HBRT OCC reset interface depends on service processor type.</p>
<ul class="simple">
<li>FSP: reset_pm_complex()</li>
<li>BMC: process_occ_reset()</li>
</ul>
<p>We have both <cite>occ</cite> and <cite>pm-complex</cite> command line interfaces.
This patch adds support to dispaly appropriate message depending
on system type.</p>
<table border="1" class="docutils">
<colgroup>
<col width="6%" />
<col width="39%" />
<col width="55%" />
</colgroup>
<thead valign="bottom">
<tr class="row-odd"><th class="head">SP</th>
<th class="head">Command</th>
<th class="head">Action</th>
</tr>
</thead>
<tbody valign="top">
<tr class="row-even"><td>FSP</td>
<td>opal-prd occ</td>
<td>display error message</td>
</tr>
<tr class="row-odd"><td>FSP</td>
<td>opal-prd pm-complex</td>
<td>Call pm_complex_reset()</td>
</tr>
<tr class="row-even"><td>BMC</td>
<td>opal-prd occ</td>
<td>Call process_occ_reset()</td>
</tr>
<tr class="row-odd"><td>BMC</td>
<td>opal-prd pm-complex</td>
<td>display error message</td>
</tr>
</tbody>
</table>
</li>
<li><p class="first">opal-prd: detect service processor type and
then make appropriate occ reset call.</p>
</li>
<li><p class="first">pflash: Fix erase command for unaligned start address</p>
<p>The erase_range() function handles erasing the flash for a given start
address and length, and can handle an unaligned start address and
length. However in the unaligned start address case we are incorrectly
calculating the remaining size which can lead to incomplete erases.</p>
<p>If we’re going to update the remaining size based on what the start
address was then we probably want to do that before we overide the
origin start address. So rearrange the code so that this is indeed the
case.</p>
</li>
<li><p class="first">external/gard: Print an error if run on an FSP system</p>
</li>
</ul>
</div>
<div class="section" id="simulators">
<h2>Simulators<a class="headerlink" href="#simulators" title="Permalink to this headline">¶</a></h2>
<ul>
<li><p class="first">mambo: Add mambo socket program</p>
<p>This adds a program that can be run inside a mambo simulator in linux
userspace which enables TCP sockets to be proxied in and out of the
simulator to the host.</p>
<p>Unlike mambo bogusnet, it’s requires no linux or skiboot specific
drivers/infrastructure to run.</p>
<p>Run inside the simulator:</p>
<ul class="simple">
<li>to forward host ssh connections to sim ssh server:
<code class="docutils literal notranslate"><span class="pre">./mambo-socket-proxy</span> <span class="pre">-h</span> <span class="pre">10022</span> <span class="pre">-s</span> <span class="pre">22</span></code>, then connect to port 10022
on your host with <code class="docutils literal notranslate"><span class="pre">ssh</span> <span class="pre">-p</span> <span class="pre">10022</span> <span class="pre">localhost</span></code></li>
<li>to allow http proxy access from inside the sim to local http proxy:
<code class="docutils literal notranslate"><span class="pre">./mambo-socket-proxy</span> <span class="pre">-b</span> <span class="pre">proxy.mynetwork</span> <span class="pre">-h</span> <span class="pre">3128</span> <span class="pre">-s</span> <span class="pre">3128</span></code></li>
</ul>
<p>Multiple connections are supported.</p>
</li>
<li><p class="first">idle: disable stop*_lite POWER9 idle states for Mambo platform</p>
<p>Mambo prior to Mambo.7.8.21 had a bug where the stop idle instruction
with PSSCR[ESL]=PSSCR[EC]=0 would resume with MSR set as though it had
taken a system reset interrupt.</p>
<p>Linux currently executes this instruction with MSR already set that
way, so the problem went unnoticed. A proposed patch to Linux changes
that, and causes the idle code to crash. Work around this by disabling
lite stop states for the mambo platform for now.</p>
</li>
</ul>
</div>
<div class="section" id="contributors">
<h2>Contributors<a class="headerlink" href="#contributors" title="Permalink to this headline">¶</a></h2>
<ul class="simple">
<li>209 csets from 32 developers</li>
<li>2 employers found</li>
<li>A total of 9619 lines added, 1612 removed (delta 8007)</li>
</ul>
<p>Extending the analysis done for some previous releases, we can see our trends
in code review across versions:</p>
<table border="1" class="docutils">
<colgroup>
<col width="14%" />
<col width="12%" />
<col width="16%" />
<col width="18%" />
<col width="18%" />
<col width="22%" />
</colgroup>
<thead valign="bottom">
<tr class="row-odd"><th class="head">Release</th>
<th class="head">csets</th>
<th class="head">Ack %</th>
<th class="head">Reviews %</th>
<th class="head">Tested %</th>
<th class="head">Reported %</th>
</tr>
</thead>
<tbody valign="top">
<tr class="row-even"><td>5.0</td>
<td>329</td>
<td>15 (5%)</td>
<td>20 (6%)</td>
<td>1 (0%)</td>
<td>0 (0%)</td>
</tr>
<tr class="row-odd"><td>5.1</td>
<td>372</td>
<td>13 (3%)</td>
<td>38 (10%)</td>
<td>1 (0%)</td>
<td>4 (1%)</td>
</tr>
<tr class="row-even"><td>5.2-rc1</td>
<td>334</td>
<td>20 (6%)</td>
<td>34 (10%)</td>
<td>6 (2%)</td>
<td>11 (3%)</td>
</tr>
<tr class="row-odd"><td>5.3-rc1</td>
<td>302</td>
<td>36 (12%)</td>
<td>53 (18%)</td>
<td>4 (1%)</td>
<td>5 (2%)</td>
</tr>
<tr class="row-even"><td>5.4</td>
<td>361</td>
<td>16 (4%)</td>
<td>28 (8%)</td>
<td>1 (0%)</td>
<td>9 (2%)</td>
</tr>
<tr class="row-odd"><td>5.5</td>
<td>408</td>
<td>11 (3%)</td>
<td>48 (12%)</td>
<td>14 (3%)</td>
<td>10 (2%)</td>
</tr>
<tr class="row-even"><td>5.6</td>
<td>87</td>
<td>12 (14%)</td>
<td>6 (7%)</td>
<td>5 (6%)</td>
<td>2 (2%)</td>
</tr>
<tr class="row-odd"><td>5.7</td>
<td>232</td>
<td>30 (13%)</td>
<td>32 (14%)</td>
<td>5 (2%)</td>
<td>2 (1%)</td>
</tr>
<tr class="row-even"><td>5.8</td>
<td>157</td>
<td>13 (8%)</td>
<td>36 (23%)</td>
<td>2 (1%)</td>
<td>6 (4%)</td>
</tr>
<tr class="row-odd"><td>5.9</td>
<td>209</td>
<td>15 (7%)</td>
<td>78 (37%)</td>
<td>3 (1%)</td>
<td>10 (5%)</td>
</tr>
</tbody>
</table>
<p>The review count here is largely bogus, there was a series of 25 whitespace
patches that got “Reviewed-by” and if we exclude them, we’re back to 14%,
which is more like what I’d expect.</p>
<div class="section" id="developers-with-the-most-changesets">
<h3>Developers with the most changesets<a class="headerlink" href="#developers-with-the-most-changesets" title="Permalink to this headline">¶</a></h3>
<table border="1" class="docutils">
<colgroup>
<col width="72%" />
<col width="8%" />
<col width="19%" />
</colgroup>
<thead valign="bottom">
<tr class="row-odd"><th class="head">Developer</th>
<th class="head">#</th>
<th class="head">%</th>
</tr>
</thead>
<tbody valign="top">
<tr class="row-even"><td>Stewart Smith</td>
<td>28</td>
<td>(13.4%)</td>
</tr>
<tr class="row-odd"><td>Vasant Hegde</td>
<td>25</td>
<td>(12.0%)</td>
</tr>
<tr class="row-even"><td>Joel Stanley</td>
<td>25</td>
<td>(12.0%)</td>
</tr>
<tr class="row-odd"><td>Michael Neuling</td>
<td>24</td>
<td>(11.5%)</td>
</tr>
<tr class="row-even"><td>Oliver O’Halloran</td>
<td>20</td>
<td>(9.6%)</td>
</tr>
<tr class="row-odd"><td>Benjamin Herrenschmidt</td>
<td>16</td>
<td>(7.7%)</td>
</tr>
<tr class="row-even"><td>Nicholas Piggin</td>
<td>12</td>
<td>(5.7%)</td>
</tr>
<tr class="row-odd"><td>Akshay Adiga</td>
<td>8</td>
<td>(3.8%)</td>
</tr>
<tr class="row-even"><td>Madhavan Srinivasan</td>
<td>7</td>
<td>(3.3%)</td>
</tr>
<tr class="row-odd"><td>Reza Arbab</td>
<td>6</td>
<td>(2.9%)</td>
</tr>
<tr class="row-even"><td>Mahesh Salgaonkar</td>
<td>3</td>
<td>(1.4%)</td>
</tr>
<tr class="row-odd"><td>Claudio Carvalho</td>
<td>3</td>
<td>(1.4%)</td>
</tr>
<tr class="row-even"><td>Suraj Jitindar Singh</td>
<td>3</td>
<td>(1.4%)</td>
</tr>
<tr class="row-odd"><td>Sam Bobroff</td>
<td>3</td>
<td>(1.4%)</td>
</tr>
<tr class="row-even"><td>Shilpasri G Bhat</td>
<td>2</td>
<td>(1.0%)</td>
</tr>
<tr class="row-odd"><td>Michael Ellerman</td>
<td>2</td>
<td>(1.0%)</td>
</tr>
<tr class="row-even"><td>Andrew Donnellan</td>
<td>2</td>
<td>(1.0%)</td>
</tr>
<tr class="row-odd"><td>Vaibhav Jain</td>
<td>2</td>
<td>(1.0%)</td>
</tr>
<tr class="row-even"><td>Jeremy Kerr</td>
<td>2</td>
<td>(1.0%)</td>
</tr>
<tr class="row-odd"><td>Cyril Bur</td>
<td>2</td>
<td>(1.0%)</td>
</tr>
<tr class="row-even"><td>Christophe Lombard</td>
<td>2</td>
<td>(1.0%)</td>
</tr>
<tr class="row-odd"><td>Daniel Black</td>
<td>2</td>
<td>(1.0%)</td>
</tr>
<tr class="row-even"><td>Alexey Kardashevskiy</td>
<td>1</td>
<td>(0.5%)</td>
</tr>
<tr class="row-odd"><td>Alistair Popple</td>
<td>1</td>
<td>(0.5%)</td>
</tr>
<tr class="row-even"><td>Anton Blanchard</td>
<td>1</td>
<td>(0.5%)</td>
</tr>
<tr class="row-odd"><td>Guilherme G. Piccoli</td>
<td>1</td>
<td>(0.5%)</td>
</tr>
<tr class="row-even"><td>John W Walthour</td>
<td>1</td>
<td>(0.5%)</td>
</tr>
<tr class="row-odd"><td>Anju T Sudhakar</td>
<td>1</td>
<td>(0.5%)</td>
</tr>
<tr class="row-even"><td>Balbir Singh</td>
<td>1</td>
<td>(0.5%)</td>
</tr>
<tr class="row-odd"><td>Russell Currey</td>
<td>1</td>
<td>(0.5%)</td>
</tr>
<tr class="row-even"><td>William A. Kennington III</td>
<td>1</td>
<td>(0.5%)</td>
</tr>
<tr class="row-odd"><td>Sukadev Bhattiprolu</td>
<td>1</td>
<td>(0.5%)</td>
</tr>
</tbody>
</table>
</div>
<div class="section" id="developers-with-the-most-changed-lines">
<h3>Developers with the most changed lines<a class="headerlink" href="#developers-with-the-most-changed-lines" title="Permalink to this headline">¶</a></h3>
<table border="1" class="docutils">
<colgroup>
<col width="70%" />
<col width="11%" />
<col width="19%" />
</colgroup>
<thead valign="bottom">
<tr class="row-odd"><th class="head">Developer</th>
<th class="head">#</th>
<th class="head">%</th>
</tr>
</thead>
<tbody valign="top">
<tr class="row-even"><td>Akshay Adiga</td>
<td>2731</td>
<td>(27.9%)</td>
</tr>
<tr class="row-odd"><td>Oliver O’Halloran</td>
<td>1512</td>
<td>(15.5%)</td>
</tr>
<tr class="row-even"><td>Stewart Smith</td>
<td>1355</td>
<td>(13.9%)</td>
</tr>
<tr class="row-odd"><td>Nicholas Piggin</td>
<td>929</td>
<td>(9.5%)</td>
</tr>
<tr class="row-even"><td>Vasant Hegde</td>
<td>827</td>
<td>(8.5%)</td>
</tr>
<tr class="row-odd"><td>Michael Neuling</td>
<td>719</td>
<td>(7.4%)</td>
</tr>
<tr class="row-even"><td>Benjamin Herrenschmidt</td>
<td>522</td>
<td>(5.3%)</td>
</tr>
<tr class="row-odd"><td>Madhavan Srinivasan</td>
<td>180</td>
<td>(1.8%)</td>
</tr>
<tr class="row-even"><td>Sam Bobroff</td>
<td>172</td>
<td>(1.8%)</td>
</tr>
<tr class="row-odd"><td>Christophe Lombard</td>
<td>170</td>
<td>(1.7%)</td>
</tr>
<tr class="row-even"><td>Mahesh Salgaonkar</td>
<td>166</td>
<td>(1.7%)</td>
</tr>
<tr class="row-odd"><td>Andrew Donnellan</td>
<td>125</td>
<td>(1.3%)</td>
</tr>
<tr class="row-even"><td>Joel Stanley</td>
<td>70</td>
<td>(0.7%)</td>
</tr>
<tr class="row-odd"><td>Reza Arbab</td>
<td>64</td>
<td>(0.7%)</td>
</tr>
<tr class="row-even"><td>Claudio Carvalho</td>
<td>51</td>
<td>(0.5%)</td>
</tr>
<tr class="row-odd"><td>Suraj Jitindar Singh</td>
<td>42</td>
<td>(0.4%)</td>
</tr>
<tr class="row-even"><td>Alistair Popple</td>
<td>28</td>
<td>(0.3%)</td>
</tr>
<tr class="row-odd"><td>Jeremy Kerr</td>
<td>25</td>
<td>(0.3%)</td>
</tr>
<tr class="row-even"><td>Michael Ellerman</td>
<td>21</td>
<td>(0.2%)</td>
</tr>
<tr class="row-odd"><td>Cyril Bur</td>
<td>18</td>
<td>(0.2%)</td>
</tr>
<tr class="row-even"><td>Shilpasri G Bhat</td>
<td>17</td>
<td>(0.2%)</td>
</tr>
<tr class="row-odd"><td>Vaibhav Jain</td>
<td>8</td>
<td>(0.1%)</td>
</tr>
<tr class="row-even"><td>Daniel Black</td>
<td>6</td>
<td>(0.1%)</td>
</tr>
<tr class="row-odd"><td>William A. Kennington III</td>
<td>4</td>
<td>(0.0%)</td>
</tr>
<tr class="row-even"><td>Sukadev Bhattiprolu</td>
<td>4</td>
<td>(0.0%)</td>
</tr>
<tr class="row-odd"><td>Alexey Kardashevskiy</td>
<td>3</td>
<td>(0.0%)</td>
</tr>
<tr class="row-even"><td>John W Walthour</td>
<td>3</td>
<td>(0.0%)</td>
</tr>
<tr class="row-odd"><td>Balbir Singh</td>
<td>3</td>
<td>(0.0%)</td>
</tr>
<tr class="row-even"><td>Guilherme G. Piccoli</td>
<td>2</td>
<td>(0.0%)</td>
</tr>
<tr class="row-odd"><td>Anton Blanchard</td>
<td>1</td>
<td>(0.0%)</td>
</tr>
<tr class="row-even"><td>Anju T Sudhakar</td>
<td>1</td>
<td>(0.0%)</td>
</tr>
<tr class="row-odd"><td>Russell Currey</td>
<td>1</td>
<td>(0.0%)</td>
</tr>
</tbody>
</table>
</div>
<div class="section" id="developers-with-the-most-lines-removed">
<h3>Developers with the most lines removed<a class="headerlink" href="#developers-with-the-most-lines-removed" title="Permalink to this headline">¶</a></h3>
<table border="1" class="docutils">
<colgroup>
<col width="70%" />
<col width="11%" />
<col width="19%" />
</colgroup>
<thead valign="bottom">
<tr class="row-odd"><th class="head">Developer</th>
<th class="head">#</th>
<th class="head">%</th>
</tr>
</thead>
<tbody valign="top">
<tr class="row-even"><td>Alistair Popple</td>
<td>28</td>
<td>(1.7%)</td>
</tr>
</tbody>
</table>
</div>
<div class="section" id="developers-with-the-most-signoffs">
<h3>Developers with the most signoffs<a class="headerlink" href="#developers-with-the-most-signoffs" title="Permalink to this headline">¶</a></h3>
<table border="1" class="docutils">
<colgroup>
<col width="72%" />
<col width="8%" />
<col width="19%" />
</colgroup>
<thead valign="bottom">
<tr class="row-odd"><th class="head">Developer</th>
<th class="head">#</th>
<th class="head">%</th>
</tr>
</thead>
<tbody valign="top">
<tr class="row-even"><td>Stewart Smith</td>
<td>180</td>
<td>(97.8%)</td>
</tr>
<tr class="row-odd"><td>Shilpasri G Bhat</td>
<td>2</td>
<td>(1.1%)</td>
</tr>
<tr class="row-even"><td>Mukesh Ojha</td>
<td>1</td>
<td>(0.5%)</td>
</tr>
<tr class="row-odd"><td>Michael Neuling</td>
<td>1</td>
<td>(0.5%)</td>
</tr>
<tr class="row-even"><td>Total</td>
<td>184</td>
<td>(100%)</td>
</tr>
</tbody>
</table>
</div>
<div class="section" id="developers-with-the-most-reviews">
<h3>Developers with the most reviews<a class="headerlink" href="#developers-with-the-most-reviews" title="Permalink to this headline">¶</a></h3>
<table border="1" class="docutils">
<colgroup>
<col width="75%" />
<col width="6%" />
<col width="19%" />
</colgroup>
<thead valign="bottom">
<tr class="row-odd"><th class="head">Developer</th>
<th class="head">#</th>
<th class="head">%</th>
</tr>
</thead>
<tbody valign="top">
<tr class="row-even"><td>Michael Neuling</td>
<td>25</td>
<td>(32.5%)</td>
</tr>
<tr class="row-odd"><td>Russell Currey</td>
<td>25</td>
<td>(32.5%)</td>
</tr>
<tr class="row-even"><td>Vaidyanathan Srinivasan</td>
<td>9</td>
<td>(11.7%)</td>
</tr>
<tr class="row-odd"><td>Oliver O’Halloran</td>
<td>4</td>
<td>(5.2%)</td>
</tr>
<tr class="row-even"><td>Andrew Donnellan</td>
<td>3</td>
<td>(3.9%)</td>
</tr>
<tr class="row-odd"><td>Frederic Barrat</td>
<td>2</td>
<td>(2.6%)</td>
</tr>
<tr class="row-even"><td>Suraj Jitindar Singh</td>
<td>2</td>
<td>(2.6%)</td>
</tr>
<tr class="row-odd"><td>Vasant Hegde</td>
<td>2</td>
<td>(2.6%)</td>
</tr>
<tr class="row-even"><td>Andrew Jeffery</td>
<td>1</td>
<td>(1.3%)</td>
</tr>
<tr class="row-odd"><td>Samuel Mendoza-Jonas</td>
<td>1</td>
<td>(1.3%)</td>
</tr>
<tr class="row-even"><td>Alexey Kardashevskiy</td>
<td>1</td>
<td>(1.3%)</td>
</tr>
<tr class="row-odd"><td>Cyril Bur</td>
<td>1</td>
<td>(1.3%)</td>
</tr>
<tr class="row-even"><td>Akshay Adiga</td>
<td>1</td>
<td>(1.3%)</td>
</tr>
<tr class="row-odd"><td>Total</td>
<td>77</td>
<td>(100%)</td>
</tr>
</tbody>
</table>
</div>
<div class="section" id="developers-with-the-most-test-credits">
<h3>Developers with the most test credits<a class="headerlink" href="#developers-with-the-most-test-credits" title="Permalink to this headline">¶</a></h3>
<table border="1" class="docutils">
<colgroup>
<col width="73%" />
<col width="5%" />
<col width="22%" />
</colgroup>
<thead valign="bottom">
<tr class="row-odd"><th class="head">Developer</th>
<th class="head">#</th>
<th class="head">%</th>
</tr>
</thead>
<tbody valign="top">
<tr class="row-even"><td>Pridhiviraj Paidipeddi</td>
<td>3</td>
<td>(100.0%)</td>
</tr>
</tbody>
</table>
</div>
<div class="section" id="developers-who-gave-the-most-tested-by-credits">
<h3>Developers who gave the most tested-by credits<a class="headerlink" href="#developers-who-gave-the-most-tested-by-credits" title="Permalink to this headline">¶</a></h3>
<table border="1" class="docutils">
<colgroup>
<col width="75%" />
<col width="6%" />
<col width="19%" />
</colgroup>
<thead valign="bottom">
<tr class="row-odd"><th class="head">Developer</th>
<th class="head">#</th>
<th class="head">%</th>
</tr>
</thead>
<tbody valign="top">
<tr class="row-even"><td>Vasant Hegde</td>
<td>2</td>
<td>(66.7%)</td>
</tr>
<tr class="row-odd"><td>Michael Neuling</td>
<td>1</td>
<td>(33.3%)</td>
</tr>
</tbody>
</table>
</div>
<div class="section" id="developers-with-the-most-report-credits">
<h3>Developers with the most report credits<a class="headerlink" href="#developers-with-the-most-report-credits" title="Permalink to this headline">¶</a></h3>
<table border="1" class="docutils">
<colgroup>
<col width="75%" />
<col width="6%" />
<col width="19%" />
</colgroup>
<thead valign="bottom">
<tr class="row-odd"><th class="head">Developer</th>
<th class="head">#</th>
<th class="head">%</th>
</tr>
</thead>
<tbody valign="top">
<tr class="row-even"><td>Pridhiviraj Paidipeddi</td>
<td>6</td>
<td>(60.0%)</td>
</tr>
<tr class="row-odd"><td>Andrew Donnellan</td>
<td>1</td>
<td>(10.0%)</td>
</tr>
<tr class="row-even"><td>Stewart Smith</td>
<td>1</td>
<td>(10.0%)</td>
</tr>
<tr class="row-odd"><td>Shriya</td>
<td>1</td>
<td>(10.0%)</td>
</tr>
<tr class="row-even"><td>Robert Lippert</td>
<td>1</td>
<td>(10.0%)</td>
</tr>
<tr class="row-odd"><td>Total</td>
<td>10</td>
<td>(100%)</td>
</tr>
</tbody>
</table>
</div>
<div class="section" id="developers-who-gave-the-most-report-credits">
<h3>Developers who gave the most report credits<a class="headerlink" href="#developers-who-gave-the-most-report-credits" title="Permalink to this headline">¶</a></h3>
<table border="1" class="docutils">
<colgroup>
<col width="75%" />
<col width="6%" />
<col width="19%" />
</colgroup>
<thead valign="bottom">
<tr class="row-odd"><th class="head">Developer</th>
<th class="head">#</th>
<th class="head">%</th>
</tr>
</thead>
<tbody valign="top">
<tr class="row-even"><td>Stewart Smith</td>
<td>3</td>
<td>(30.0%)</td>
</tr>
<tr class="row-odd"><td>Suraj Jitindar Singh</td>
<td>3</td>
<td>(30.0%)</td>
</tr>
<tr class="row-even"><td>Vasant Hegde</td>
<td>2</td>
<td>(20.0%)</td>
</tr>
<tr class="row-odd"><td>Michael Neuling</td>
<td>1</td>
<td>(10.0%)</td>
</tr>
<tr class="row-even"><td>Madhavan Srinivasan</td>
<td>1</td>
<td>(10.0%)</td>
</tr>
<tr class="row-odd"><td>Total</td>
<td>10</td>
<td>(100%)</td>
</tr>
</tbody>
</table>
</div>
<div class="section" id="changesets-and-employers">
<h3>Changesets and Employers<a class="headerlink" href="#changesets-and-employers" title="Permalink to this headline">¶</a></h3>
<p>Top changeset contributors by employer:</p>
<table border="1" class="docutils">
<colgroup>
<col width="73%" />
<col width="8%" />
<col width="19%" />
</colgroup>
<thead valign="bottom">
<tr class="row-odd"><th class="head">Employer</th>
<th class="head">#</th>
<th class="head">%</th>
</tr>
</thead>
<tbody valign="top">
<tr class="row-even"><td>IBM</td>
<td>208</td>
<td>(99.5%)</td>
</tr>
<tr class="row-odd"><td>Google</td>
<td>1</td>
<td>(0.5%)</td>
</tr>
</tbody>
</table>
<p>Top lines changed by employer:</p>
<table border="1" class="docutils">
<colgroup>
<col width="69%" />
<col width="10%" />
<col width="21%" />
</colgroup>
<thead valign="bottom">
<tr class="row-odd"><th class="head">Employer</th>
<th class="head">#</th>
<th class="head">%</th>
</tr>
</thead>
<tbody valign="top">
<tr class="row-even"><td>IBM</td>
<td>9776</td>
<td>(100.0%)</td>
</tr>
<tr class="row-odd"><td>Google</td>
<td>4</td>
<td>(0.0%)</td>
</tr>
</tbody>
</table>
<p>Employers with the most signoffs (total 184):</p>
<table border="1" class="docutils">
<colgroup>
<col width="71%" />
<col width="8%" />
<col width="21%" />
</colgroup>
<thead valign="bottom">
<tr class="row-odd"><th class="head">Employer</th>
<th class="head">#</th>
<th class="head">%</th>
</tr>
</thead>
<tbody valign="top">
<tr class="row-even"><td>IBM</td>
<td>184</td>
<td>(100.0%)</td>
</tr>
</tbody>
</table>
<p>Employers with the most hackers (total 32):</p>
<table border="1" class="docutils">
<colgroup>
<col width="73%" />
<col width="8%" />
<col width="19%" />
</colgroup>
<thead valign="bottom">
<tr class="row-odd"><th class="head">Employer</th>
<th class="head">#</th>
<th class="head">%</th>
</tr>
</thead>
<tbody valign="top">
<tr class="row-even"><td>IBM</td>
<td>31</td>
<td>(96.9%)</td>
</tr>
<tr class="row-odd"><td>Google</td>
<td>1</td>
<td>(3.1%)</td>
</tr>
</tbody>
</table>
</div>
</div>
</div>
</div>
</div>
</div>
<div class="sphinxsidebar" role="navigation" aria-label="main navigation">
<div class="sphinxsidebarwrapper">
<h3><a href="../index.html">Table of Contents</a></h3>
<ul>
<li><a class="reference internal" href="#">skiboot-5.9</a><ul>
<li><a class="reference internal" href="#new-features">New Features</a><ul>
<li><a class="reference internal" href="#power8">POWER8</a></li>
<li><a class="reference internal" href="#power9">POWER9</a></li>
</ul>
</li>
<li><a class="reference internal" href="#id2">POWER9</a><ul>
<li><a class="reference internal" href="#capi">CAPI</a></li>
<li><a class="reference internal" href="#nvlink2">NVLINK2</a></li>
<li><a class="reference internal" href="#xive">XIVE</a></li>
<li><a class="reference internal" href="#phb4">PHB4</a></li>
</ul>
</li>
<li><a class="reference internal" href="#ibm-fsp-platforms">IBM FSP platforms</a></li>
<li><a class="reference internal" href="#bmc-based-systems">BMC based systems</a></li>
<li><a class="reference internal" href="#general">General</a></li>
<li><a class="reference internal" href="#utilities">Utilities</a></li>
<li><a class="reference internal" href="#simulators">Simulators</a></li>
<li><a class="reference internal" href="#contributors">Contributors</a><ul>
<li><a class="reference internal" href="#developers-with-the-most-changesets">Developers with the most changesets</a></li>
<li><a class="reference internal" href="#developers-with-the-most-changed-lines">Developers with the most changed lines</a></li>
<li><a class="reference internal" href="#developers-with-the-most-lines-removed">Developers with the most lines removed</a></li>
<li><a class="reference internal" href="#developers-with-the-most-signoffs">Developers with the most signoffs</a></li>
<li><a class="reference internal" href="#developers-with-the-most-reviews">Developers with the most reviews</a></li>
<li><a class="reference internal" href="#developers-with-the-most-test-credits">Developers with the most test credits</a></li>
<li><a class="reference internal" href="#developers-who-gave-the-most-tested-by-credits">Developers who gave the most tested-by credits</a></li>
<li><a class="reference internal" href="#developers-with-the-most-report-credits">Developers with the most report credits</a></li>
<li><a class="reference internal" href="#developers-who-gave-the-most-report-credits">Developers who gave the most report credits</a></li>
<li><a class="reference internal" href="#changesets-and-employers">Changesets and Employers</a></li>
</ul>
</li>
</ul>
</li>
</ul>
<h4>Previous topic</h4>
<p class="topless"><a href="skiboot-5.8-rc1.html"
title="previous chapter">skiboot-5.8-rc1</a></p>
<h4>Next topic</h4>
<p class="topless"><a href="skiboot-5.9-rc1.html"
title="next chapter">skiboot-5.9-rc1</a></p>
<div role="note" aria-label="source link">
<h3>This Page</h3>
<ul class="this-page-menu">
<li><a href="../_sources/release-notes/skiboot-5.9.rst.txt"
rel="nofollow">Show Source</a></li>
</ul>
</div>
<div id="searchbox" style="display: none" role="search">
<h3>Quick search</h3>
<div class="searchformwrapper">
<form class="search" action="../search.html" method="get">
<input type="text" name="q" />
<input type="submit" value="Go" />
<input type="hidden" name="check_keywords" value="yes" />
<input type="hidden" name="area" value="default" />
</form>
</div>
</div>
<script type="text/javascript">$('#searchbox').show(0);</script>
</div>
</div>
<div class="clearer"></div>
</div>
<div class="related" role="navigation" aria-label="related navigation">
<h3>Navigation</h3>
<ul>
<li class="right" style="margin-right: 10px">
<a href="../genindex.html" title="General Index"
>index</a></li>
<li class="right" >
<a href="skiboot-5.9-rc1.html" title="skiboot-5.9-rc1"
>next</a> |</li>
<li class="right" >
<a href="skiboot-5.8-rc1.html" title="skiboot-5.8-rc1"
>previous</a> |</li>
<li class="nav-item nav-item-0"><a href="../index.html">skiboot 4d27f03
documentation</a> »</li>
<li class="nav-item nav-item-1"><a href="index.html" >Release Notes</a> »</li>
</ul>
</div>
<div class="footer" role="contentinfo">
© Copyright 2016-2017, IBM, others.
Created using <a href="http://sphinx-doc.org/">Sphinx</a> 1.8.5.
</div>
</body>
</html>
|
