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<div class="section" id="skiboot-5-1-1">
<h1>skiboot-5.1.1<a class="headerlink" href="#skiboot-5-1-1" title="Permalink to this headline">¶</a></h1>
<p>skiboot-5.1.1 was released on August 18th, 2015.</p>
<p>skiboot-5.1.1 is the send stable release of 5.1, it follows skiboot-5.1.0.</p>
<p>Skiboot 5.1.1 contains all fixes from skiboot-5.1.0 and is a minor bugfix
release.</p>
<div class="section" id="changes">
<h2>Changes<a class="headerlink" href="#changes" title="Permalink to this headline">¶</a></h2>
<p>Over skiboot-5.1.0, we have the following changes:</p>
<ul>
<li><p class="first">Fix detection of compiler options on ancient GCC (e.g. gcc 4.4, shipped with
RHEL6)</p>
</li>
<li><p class="first">ensure the GNUC version defines for GCOV are coming from target CC rather
than host CC for extract-gcov</p>
</li>
<li><p class="first">phb3: Continue CAPP setup even if PHB is already in CAPP mode
This fixes a critical bug in CAPI support.</p>
<p>CAPI requires that all faults are escalated into a fence, not a
freeze. This is done by setting bits in a number of MMIO
registers. phb3_set_capi_mode() calls phb3_init_capp_errors() to do
this. However, if the PHB is already in CAPP mode - for example in the
recovery case - phb3_set_capi_mode() will bail out early, and those
registers will not be set.</p>
<p>This is quite easy to verify. PCI config space access errors, for
example, normally cause a freeze. On a CAPI-mode PHB, they should
cause a fence. Say we have a CAPI card on PHB 0, and we inject a
PCI config space error:</p>
<div class="highlight-default notranslate"><div class="highlight"><pre><span></span><span class="n">echo</span> <span class="mh">0x8000000000000000</span> <span class="o">></span> <span class="o">/</span><span class="n">sys</span><span class="o">/</span><span class="n">kernel</span><span class="o">/</span><span class="n">debug</span><span class="o">/</span><span class="n">powerpc</span><span class="o">/</span><span class="n">PCI0000</span><span class="o">/</span><span class="n">err_injct_inboundA</span><span class="p">;</span>
<span class="n">lspci</span><span class="p">;</span>
</pre></div>
</div>
<p>The first time we inject this, the PHB will fence and recover, but
won’t reset the registers. Therefore, the second time we inject it,
we will incorrectly freeze, not fence.</p>
<p>Worse, the recovery for the resultant EEH freeze event interacts
poorly with the CAPP, triggering an EEH recovery of the PHB. The
combination of the two attempted recoveries will get the PHB into
an inoperable state.</p>
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