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<td width="10%" class="headerItem">Current view:</td>
<td width="35%" class="headerValue"><a href="../index.html">top level</a> - <a href="index.html">hdata</a> - memory.c<span style="font-size: 80%;"> (source / <a href="memory.c.func-sort-c.html">functions</a>)</span></td>
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<td width="15%"></td>
<td width="10%" class="headerCovTableHead">Hit</td>
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<td class="headerItem">Test:</td>
<td class="headerValue">skiboot.info</td>
<td></td>
<td class="headerItem">Lines:</td>
<td class="headerCovTableEntry">152</td>
<td class="headerCovTableEntry">420</td>
<td class="headerCovTableEntryLo">36.2 %</td>
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<td class="headerItem">Date:</td>
<td class="headerValue">2022-06-13 20:37:26</td>
<td></td>
<td class="headerItem">Functions:</td>
<td class="headerCovTableEntry">13</td>
<td class="headerCovTableEntry">19</td>
<td class="headerCovTableEntryLo">68.4 %</td>
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<pre class="sourceHeading"> Branch data Line data Source code</pre>
<pre class="source">
<a name="1"><span class="lineNum"> 1 </span> : : // SPDX-License-Identifier: Apache-2.0 OR GPL-2.0-or-later</a>
<a name="2"><span class="lineNum"> 2 </span> : : /* Copyright 2013-2019 IBM Corp. */</a>
<a name="3"><span class="lineNum"> 3 </span> : : </a>
<a name="4"><span class="lineNum"> 4 </span> : : #include <cpu.h></a>
<a name="5"><span class="lineNum"> 5 </span> : : #include <device.h></a>
<a name="6"><span class="lineNum"> 6 </span> : : #include <vpd.h></a>
<a name="7"><span class="lineNum"> 7 </span> : : #include <ccan/str/str.h></a>
<a name="8"><span class="lineNum"> 8 </span> : : #include <libfdt/libfdt.h></a>
<a name="9"><span class="lineNum"> 9 </span> : : #include <mem_region.h></a>
<a name="10"><span class="lineNum"> 10 </span> : : #include <types.h></a>
<a name="11"><span class="lineNum"> 11 </span> : : #include <inttypes.h></a>
<a name="12"><span class="lineNum"> 12 </span> : : #include <processor.h></a>
<a name="13"><span class="lineNum"> 13 </span> : : </a>
<a name="14"><span class="lineNum"> 14 </span> : : #include "spira.h"</a>
<a name="15"><span class="lineNum"> 15 </span> : : #include "hdata.h"</a>
<a name="16"><span class="lineNum"> 16 </span> : : </a>
<a name="17"><span class="lineNum"> 17 </span> : : struct HDIF_ram_area_id {</a>
<a name="18"><span class="lineNum"> 18 </span> : : __be16 id;</a>
<a name="19"><span class="lineNum"> 19 </span> : : #define RAM_AREA_INSTALLED 0x8000</a>
<a name="20"><span class="lineNum"> 20 </span> : : #define RAM_AREA_FUNCTIONAL 0x4000</a>
<a name="21"><span class="lineNum"> 21 </span> : : __be16 flags;</a>
<a name="22"><span class="lineNum"> 22 </span> : : __be32 dimm_id;</a>
<a name="23"><span class="lineNum"> 23 </span> : : __be32 speed;</a>
<a name="24"><span class="lineNum"> 24 </span> : : } __packed;</a>
<a name="25"><span class="lineNum"> 25 </span> : : </a>
<a name="26"><span class="lineNum"> 26 </span> : : struct HDIF_ram_area_size {</a>
<a name="27"><span class="lineNum"> 27 </span> : : __be32 reserved1;</a>
<a name="28"><span class="lineNum"> 28 </span> : : __be32 mb;</a>
<a name="29"><span class="lineNum"> 29 </span> : : } __packed;</a>
<a name="30"><span class="lineNum"> 30 </span> : : </a>
<a name="31"><span class="lineNum"> 31 </span> : : struct HDIF_ms_area_address_range {</a>
<a name="32"><span class="lineNum"> 32 </span> : : __be64 start;</a>
<a name="33"><span class="lineNum"> 33 </span> : : __be64 end;</a>
<a name="34"><span class="lineNum"> 34 </span> : : __be32 chip;</a>
<a name="35"><span class="lineNum"> 35 </span> : : __be32 mirror_attr;</a>
<a name="36"><span class="lineNum"> 36 </span> : : __be64 mirror_start;</a>
<a name="37"><span class="lineNum"> 37 </span> : : __be32 controller_id;</a>
<a name="38"><span class="lineNum"> 38 </span> : : __be32 phys_attr;</a>
<a name="39"><span class="lineNum"> 39 </span> : : } __packed;</a>
<a name="40"><span class="lineNum"> 40 </span> : : #define PHYS_ATTR_TYPE_MASK 0xff000000</a>
<a name="41"><span class="lineNum"> 41 </span> : : #define PHYS_ATTR_TYPE_STD 0</a>
<a name="42"><span class="lineNum"> 42 </span> : : #define PHYS_ATTR_TYPE_NVDIMM 1</a>
<a name="43"><span class="lineNum"> 43 </span> : : #define PHYS_ATTR_TYPE_MRAM 2</a>
<a name="44"><span class="lineNum"> 44 </span> : : #define PHYS_ATTR_TYPE_PCM 3</a>
<a name="45"><span class="lineNum"> 45 </span> : : </a>
<a name="46"><span class="lineNum"> 46 </span> : : #define PHYS_ATTR_STATUS_MASK 0x00ff0000</a>
<a name="47"><span class="lineNum"> 47 </span> : : /*</a>
<a name="48"><span class="lineNum"> 48 </span> : : * The values here are mutually exclusive. I have no idea why anyone</a>
<a name="49"><span class="lineNum"> 49 </span> : : * decided encoding these are flags rather than sequential numbers was</a>
<a name="50"><span class="lineNum"> 50 </span> : : * a good idea, but here we are.</a>
<a name="51"><span class="lineNum"> 51 </span> : : */</a>
<a name="52"><span class="lineNum"> 52 </span> : : #define PHYS_ATTR_STATUS_CANT_SAVE 0x01</a>
<a name="53"><span class="lineNum"> 53 </span> : : #define PHYS_ATTR_STATUS_SAVE_FAILED 0x02</a>
<a name="54"><span class="lineNum"> 54 </span> : : #define PHYS_ATTR_STATUS_SAVED 0x04</a>
<a name="55"><span class="lineNum"> 55 </span> : : #define PHYS_ATTR_STATUS_NOT_SAVED 0x08</a>
<a name="56"><span class="lineNum"> 56 </span> : : #define PHYS_ATTR_STATUS_ENCRYPTED 0x10</a>
<a name="57"><span class="lineNum"> 57 </span> : : #define PHYS_ATTR_STATUS_ERR_DETECTED 0x40</a>
<a name="58"><span class="lineNum"> 58 </span> : : #define PHYS_ATTR_STATUS_MEM_INVALID 0xff</a>
<a name="59"><span class="lineNum"> 59 </span> : : </a>
<a name="60"><span class="lineNum"> 60 </span> : : /* Memory Controller ID for Nimbus P9 systems */</a>
<a name="61"><span class="lineNum"> 61 </span> : : #define MS_CONTROLLER_MCBIST_ID(id) GETFIELD(PPC_BITMASK32(0, 1), id)</a>
<a name="62"><span class="lineNum"> 62 </span> : : #define MS_CONTROLLER_MCS_ID(id) GETFIELD(PPC_BITMASK32(4, 7), id)</a>
<a name="63"><span class="lineNum"> 63 </span> : : #define MS_CONTROLLER_MCA_ID(id) GETFIELD(PPC_BITMASK32(8, 15), id)</a>
<a name="64"><span class="lineNum"> 64 </span> : : </a>
<a name="65"><span class="lineNum"> 65 </span> : : /* Memory Controller ID for P9 AXONE systems */</a>
<a name="66"><span class="lineNum"> 66 </span> : : #define MS_CONTROLLER_MC_ID(id) GETFIELD(PPC_BITMASK32(0, 1), id)</a>
<a name="67"><span class="lineNum"> 67 </span> : : #define MS_CONTROLLER_MI_ID(id) GETFIELD(PPC_BITMASK32(4, 7), id)</a>
<a name="68"><span class="lineNum"> 68 </span> : : #define MS_CONTROLLER_MCC_ID(id) GETFIELD(PPC_BITMASK32(8, 15), id)</a>
<a name="69"><span class="lineNum"> 69 </span> : : #define MS_CONTROLLER_OMI_ID(id) GETFIELD(PPC_BITMASK32(16, 31), id)</a>
<a name="70"><span class="lineNum"> 70 </span> : : </a>
<a name="71"><span class="lineNum"> 71 </span> : : struct HDIF_ms_area_id {</a>
<a name="72"><span class="lineNum"> 72 </span> : : __be16 id;</a>
<a name="73"><span class="lineNum"> 73 </span> : : #define MS_PTYPE_RISER_CARD 0x8000</a>
<a name="74"><span class="lineNum"> 74 </span> : : #define MS_PTYPE_MEM_CARD 0x4000</a>
<a name="75"><span class="lineNum"> 75 </span> : : #define MS_PTYPE_CEC_FRU 0x2000</a>
<a name="76"><span class="lineNum"> 76 </span> : : #define MS_PTYPE_HYBRID_CARD 0x1000</a>
<a name="77"><span class="lineNum"> 77 </span> : : __be16 parent_type;</a>
<a name="78"><span class="lineNum"> 78 </span> : : #define MS_AREA_INSTALLED 0x8000</a>
<a name="79"><span class="lineNum"> 79 </span> : : #define MS_AREA_FUNCTIONAL 0x4000</a>
<a name="80"><span class="lineNum"> 80 </span> : : #define MS_AREA_SHARED 0x2000</a>
<a name="81"><span class="lineNum"> 81 </span> : : __be16 flags;</a>
<a name="82"><span class="lineNum"> 82 </span> : : __be16 share_id;</a>
<a name="83"><span class="lineNum"> 83 </span> : : } __packed;</a>
<a name="84"><span class="lineNum"> 84 </span> : : </a>
<a name="85"><span class="lineNum"> 85 </span> : : </a>
<a name="86"><span class="lineNum"> 86 </span> : : // FIXME: it should be 9, current HDATs are broken</a>
<a name="87"><span class="lineNum"> 87 </span> : : #define MSAREA_IDATA_MMIO_IDX 8</a>
<a name="88"><span class="lineNum"> 88 </span> : : struct HDIF_ms_area_ocmb_mmio {</a>
<a name="89"><span class="lineNum"> 89 </span> : : __be64 range_start;</a>
<a name="90"><span class="lineNum"> 90 </span> : : __be64 range_end;</a>
<a name="91"><span class="lineNum"> 91 </span> : : __be32 controller_id;</a>
<a name="92"><span class="lineNum"> 92 </span> : : __be32 proc_chip_id;</a>
<a name="93"><span class="lineNum"> 93 </span> : : __be64 hbrt_id;</a>
<a name="94"><span class="lineNum"> 94 </span> : : #define OCMB_SCOM_8BYTE_ACCESS PPC_BIT(0)</a>
<a name="95"><span class="lineNum"> 95 </span> : : #define OCMB_SCOM_4BYTE_ACCESS PPC_BIT(1)</a>
<a name="96"><span class="lineNum"> 96 </span> : : __be64 flags;</a>
<a name="97"><span class="lineNum"> 97 </span> : : } __packed;</a>
<a name="98"><span class="lineNum"> 98 </span> : : </a>
<a name="99"><span class="lineNum"> 99 </span> :<span class="lineCov"> 3 : static void append_chip_id(struct dt_node *mem, u32 id)</span></a>
<a name="100"><span class="lineNum"> 100 </span> : : {</a>
<a name="101"><span class="lineNum"> 101 </span> : : struct dt_property *prop;</a>
<a name="102"><span class="lineNum"> 102 </span> : : size_t len, i;</a>
<a name="103"><span class="lineNum"> 103 </span> : : </a>
<a name="104"><span class="lineNum"> 104 </span> :<span class="lineCov"> 3 : prop = __dt_find_property(mem, "ibm,chip-id");</span></a>
<a name="105"><span class="lineNum"> 105 </span> :<span class="lineCov"> 3 : if (!prop)</span></a>
<a name="106"><span class="lineNum"> 106 </span> :<span class="lineCov"> 3 : return;</span></a>
<a name="107"><span class="lineNum"> 107 </span> :<span class="lineCov"> 3 : len = prop->len >> 2;</span></a>
<a name="108"><span class="lineNum"> 108 </span> : : </a>
<a name="109"><span class="lineNum"> 109 </span> : : /* Check if it exists already */</a>
<a name="110"><span class="lineNum"> 110 </span> :<span class="lineCov"> 3 : for (i = 0; i < len; i++) {</span></a>
<a name="111"><span class="lineNum"> 111 </span> :<span class="lineCov"> 3 : if (dt_property_get_cell(prop, i) == id)</span></a>
<a name="112"><span class="lineNum"> 112 </span> :<span class="lineCov"> 3 : return;</span></a>
<a name="113"><span class="lineNum"> 113 </span> : : }</a>
<a name="114"><span class="lineNum"> 114 </span> : : </a>
<a name="115"><span class="lineNum"> 115 </span> : : /* Add it to the list */</a>
<a name="116"><span class="lineNum"> 116 </span> :<span class="lineNoCov"> 0 : dt_resize_property(&prop, (len + 1) << 2);</span></a>
<a name="117"><span class="lineNum"> 117 </span> :<span class="lineNoCov"> 0 : dt_property_set_cell(prop, len, id);</span></a>
<a name="118"><span class="lineNum"> 118 </span> : : }</a>
<a name="119"><span class="lineNum"> 119 </span> : : </a>
<a name="120"><span class="lineNum"> 120 </span> :<span class="lineNoCov"> 0 : static void update_status(struct dt_node *mem, uint32_t status)</span></a>
<a name="121"><span class="lineNum"> 121 </span> : : {</a>
<a name="122"><span class="lineNum"> 122 </span> :<span class="lineNoCov"> 0 : switch (status) {</span></a>
<a name="123"><span class="lineNum"> 123 </span> :<span class="lineNoCov"> 0 : case PHYS_ATTR_STATUS_CANT_SAVE:</span></a>
<a name="124"><span class="lineNum"> 124 </span> :<span class="lineNoCov"> 0 : if (!dt_find_property(mem, "save-trigged-unarmed"))</span></a>
<a name="125"><span class="lineNum"> 125 </span> :<span class="lineNoCov"> 0 : dt_add_property(mem, "save-trigger-unarmed", NULL, 0);</span></a>
<a name="126"><span class="lineNum"> 126 </span> :<span class="lineNoCov"> 0 : break;</span></a>
<a name="127"><span class="lineNum"> 127 </span> : : </a>
<a name="128"><span class="lineNum"> 128 </span> :<span class="lineNoCov"> 0 : case PHYS_ATTR_STATUS_SAVE_FAILED:</span></a>
<a name="129"><span class="lineNum"> 129 </span> :<span class="lineNoCov"> 0 : if (!dt_find_property(mem, "save-failed"))</span></a>
<a name="130"><span class="lineNum"> 130 </span> :<span class="lineNoCov"> 0 : dt_add_property(mem, "save-failed", NULL, 0);</span></a>
<a name="131"><span class="lineNum"> 131 </span> : : </a>
<a name="132"><span class="lineNum"> 132 </span> :<span class="lineNoCov"> 0 : break;</span></a>
<a name="133"><span class="lineNum"> 133 </span> : : </a>
<a name="134"><span class="lineNum"> 134 </span> :<span class="lineNoCov"> 0 : case PHYS_ATTR_STATUS_MEM_INVALID:</span></a>
<a name="135"><span class="lineNum"> 135 </span> :<span class="lineNoCov"> 0 : if (dt_find_property(mem, "save-trigged-unarmed"))</span></a>
<a name="136"><span class="lineNum"> 136 </span> :<span class="lineNoCov"> 0 : dt_add_property_string(mem, "status",</span></a>
<a name="137"><span class="lineNum"> 137 </span> : : "disabled-memory-invalid");</a>
<a name="138"><span class="lineNum"> 138 </span> :<span class="lineNoCov"> 0 : break;</span></a>
<a name="139"><span class="lineNum"> 139 </span> : : }</a>
<a name="140"><span class="lineNum"> 140 </span> :<span class="lineNoCov"> 0 : }</span></a>
<a name="141"><span class="lineNum"> 141 </span> : : </a>
<a name="142"><span class="lineNum"> 142 </span> :<span class="lineCov"> 6 : static bool add_address_range(struct dt_node *root,</span></a>
<a name="143"><span class="lineNum"> 143 </span> : : const struct HDIF_ms_area_id *id,</a>
<a name="144"><span class="lineNum"> 144 </span> : : const struct HDIF_ms_area_address_range *arange,</a>
<a name="145"><span class="lineNum"> 145 </span> : : uint32_t mem_type, uint32_t mem_status)</a>
<a name="146"><span class="lineNum"> 146 </span> : : {</a>
<a name="147"><span class="lineNum"> 147 </span> :<span class="lineCov"> 6 : const char *compat = NULL, *dev_type = NULL, *name = NULL;</span></a>
<a name="148"><span class="lineNum"> 148 </span> : : struct dt_node *mem;</a>
<a name="149"><span class="lineNum"> 149 </span> : : u32 chip_id;</a>
<a name="150"><span class="lineNum"> 150 </span> : : u64 reg[2];</a>
<a name="151"><span class="lineNum"> 151 </span> : : </a>
<a name="152"><span class="lineNum"> 152 </span> :<span class="lineCov"> 6 : chip_id = pcid_to_chip_id(be32_to_cpu(arange->chip));</span></a>
<a name="153"><span class="lineNum"> 153 </span> : : </a>
<a name="154"><span class="lineNum"> 154 </span> :<span class="lineCov"> 6 : prlog(PR_DEBUG, " Range: 0x%016llx..0x%016llx "</span></a>
<a name="155"><span class="lineNum"> 155 </span> : : "on Chip 0x%x mattr: 0x%x pattr: 0x%x status:0x%x\n",</a>
<a name="156"><span class="lineNum"> 156 </span> : : (long long)be64_to_cpu(arange->start),</a>
<a name="157"><span class="lineNum"> 157 </span> : : (long long)be64_to_cpu(arange->end),</a>
<a name="158"><span class="lineNum"> 158 </span> : : chip_id, be32_to_cpu(arange->mirror_attr),</a>
<a name="159"><span class="lineNum"> 159 </span> : : mem_type, mem_status);</a>
<a name="160"><span class="lineNum"> 160 </span> : : </a>
<a name="161"><span class="lineNum"> 161 </span> : : /* reg contains start and length */</a>
<a name="162"><span class="lineNum"> 162 </span> :<span class="lineCov"> 6 : reg[0] = cleanup_addr(be64_to_cpu(arange->start));</span></a>
<a name="163"><span class="lineNum"> 163 </span> :<span class="lineCov"> 6 : reg[1] = cleanup_addr(be64_to_cpu(arange->end)) - reg[0];</span></a>
<a name="164"><span class="lineNum"> 164 </span> : : </a>
<a name="165"><span class="lineNum"> 165 </span> :<span class="lineCov"> 6 : switch (mem_type) {</span></a>
<a name="166"><span class="lineNum"> 166 </span> :<span class="lineCov"> 6 : case PHYS_ATTR_TYPE_STD:</span></a>
<a name="167"><span class="lineNum"> 167 </span> :<span class="lineCov"> 6 : name = "memory";</span></a>
<a name="168"><span class="lineNum"> 168 </span> :<span class="lineCov"> 6 : dev_type = "memory";</span></a>
<a name="169"><span class="lineNum"> 169 </span> :<span class="lineCov"> 6 : break;</span></a>
<a name="170"><span class="lineNum"> 170 </span> : : </a>
<a name="171"><span class="lineNum"> 171 </span> :<span class="lineNoCov"> 0 : case PHYS_ATTR_TYPE_NVDIMM:</span></a>
<a name="172"><span class="lineNum"> 172 </span> : : case PHYS_ATTR_TYPE_MRAM:</a>
<a name="173"><span class="lineNum"> 173 </span> : : case PHYS_ATTR_TYPE_PCM:</a>
<a name="174"><span class="lineNum"> 174 </span> : : /* fall through */</a>
<a name="175"><span class="lineNum"> 175 </span> :<span class="lineNoCov"> 0 : name = "nvdimm";</span></a>
<a name="176"><span class="lineNum"> 176 </span> :<span class="lineNoCov"> 0 : compat = "pmem-region";</span></a>
<a name="177"><span class="lineNum"> 177 </span> :<span class="lineNoCov"> 0 : break;</span></a>
<a name="178"><span class="lineNum"> 178 </span> : : </a>
<a name="179"><span class="lineNum"> 179 </span> : : /*</a>
<a name="180"><span class="lineNum"> 180 </span> : : * Future memory types could be volatile or non-volatile. Bail if don't</a>
<a name="181"><span class="lineNum"> 181 </span> : : * recognise the type so we don't end up trashing data accidently.</a>
<a name="182"><span class="lineNum"> 182 </span> : : */</a>
<a name="183"><span class="lineNum"> 183 </span> :<span class="lineNoCov"> 0 : default:</span></a>
<a name="184"><span class="lineNum"> 184 </span> :<span class="lineNoCov"> 0 : return false;</span></a>
<a name="185"><span class="lineNum"> 185 </span> : : }</a>
<a name="186"><span class="lineNum"> 186 </span> : : </a>
<a name="187"><span class="lineNum"> 187 </span> :<span class="lineCov"> 6 : if (be16_to_cpu(id->flags) & MS_AREA_SHARED) {</span></a>
<a name="188"><span class="lineNum"> 188 </span> :<span class="lineCov"> 6 : mem = dt_find_by_name_addr(dt_root, name, reg[0]);</span></a>
<a name="189"><span class="lineNum"> 189 </span> :<span class="lineCov"> 6 : if (mem) {</span></a>
<a name="190"><span class="lineNum"> 190 </span> :<span class="lineCov"> 3 : append_chip_id(mem, chip_id);</span></a>
<a name="191"><span class="lineNum"> 191 </span> :<span class="lineCov"> 3 : if (mem_type == PHYS_ATTR_TYPE_NVDIMM)</span></a>
<a name="192"><span class="lineNum"> 192 </span> :<span class="lineNoCov"> 0 : update_status(mem, mem_status);</span></a>
<a name="193"><span class="lineNum"> 193 </span> :<span class="lineCov"> 3 : return true;</span></a>
<a name="194"><span class="lineNum"> 194 </span> : : }</a>
<a name="195"><span class="lineNum"> 195 </span> : : }</a>
<a name="196"><span class="lineNum"> 196 </span> : : </a>
<a name="197"><span class="lineNum"> 197 </span> :<span class="lineCov"> 3 : mem = dt_new_addr(root, name, reg[0]);</span></a>
<a name="198"><span class="lineNum"> 198 </span> :<span class="lineCov"> 3 : if (compat)</span></a>
<a name="199"><span class="lineNum"> 199 </span> :<span class="lineNoCov"> 0 : dt_add_property_string(mem, "compatible", compat);</span></a>
<a name="200"><span class="lineNum"> 200 </span> :<span class="lineCov"> 3 : if (dev_type)</span></a>
<a name="201"><span class="lineNum"> 201 </span> :<span class="lineCov"> 3 : dt_add_property_string(mem, "device_type", dev_type);</span></a>
<a name="202"><span class="lineNum"> 202 </span> : : </a>
<a name="203"><span class="lineNum"> 203 </span> : : /* add in the nvdimm backup status flags */</a>
<a name="204"><span class="lineNum"> 204 </span> :<span class="lineCov"> 3 : if (mem_type == PHYS_ATTR_TYPE_NVDIMM)</span></a>
<a name="205"><span class="lineNum"> 205 </span> :<span class="lineNoCov"> 0 : update_status(mem, mem_status);</span></a>
<a name="206"><span class="lineNum"> 206 </span> : : </a>
<a name="207"><span class="lineNum"> 207 </span> : : /* common properties */</a>
<a name="208"><span class="lineNum"> 208 </span> : : </a>
<a name="209"><span class="lineNum"> 209 </span> :<span class="lineCov"> 3 : dt_add_property_u64s(mem, "reg", reg[0], reg[1]);</span></a>
<a name="210"><span class="lineNum"> 210 </span> :<span class="lineCov"> 3 : dt_add_property_cells(mem, "ibm,chip-id", chip_id);</span></a>
<a name="211"><span class="lineNum"> 211 </span> :<span class="lineCov"> 3 : return true;</span></a>
<a name="212"><span class="lineNum"> 212 </span> : : }</a>
<a name="213"><span class="lineNum"> 213 </span> : : </a>
<a name="214"><span class="lineNum"> 214 </span> :<span class="lineCov"> 6 : static u32 add_chip_id_to_ram_area(const struct HDIF_common_hdr *msarea,</span></a>
<a name="215"><span class="lineNum"> 215 </span> : : struct dt_node *ram_area)</a>
<a name="216"><span class="lineNum"> 216 </span> : : {</a>
<a name="217"><span class="lineNum"> 217 </span> : : const struct HDIF_array_hdr *arr;</a>
<a name="218"><span class="lineNum"> 218 </span> : : const struct HDIF_ms_area_address_range *arange;</a>
<a name="219"><span class="lineNum"> 219 </span> : : unsigned int size;</a>
<a name="220"><span class="lineNum"> 220 </span> : : u32 chip_id;</a>
<a name="221"><span class="lineNum"> 221 </span> : : </a>
<a name="222"><span class="lineNum"> 222 </span> : : /* Safe to assume pointers are valid here. */</a>
<a name="223"><span class="lineNum"> 223 </span> :<span class="lineCov"> 6 : arr = HDIF_get_idata(msarea, 4, &size);</span></a>
<a name="224"><span class="lineNum"> 224 </span> :<span class="lineCov"> 6 : arange = (void *)arr + be32_to_cpu(arr->offset);</span></a>
<a name="225"><span class="lineNum"> 225 </span> :<span class="lineCov"> 6 : chip_id = pcid_to_chip_id(be32_to_cpu(arange->chip));</span></a>
<a name="226"><span class="lineNum"> 226 </span> :<span class="lineCov"> 6 : dt_add_property_cells(ram_area, "ibm,chip-id", chip_id);</span></a>
<a name="227"><span class="lineNum"> 227 </span> : : </a>
<a name="228"><span class="lineNum"> 228 </span> :<span class="lineCov"> 6 : return chip_id;</span></a>
<a name="229"><span class="lineNum"> 229 </span> : : }</a>
<a name="230"><span class="lineNum"> 230 </span> : : </a>
<a name="231"><span class="lineNum"> 231 </span> :<span class="lineCov"> 6 : static void add_bus_freq_to_ram_area(struct dt_node *ram_node, u32 chip_id)</span></a>
<a name="232"><span class="lineNum"> 232 </span> : : {</a>
<a name="233"><span class="lineNum"> 233 </span> : : const struct sppcia_cpu_timebase *timebase;</a>
<a name="234"><span class="lineNum"> 234 </span> :<span class="lineCov"> 6 : bool got_pcia = false;</span></a>
<a name="235"><span class="lineNum"> 235 </span> : : const void *pcia;</a>
<a name="236"><span class="lineNum"> 236 </span> : : u64 freq;</a>
<a name="237"><span class="lineNum"> 237 </span> : : u32 size;</a>
<a name="238"><span class="lineNum"> 238 </span> : : </a>
<a name="239"><span class="lineNum"> 239 </span> :<span class="lineCov"> 6 : pcia = get_hdif(&spira.ntuples.pcia, SPPCIA_HDIF_SIG);</span></a>
<a name="240"><span class="lineNum"> 240 </span> :<span class="lineCov"> 6 : if (!pcia) {</span></a>
<a name="241"><span class="lineNum"> 241 </span> :<span class="lineNoCov"> 0 : prlog(PR_WARNING, "HDAT: Failed to add memory bus frequency "</span></a>
<a name="242"><span class="lineNum"> 242 </span> : : "as PCIA does not exist\n");</a>
<a name="243"><span class="lineNum"> 243 </span> :<span class="lineNoCov"> 0 : return;</span></a>
<a name="244"><span class="lineNum"> 244 </span> : : }</a>
<a name="245"><span class="lineNum"> 245 </span> : : </a>
<a name="246"><span class="lineNum"> 246 </span> :<span class="lineCov"> 26 : for_each_pcia(pcia) {</span></a>
<a name="247"><span class="lineNum"> 247 </span> : : const struct sppcia_core_unique *id;</a>
<a name="248"><span class="lineNum"> 248 </span> : : </a>
<a name="249"><span class="lineNum"> 249 </span> :<span class="lineCov"> 26 : id = HDIF_get_idata(pcia, SPPCIA_IDATA_CORE_UNIQUE, &size);</span></a>
<a name="250"><span class="lineNum"> 250 </span> :<span class="lineCov"> 26 : if (!id || size < sizeof(*id)) {</span></a>
<a name="251"><span class="lineNum"> 251 </span> :<span class="lineNoCov"> 0 : prlog(PR_WARNING, "HDAT: Bad id size %u @ %p\n", size, id);</span></a>
<a name="252"><span class="lineNum"> 252 </span> :<span class="lineNoCov"> 0 : return;</span></a>
<a name="253"><span class="lineNum"> 253 </span> : : }</a>
<a name="254"><span class="lineNum"> 254 </span> : : </a>
<a name="255"><span class="lineNum"> 255 </span> :<span class="lineCov"> 26 : if (chip_id == pcid_to_chip_id(be32_to_cpu(id->proc_chip_id))) {</span></a>
<a name="256"><span class="lineNum"> 256 </span> :<span class="lineCov"> 6 : got_pcia = true;</span></a>
<a name="257"><span class="lineNum"> 257 </span> :<span class="lineCov"> 6 : break;</span></a>
<a name="258"><span class="lineNum"> 258 </span> : : }</a>
<a name="259"><span class="lineNum"> 259 </span> : : }</a>
<a name="260"><span class="lineNum"> 260 </span> : : </a>
<a name="261"><span class="lineNum"> 261 </span> :<span class="lineCov"> 6 : if (got_pcia == false)</span></a>
<a name="262"><span class="lineNum"> 262 </span> :<span class="lineNoCov"> 0 : return;</span></a>
<a name="263"><span class="lineNum"> 263 </span> : : </a>
<a name="264"><span class="lineNum"> 264 </span> :<span class="lineCov"> 6 : timebase = HDIF_get_idata(pcia, SPPCIA_IDATA_TIMEBASE, &size);</span></a>
<a name="265"><span class="lineNum"> 265 </span> :<span class="lineCov"> 6 : if (!timebase || size < sizeof(*timebase)) {</span></a>
<a name="266"><span class="lineNum"> 266 </span> : : /**</a>
<a name="267"><span class="lineNum"> 267 </span> : : * @fwts-label HDATBadTimebaseSize</a>
<a name="268"><span class="lineNum"> 268 </span> : : * @fwts-advice HDAT described an invalid size for timebase,</a>
<a name="269"><span class="lineNum"> 269 </span> : : * which means there's a disagreement between HDAT and OPAL.</a>
<a name="270"><span class="lineNum"> 270 </span> : : * This is most certainly a firmware bug.</a>
<a name="271"><span class="lineNum"> 271 </span> : : */</a>
<a name="272"><span class="lineNum"> 272 </span> :<span class="lineNoCov"> 0 : prlog(PR_ERR, "HDAT: Bad timebase size %u @ %p\n", size,</span></a>
<a name="273"><span class="lineNum"> 273 </span> : : timebase);</a>
<a name="274"><span class="lineNum"> 274 </span> :<span class="lineNoCov"> 0 : return;</span></a>
<a name="275"><span class="lineNum"> 275 </span> : : }</a>
<a name="276"><span class="lineNum"> 276 </span> : : </a>
<a name="277"><span class="lineNum"> 277 </span> :<span class="lineCov"> 6 : freq = ((u64)be32_to_cpu(timebase->memory_bus_frequency)) * 1000000ul;</span></a>
<a name="278"><span class="lineNum"> 278 </span> :<span class="lineCov"> 6 : dt_add_property_u64(ram_node, "ibm,memory-bus-frequency", freq);</span></a>
<a name="279"><span class="lineNum"> 279 </span> : : }</a>
<a name="280"><span class="lineNum"> 280 </span> : : </a>
<a name="281"><span class="lineNum"> 281 </span> :<span class="lineCov"> 6 : static void add_size_to_ram_area(struct dt_node *ram_node,</span></a>
<a name="282"><span class="lineNum"> 282 </span> : : const struct HDIF_common_hdr *ramarea)</a>
<a name="283"><span class="lineNum"> 283 </span> : : {</a>
<a name="284"><span class="lineNum"> 284 </span> : : char str[16];</a>
<a name="285"><span class="lineNum"> 285 </span> : : const struct HDIF_ram_area_size *ram_area_sz;</a>
<a name="286"><span class="lineNum"> 286 </span> : : </a>
<a name="287"><span class="lineNum"> 287 </span> : : /* DIMM size */</a>
<a name="288"><span class="lineNum"> 288 </span> :<span class="lineCov"> 6 : ram_area_sz = HDIF_get_idata(ramarea, 3, NULL);</span></a>
<a name="289"><span class="lineNum"> 289 </span> :<span class="lineCov"> 6 : if (!CHECK_SPPTR(ram_area_sz))</span></a>
<a name="290"><span class="lineNum"> 290 </span> :<span class="lineNoCov"> 0 : return;</span></a>
<a name="291"><span class="lineNum"> 291 </span> : : </a>
<a name="292"><span class="lineNum"> 292 </span> :<span class="lineCov"> 6 : memset(str, 0, 16);</span></a>
<a name="293"><span class="lineNum"> 293 </span> :<span class="lineCov"> 6 : snprintf(str, 16, "%d", be32_to_cpu(ram_area_sz->mb));</span></a>
<a name="294"><span class="lineNum"> 294 </span> :<span class="lineCov"> 6 : dt_add_property_string(ram_node, "size", str);</span></a>
<a name="295"><span class="lineNum"> 295 </span> : : }</a>
<a name="296"><span class="lineNum"> 296 </span> : : </a>
<a name="297"><span class="lineNum"> 297 </span> :<span class="lineCov"> 6 : static void vpd_add_ram_area(const struct HDIF_common_hdr *msarea)</span></a>
<a name="298"><span class="lineNum"> 298 </span> : : {</a>
<a name="299"><span class="lineNum"> 299 </span> : : unsigned int i;</a>
<a name="300"><span class="lineNum"> 300 </span> : : unsigned int ram_sz;</a>
<a name="301"><span class="lineNum"> 301 </span> : : const struct HDIF_common_hdr *ramarea;</a>
<a name="302"><span class="lineNum"> 302 </span> : : const struct HDIF_child_ptr *ramptr;</a>
<a name="303"><span class="lineNum"> 303 </span> : : const struct HDIF_ram_area_id *ram_id;</a>
<a name="304"><span class="lineNum"> 304 </span> : : struct dt_node *ram_node;</a>
<a name="305"><span class="lineNum"> 305 </span> : : u32 chip_id;</a>
<a name="306"><span class="lineNum"> 306 </span> : : const void *vpd_blob;</a>
<a name="307"><span class="lineNum"> 307 </span> : : </a>
<a name="308"><span class="lineNum"> 308 </span> :<span class="lineCov"> 6 : ramptr = HDIF_child_arr(msarea, 0);</span></a>
<a name="309"><span class="lineNum"> 309 </span> :<span class="lineCov"> 6 : if (!CHECK_SPPTR(ramptr)) {</span></a>
<a name="310"><span class="lineNum"> 310 </span> :<span class="lineNoCov"> 0 : prerror("MS AREA: No RAM area at %p\n", msarea);</span></a>
<a name="311"><span class="lineNum"> 311 </span> :<span class="lineNoCov"> 0 : return;</span></a>
<a name="312"><span class="lineNum"> 312 </span> : : }</a>
<a name="313"><span class="lineNum"> 313 </span> : : </a>
<a name="314"><span class="lineNum"> 314 </span> :<span class="lineCov"> 12 : for (i = 0; i < be32_to_cpu(ramptr->count); i++) {</span></a>
<a name="315"><span class="lineNum"> 315 </span> :<span class="lineCov"> 6 : ramarea = HDIF_child(msarea, ramptr, i, "RAM ");</span></a>
<a name="316"><span class="lineNum"> 316 </span> :<span class="lineCov"> 6 : if (!CHECK_SPPTR(ramarea))</span></a>
<a name="317"><span class="lineNum"> 317 </span> :<span class="lineNoCov"> 0 : continue;</span></a>
<a name="318"><span class="lineNum"> 318 </span> : : </a>
<a name="319"><span class="lineNum"> 319 </span> :<span class="lineCov"> 6 : ram_id = HDIF_get_idata(ramarea, 2, &ram_sz);</span></a>
<a name="320"><span class="lineNum"> 320 </span> :<span class="lineCov"> 6 : if (!CHECK_SPPTR(ram_id))</span></a>
<a name="321"><span class="lineNum"> 321 </span> :<span class="lineNoCov"> 0 : continue;</span></a>
<a name="322"><span class="lineNum"> 322 </span> : : </a>
<a name="323"><span class="lineNum"> 323 </span> : : /* Don't add VPD for non-existent RAM */</a>
<a name="324"><span class="lineNum"> 324 </span> :<span class="lineCov"> 6 : if (!(be16_to_cpu(ram_id->flags) & RAM_AREA_INSTALLED))</span></a>
<a name="325"><span class="lineNum"> 325 </span> :<span class="lineNoCov"> 0 : continue;</span></a>
<a name="326"><span class="lineNum"> 326 </span> : : </a>
<a name="327"><span class="lineNum"> 327 </span> :<span class="lineCov"> 6 : ram_node = dt_add_vpd_node(ramarea, 0, 1);</span></a>
<a name="328"><span class="lineNum"> 328 </span> :<span class="lineCov"> 6 : if (!ram_node)</span></a>
<a name="329"><span class="lineNum"> 329 </span> :<span class="lineNoCov"> 0 : continue;</span></a>
<a name="330"><span class="lineNum"> 330 </span> : : </a>
<a name="331"><span class="lineNum"> 331 </span> :<span class="lineCov"> 6 : chip_id = add_chip_id_to_ram_area(msarea, ram_node);</span></a>
<a name="332"><span class="lineNum"> 332 </span> :<span class="lineCov"> 6 : add_bus_freq_to_ram_area(ram_node, chip_id);</span></a>
<a name="333"><span class="lineNum"> 333 </span> : : </a>
<a name="334"><span class="lineNum"> 334 </span> :<span class="lineCov"> 6 : if (ram_sz >= offsetof(struct HDIF_ram_area_id, speed)) {</span></a>
<a name="335"><span class="lineNum"> 335 </span> :<span class="lineNoCov"> 0 : dt_add_property_cells(ram_node, "frequency",</span></a>
<a name="336"><span class="lineNum"> 336 </span> : : be32_to_cpu(ram_id->speed)*1000000);</a>
<a name="337"><span class="lineNum"> 337 </span> : : }</a>
<a name="338"><span class="lineNum"> 338 </span> : : </a>
<a name="339"><span class="lineNum"> 339 </span> :<span class="lineCov"> 6 : vpd_blob = HDIF_get_idata(ramarea, 1, &ram_sz);</span></a>
<a name="340"><span class="lineNum"> 340 </span> : : </a>
<a name="341"><span class="lineNum"> 341 </span> : : /* DIMM size */</a>
<a name="342"><span class="lineNum"> 342 </span> :<span class="lineCov"> 6 : add_size_to_ram_area(ram_node, ramarea);</span></a>
<a name="343"><span class="lineNum"> 343 </span> : : /*</a>
<a name="344"><span class="lineNum"> 344 </span> : : * For direct-attached memory we have a DDR "Serial</a>
<a name="345"><span class="lineNum"> 345 </span> : : * Presence Detection" blob rather than an IBM keyword</a>
<a name="346"><span class="lineNum"> 346 </span> : : * blob.</a>
<a name="347"><span class="lineNum"> 347 </span> : : */</a>
<a name="348"><span class="lineNum"> 348 </span> :<span class="lineCov"> 6 : if (!vpd_valid(vpd_blob, ram_sz))</span></a>
<a name="349"><span class="lineNum"> 349 </span> :<span class="lineNoCov"> 0 : dt_add_property(ram_node, "spd", vpd_blob, ram_sz);</span></a>
<a name="350"><span class="lineNum"> 350 </span> : : }</a>
<a name="351"><span class="lineNum"> 351 </span> : : }</a>
<a name="352"><span class="lineNum"> 352 </span> : : </a>
<a name="353"><span class="lineNum"> 353 </span> :<span class="lineNoCov"> 0 : static void vpd_parse_spd(struct dt_node *dimm, const char *spd, u32 size)</span></a>
<a name="354"><span class="lineNum"> 354 </span> : : {</a>
<a name="355"><span class="lineNum"> 355 </span> : : __be16 *vendor;</a>
<a name="356"><span class="lineNum"> 356 </span> : : __be32 *sn;</a>
<a name="357"><span class="lineNum"> 357 </span> : : </a>
<a name="358"><span class="lineNum"> 358 </span> : : /* SPD is too small */</a>
<a name="359"><span class="lineNum"> 359 </span> :<span class="lineNoCov"> 0 : if (size < 512) {</span></a>
<a name="360"><span class="lineNum"> 360 </span> :<span class="lineNoCov"> 0 : prlog(PR_WARNING, "MSVPD: Invalid SPD size. "</span></a>
<a name="361"><span class="lineNum"> 361 </span> : : "Expected 512 bytes, got %d\n", size);</a>
<a name="362"><span class="lineNum"> 362 </span> :<span class="lineNoCov"> 0 : return;</span></a>
<a name="363"><span class="lineNum"> 363 </span> : : }</a>
<a name="364"><span class="lineNum"> 364 </span> : : </a>
<a name="365"><span class="lineNum"> 365 </span> : : /* Supports DDR4 format pasing only */</a>
<a name="366"><span class="lineNum"> 366 </span> :<span class="lineNoCov"> 0 : if (spd[0x2] < 0xc) {</span></a>
<a name="367"><span class="lineNum"> 367 </span> :<span class="lineNoCov"> 0 : prlog(PR_WARNING,</span></a>
<a name="368"><span class="lineNum"> 368 </span> : : "MSVPD: SPD format (%x) not supported\n", spd[0x2]);</a>
<a name="369"><span class="lineNum"> 369 </span> :<span class="lineNoCov"> 0 : return;</span></a>
<a name="370"><span class="lineNum"> 370 </span> : : }</a>
<a name="371"><span class="lineNum"> 371 </span> : : </a>
<a name="372"><span class="lineNum"> 372 </span> :<span class="lineNoCov"> 0 : dt_add_property_string(dimm, "device_type", "memory-dimm-ddr4");</span></a>
<a name="373"><span class="lineNum"> 373 </span> : : </a>
<a name="374"><span class="lineNum"> 374 </span> : : /* DRAM device type */</a>
<a name="375"><span class="lineNum"> 375 </span> :<span class="lineNoCov"> 0 : dt_add_property_cells(dimm, "memory-id", spd[0x2]);</span></a>
<a name="376"><span class="lineNum"> 376 </span> : : </a>
<a name="377"><span class="lineNum"> 377 </span> : : /* Module revision code */</a>
<a name="378"><span class="lineNum"> 378 </span> :<span class="lineNoCov"> 0 : dt_add_property_cells(dimm, "product-version", spd[0x15d]);</span></a>
<a name="379"><span class="lineNum"> 379 </span> : : </a>
<a name="380"><span class="lineNum"> 380 </span> : : /* Serial number */</a>
<a name="381"><span class="lineNum"> 381 </span> :<span class="lineNoCov"> 0 : sn = (__be32 *)&spd[0x145];</span></a>
<a name="382"><span class="lineNum"> 382 </span> :<span class="lineNoCov"> 0 : dt_add_property_cells(dimm, "serial-number", be32_to_cpu(*sn));</span></a>
<a name="383"><span class="lineNum"> 383 </span> : : </a>
<a name="384"><span class="lineNum"> 384 </span> : : /* Part number */</a>
<a name="385"><span class="lineNum"> 385 </span> :<span class="lineNoCov"> 0 : dt_add_property_nstr(dimm, "part-number", &spd[0x149], 20);</span></a>
<a name="386"><span class="lineNum"> 386 </span> : : </a>
<a name="387"><span class="lineNum"> 387 </span> : : /* Module manufacturer ID */</a>
<a name="388"><span class="lineNum"> 388 </span> :<span class="lineNoCov"> 0 : vendor = (__be16 *)&spd[0x140];</span></a>
<a name="389"><span class="lineNum"> 389 </span> :<span class="lineNoCov"> 0 : dt_add_property_cells(dimm, "manufacturer-id", be16_to_cpu(*vendor));</span></a>
<a name="390"><span class="lineNum"> 390 </span> : : }</a>
<a name="391"><span class="lineNum"> 391 </span> : : </a>
<a name="392"><span class="lineNum"> 392 </span> :<span class="lineNoCov"> 0 : static void add_dimm_info(struct dt_node *parent,</span></a>
<a name="393"><span class="lineNum"> 393 </span> : : const struct HDIF_common_hdr *msarea)</a>
<a name="394"><span class="lineNum"> 394 </span> : : {</a>
<a name="395"><span class="lineNum"> 395 </span> : : unsigned int i, size;</a>
<a name="396"><span class="lineNum"> 396 </span> : : const struct HDIF_child_ptr *ramptr;</a>
<a name="397"><span class="lineNum"> 397 </span> : : const struct HDIF_common_hdr *ramarea;</a>
<a name="398"><span class="lineNum"> 398 </span> : : const struct spira_fru_id *fru_id;</a>
<a name="399"><span class="lineNum"> 399 </span> : : const struct HDIF_ram_area_id *ram_id;</a>
<a name="400"><span class="lineNum"> 400 </span> : : const struct HDIF_ram_area_size *ram_area_sz;</a>
<a name="401"><span class="lineNum"> 401 </span> : : struct dt_node *dimm;</a>
<a name="402"><span class="lineNum"> 402 </span> : : const void *vpd_blob;</a>
<a name="403"><span class="lineNum"> 403 </span> : : </a>
<a name="404"><span class="lineNum"> 404 </span> :<span class="lineNoCov"> 0 : ramptr = HDIF_child_arr(msarea, 0);</span></a>
<a name="405"><span class="lineNum"> 405 </span> :<span class="lineNoCov"> 0 : if (!CHECK_SPPTR(ramptr)) {</span></a>
<a name="406"><span class="lineNum"> 406 </span> :<span class="lineNoCov"> 0 : prerror("MS AREA: No RAM area at %p\n", msarea);</span></a>
<a name="407"><span class="lineNum"> 407 </span> :<span class="lineNoCov"> 0 : return;</span></a>
<a name="408"><span class="lineNum"> 408 </span> : : }</a>
<a name="409"><span class="lineNum"> 409 </span> : : </a>
<a name="410"><span class="lineNum"> 410 </span> :<span class="lineNoCov"> 0 : for (i = 0; i < be32_to_cpu(ramptr->count); i++) {</span></a>
<a name="411"><span class="lineNum"> 411 </span> :<span class="lineNoCov"> 0 : ramarea = HDIF_child(msarea, ramptr, i, "RAM ");</span></a>
<a name="412"><span class="lineNum"> 412 </span> :<span class="lineNoCov"> 0 : if (!CHECK_SPPTR(ramarea))</span></a>
<a name="413"><span class="lineNum"> 413 </span> :<span class="lineNoCov"> 0 : continue;</span></a>
<a name="414"><span class="lineNum"> 414 </span> : : </a>
<a name="415"><span class="lineNum"> 415 </span> :<span class="lineNoCov"> 0 : fru_id = HDIF_get_idata(ramarea, 0, NULL);</span></a>
<a name="416"><span class="lineNum"> 416 </span> :<span class="lineNoCov"> 0 : if (!fru_id)</span></a>
<a name="417"><span class="lineNum"> 417 </span> :<span class="lineNoCov"> 0 : continue;</span></a>
<a name="418"><span class="lineNum"> 418 </span> : : </a>
<a name="419"><span class="lineNum"> 419 </span> : : /* Use Resource ID to add dimm node */</a>
<a name="420"><span class="lineNum"> 420 </span> :<span class="lineNoCov"> 0 : dimm = dt_find_by_name_addr(parent, "dimm",</span></a>
<a name="421"><span class="lineNum"> 421 </span> :<span class="lineNoCov"> 0 : be16_to_cpu(fru_id->rsrc_id));</span></a>
<a name="422"><span class="lineNum"> 422 </span> :<span class="lineNoCov"> 0 : if (dimm)</span></a>
<a name="423"><span class="lineNum"> 423 </span> :<span class="lineNoCov"> 0 : continue;</span></a>
<a name="424"><span class="lineNum"> 424 </span> :<span class="lineNoCov"> 0 : dimm= dt_new_addr(parent, "dimm", be16_to_cpu(fru_id->rsrc_id));</span></a>
<a name="425"><span class="lineNum"> 425 </span> :<span class="lineNoCov"> 0 : assert(dimm);</span></a>
<a name="426"><span class="lineNum"> 426 </span> :<span class="lineNoCov"> 0 : dt_add_property_cells(dimm, "reg", be16_to_cpu(fru_id->rsrc_id));</span></a>
<a name="427"><span class="lineNum"> 427 </span> : : </a>
<a name="428"><span class="lineNum"> 428 </span> : : /* Add location code */</a>
<a name="429"><span class="lineNum"> 429 </span> :<span class="lineNoCov"> 0 : slca_vpd_add_loc_code(dimm, be16_to_cpu(fru_id->slca_index));</span></a>
<a name="430"><span class="lineNum"> 430 </span> : : </a>
<a name="431"><span class="lineNum"> 431 </span> : : /* DIMM size */</a>
<a name="432"><span class="lineNum"> 432 </span> :<span class="lineNoCov"> 0 : ram_area_sz = HDIF_get_idata(ramarea, 3, NULL);</span></a>
<a name="433"><span class="lineNum"> 433 </span> :<span class="lineNoCov"> 0 : if (!CHECK_SPPTR(ram_area_sz))</span></a>
<a name="434"><span class="lineNum"> 434 </span> :<span class="lineNoCov"> 0 : continue;</span></a>
<a name="435"><span class="lineNum"> 435 </span> :<span class="lineNoCov"> 0 : dt_add_property_cells(dimm, "size", be32_to_cpu(ram_area_sz->mb));</span></a>
<a name="436"><span class="lineNum"> 436 </span> : : </a>
<a name="437"><span class="lineNum"> 437 </span> : : /* DIMM state */</a>
<a name="438"><span class="lineNum"> 438 </span> :<span class="lineNoCov"> 0 : ram_id = HDIF_get_idata(ramarea, 2, NULL);</span></a>
<a name="439"><span class="lineNum"> 439 </span> :<span class="lineNoCov"> 0 : if (!CHECK_SPPTR(ram_id))</span></a>
<a name="440"><span class="lineNum"> 440 </span> :<span class="lineNoCov"> 0 : continue;</span></a>
<a name="441"><span class="lineNum"> 441 </span> : : </a>
<a name="442"><span class="lineNum"> 442 </span> :<span class="lineNoCov"> 0 : if ((be16_to_cpu(ram_id->flags) & RAM_AREA_INSTALLED) &&</span></a>
<a name="443"><span class="lineNum"> 443 </span> :<span class="lineNoCov"> 0 : (be16_to_cpu(ram_id->flags) & RAM_AREA_FUNCTIONAL))</span></a>
<a name="444"><span class="lineNum"> 444 </span> :<span class="lineNoCov"> 0 : dt_add_property_string(dimm, "status", "okay");</span></a>
<a name="445"><span class="lineNum"> 445 </span> : : else</a>
<a name="446"><span class="lineNum"> 446 </span> :<span class="lineNoCov"> 0 : dt_add_property_string(dimm, "status", "disabled");</span></a>
<a name="447"><span class="lineNum"> 447 </span> : : </a>
<a name="448"><span class="lineNum"> 448 </span> :<span class="lineNoCov"> 0 : vpd_blob = HDIF_get_idata(ramarea, 1, &size);</span></a>
<a name="449"><span class="lineNum"> 449 </span> :<span class="lineNoCov"> 0 : if (!CHECK_SPPTR(vpd_blob))</span></a>
<a name="450"><span class="lineNum"> 450 </span> :<span class="lineNoCov"> 0 : continue;</span></a>
<a name="451"><span class="lineNum"> 451 </span> :<span class="lineNoCov"> 0 : if (vpd_valid(vpd_blob, size))</span></a>
<a name="452"><span class="lineNum"> 452 </span> :<span class="lineNoCov"> 0 : vpd_data_parse(dimm, vpd_blob, size);</span></a>
<a name="453"><span class="lineNum"> 453 </span> : : else</a>
<a name="454"><span class="lineNum"> 454 </span> :<span class="lineNoCov"> 0 : vpd_parse_spd(dimm, vpd_blob, size);</span></a>
<a name="455"><span class="lineNum"> 455 </span> : : }</a>
<a name="456"><span class="lineNum"> 456 </span> : : }</a>
<a name="457"><span class="lineNum"> 457 </span> : : </a>
<a name="458"><span class="lineNum"> 458 </span> :<span class="lineNoCov"> 0 : static inline void dt_add_mem_reg_property(struct dt_node *node, u64 addr)</span></a>
<a name="459"><span class="lineNum"> 459 </span> : : {</a>
<a name="460"><span class="lineNum"> 460 </span> :<span class="lineNoCov"> 0 : dt_add_property_cells(node, "#address-cells", 1);</span></a>
<a name="461"><span class="lineNum"> 461 </span> :<span class="lineNoCov"> 0 : dt_add_property_cells(node, "#size-cells", 0);</span></a>
<a name="462"><span class="lineNum"> 462 </span> :<span class="lineNoCov"> 0 : dt_add_property_cells(node, "reg", addr);</span></a>
<a name="463"><span class="lineNum"> 463 </span> :<span class="lineNoCov"> 0 : }</span></a>
<a name="464"><span class="lineNum"> 464 </span> : : </a>
<a name="465"><span class="lineNum"> 465 </span> :<span class="lineNoCov"> 0 : static void add_memory_controller_p9n(const struct HDIF_common_hdr *msarea,</span></a>
<a name="466"><span class="lineNum"> 466 </span> : : const struct HDIF_ms_area_address_range *arange)</a>
<a name="467"><span class="lineNum"> 467 </span> : : {</a>
<a name="468"><span class="lineNum"> 468 </span> : : uint32_t chip_id;</a>
<a name="469"><span class="lineNum"> 469 </span> : : uint32_t controller_id, mcbist_id, mcs_id, mca_id;</a>
<a name="470"><span class="lineNum"> 470 </span> : : struct dt_node *xscom, *mcbist, *mcs, *mca;</a>
<a name="471"><span class="lineNum"> 471 </span> : : </a>
<a name="472"><span class="lineNum"> 472 </span> :<span class="lineNoCov"> 0 : chip_id = pcid_to_chip_id(be32_to_cpu(arange->chip));</span></a>
<a name="473"><span class="lineNum"> 473 </span> :<span class="lineNoCov"> 0 : controller_id = be32_to_cpu(arange->controller_id);</span></a>
<a name="474"><span class="lineNum"> 474 </span> :<span class="lineNoCov"> 0 : xscom = find_xscom_for_chip(chip_id);</span></a>
<a name="475"><span class="lineNum"> 475 </span> :<span class="lineNoCov"> 0 : if (!xscom) {</span></a>
<a name="476"><span class="lineNum"> 476 </span> :<span class="lineNoCov"> 0 : prlog(PR_WARNING,</span></a>
<a name="477"><span class="lineNum"> 477 </span> : : "MS AREA: Can't find XSCOM for chip %d\n", chip_id);</a>
<a name="478"><span class="lineNum"> 478 </span> :<span class="lineNoCov"> 0 : return;</span></a>
<a name="479"><span class="lineNum"> 479 </span> : : }</a>
<a name="480"><span class="lineNum"> 480 </span> : : </a>
<a name="481"><span class="lineNum"> 481 </span> :<span class="lineNoCov"> 0 : mcbist_id = MS_CONTROLLER_MCBIST_ID(controller_id);</span></a>
<a name="482"><span class="lineNum"> 482 </span> :<span class="lineNoCov"> 0 : mcbist = dt_find_by_name_addr(xscom, "mcbist", mcbist_id);</span></a>
<a name="483"><span class="lineNum"> 483 </span> :<span class="lineNoCov"> 0 : if (!mcbist) {</span></a>
<a name="484"><span class="lineNum"> 484 </span> :<span class="lineNoCov"> 0 : mcbist = dt_new_addr(xscom, "mcbist", mcbist_id);</span></a>
<a name="485"><span class="lineNum"> 485 </span> :<span class="lineNoCov"> 0 : assert(mcbist);</span></a>
<a name="486"><span class="lineNum"> 486 </span> :<span class="lineNoCov"> 0 : dt_add_property_cells(mcbist, "#address-cells", 1);</span></a>
<a name="487"><span class="lineNum"> 487 </span> :<span class="lineNoCov"> 0 : dt_add_property_cells(mcbist, "#size-cells", 0);</span></a>
<a name="488"><span class="lineNum"> 488 </span> :<span class="lineNoCov"> 0 : dt_add_property_cells(mcbist, "reg", mcbist_id, 0);</span></a>
<a name="489"><span class="lineNum"> 489 </span> : : }</a>
<a name="490"><span class="lineNum"> 490 </span> : : </a>
<a name="491"><span class="lineNum"> 491 </span> :<span class="lineNoCov"> 0 : mcs_id = MS_CONTROLLER_MCS_ID(controller_id);</span></a>
<a name="492"><span class="lineNum"> 492 </span> :<span class="lineNoCov"> 0 : mcs = dt_find_by_name_addr(mcbist, "mcs", mcs_id);</span></a>
<a name="493"><span class="lineNum"> 493 </span> :<span class="lineNoCov"> 0 : if (!mcs) {</span></a>
<a name="494"><span class="lineNum"> 494 </span> :<span class="lineNoCov"> 0 : mcs = dt_new_addr(mcbist, "mcs", mcs_id);</span></a>
<a name="495"><span class="lineNum"> 495 </span> :<span class="lineNoCov"> 0 : assert(mcs);</span></a>
<a name="496"><span class="lineNum"> 496 </span> :<span class="lineNoCov"> 0 : dt_add_mem_reg_property(mcs, mcs_id);</span></a>
<a name="497"><span class="lineNum"> 497 </span> : : }</a>
<a name="498"><span class="lineNum"> 498 </span> : : </a>
<a name="499"><span class="lineNum"> 499 </span> :<span class="lineNoCov"> 0 : mca_id = MS_CONTROLLER_MCA_ID(controller_id);</span></a>
<a name="500"><span class="lineNum"> 500 </span> :<span class="lineNoCov"> 0 : mca = dt_find_by_name_addr(mcs, "mca", mca_id);</span></a>
<a name="501"><span class="lineNum"> 501 </span> :<span class="lineNoCov"> 0 : if (!mca) {</span></a>
<a name="502"><span class="lineNum"> 502 </span> :<span class="lineNoCov"> 0 : mca = dt_new_addr(mcs, "mca", mca_id);</span></a>
<a name="503"><span class="lineNum"> 503 </span> :<span class="lineNoCov"> 0 : assert(mca);</span></a>
<a name="504"><span class="lineNum"> 504 </span> :<span class="lineNoCov"> 0 : dt_add_mem_reg_property(mca, mca_id);</span></a>
<a name="505"><span class="lineNum"> 505 </span> : : }</a>
<a name="506"><span class="lineNum"> 506 </span> : : </a>
<a name="507"><span class="lineNum"> 507 </span> :<span class="lineNoCov"> 0 : add_dimm_info(mca, msarea);</span></a>
<a name="508"><span class="lineNum"> 508 </span> : : }</a>
<a name="509"><span class="lineNum"> 509 </span> : : </a>
<a name="510"><span class="lineNum"> 510 </span> :<span class="lineCov"> 6 : static void add_memory_buffer_mmio(const struct HDIF_common_hdr *msarea)</span></a>
<a name="511"><span class="lineNum"> 511 </span> : : {</a>
<a name="512"><span class="lineNum"> 512 </span> : : const struct HDIF_ms_area_ocmb_mmio *mmio;</a>
<a name="513"><span class="lineNum"> 513 </span> :<span class="lineCov"> 6 : uint64_t min_addr = ~0ull, hbrt_id = 0;</span></a>
<a name="514"><span class="lineNum"> 514 </span> : : const struct HDIF_array_hdr *array;</a>
<a name="515"><span class="lineNum"> 515 </span> :<span class="lineCov"> 6 : unsigned int i, count, ranges = 0;</span></a>
<a name="516"><span class="lineNum"> 516 </span> : : struct dt_node *membuf;</a>
<a name="517"><span class="lineNum"> 517 </span> : : beint64_t *reg, *flags;</a>
<a name="518"><span class="lineNum"> 518 </span> : : </a>
<a name="519"><span class="lineNum"> 519 </span> :<span class="lineCov"> 6 : if (proc_gen <= proc_gen_p9 && PVR_TYPE(mfspr(SPR_PVR)) != PVR_TYPE_P9P)</span></a>
<a name="520"><span class="lineNum"> 520 </span> :<span class="lineCov"> 6 : return;</span></a>
<a name="521"><span class="lineNum"> 521 </span> : : </a>
<a name="522"><span class="lineNum"> 522 </span> :<span class="lineNoCov"> 0 : if (be16_to_cpu(msarea->version) < 0x50) {</span></a>
<a name="523"><span class="lineNum"> 523 </span> :<span class="lineNoCov"> 0 : prlog(PR_WARNING, "MS AREA: Inconsistent MSAREA version %x for P9P system",</span></a>
<a name="524"><span class="lineNum"> 524 </span> : : be16_to_cpu(msarea->version));</a>
<a name="525"><span class="lineNum"> 525 </span> :<span class="lineNoCov"> 0 : return;</span></a>
<a name="526"><span class="lineNum"> 526 </span> : : }</a>
<a name="527"><span class="lineNum"> 527 </span> : : </a>
<a name="528"><span class="lineNum"> 528 </span> :<span class="lineNoCov"> 0 : array = HDIF_get_iarray(msarea, MSAREA_IDATA_MMIO_IDX, &count);</span></a>
<a name="529"><span class="lineNum"> 529 </span> :<span class="lineNoCov"> 0 : if (!array || count <= 0) {</span></a>
<a name="530"><span class="lineNum"> 530 </span> :<span class="lineNoCov"> 0 : prerror("MS AREA: No OCMB MMIO array at MS Area %p\n", msarea);</span></a>
<a name="531"><span class="lineNum"> 531 </span> :<span class="lineNoCov"> 0 : return;</span></a>
<a name="532"><span class="lineNum"> 532 </span> : : }</a>
<a name="533"><span class="lineNum"> 533 </span> : : </a>
<a name="534"><span class="lineNum"> 534 </span> :<span class="lineNoCov"> 0 : reg = zalloc(count * 2 * sizeof(*reg));</span></a>
<a name="535"><span class="lineNum"> 535 </span> :<span class="lineNoCov"> 0 : flags = zalloc(count * sizeof(*flags));</span></a>
<a name="536"><span class="lineNum"> 536 </span> : : </a>
<a name="537"><span class="lineNum"> 537 </span> : : /* grab the hbrt id from the first range. */</a>
<a name="538"><span class="lineNum"> 538 </span> :<span class="lineNoCov"> 0 : HDIF_iarray_for_each(array, i, mmio) {</span></a>
<a name="539"><span class="lineNum"> 539 </span> :<span class="lineNoCov"> 0 : hbrt_id = be64_to_cpu(mmio->hbrt_id);</span></a>
<a name="540"><span class="lineNum"> 540 </span> :<span class="lineNoCov"> 0 : break;</span></a>
<a name="541"><span class="lineNum"> 541 </span> : : }</a>
<a name="542"><span class="lineNum"> 542 </span> : : </a>
<a name="543"><span class="lineNum"> 543 </span> :<span class="lineNoCov"> 0 : prlog(PR_DEBUG, "Adding memory buffer MMIO ranges for %"PRIx64"\n",</span></a>
<a name="544"><span class="lineNum"> 544 </span> : : hbrt_id);</a>
<a name="545"><span class="lineNum"> 545 </span> : : </a>
<a name="546"><span class="lineNum"> 546 </span> :<span class="lineNoCov"> 0 : HDIF_iarray_for_each(array, i, mmio) {</span></a>
<a name="547"><span class="lineNum"> 547 </span> : : uint64_t start, end;</a>
<a name="548"><span class="lineNum"> 548 </span> : : </a>
<a name="549"><span class="lineNum"> 549 </span> :<span class="lineNoCov"> 0 : if (hbrt_id != be64_to_cpu(mmio->hbrt_id)) {</span></a>
<a name="550"><span class="lineNum"> 550 </span> :<span class="lineNoCov"> 0 : prerror("HBRT ID mismatch!\n");</span></a>
<a name="551"><span class="lineNum"> 551 </span> :<span class="lineNoCov"> 0 : continue;</span></a>
<a name="552"><span class="lineNum"> 552 </span> : : }</a>
<a name="553"><span class="lineNum"> 553 </span> : : </a>
<a name="554"><span class="lineNum"> 554 </span> :<span class="lineNoCov"> 0 : start = cleanup_addr(be64_to_cpu(mmio->range_start));</span></a>
<a name="555"><span class="lineNum"> 555 </span> :<span class="lineNoCov"> 0 : end = cleanup_addr(be64_to_cpu(mmio->range_end));</span></a>
<a name="556"><span class="lineNum"> 556 </span> :<span class="lineNoCov"> 0 : if (start < min_addr)</span></a>
<a name="557"><span class="lineNum"> 557 </span> :<span class="lineNoCov"> 0 : min_addr = start;</span></a>
<a name="558"><span class="lineNum"> 558 </span> : : </a>
<a name="559"><span class="lineNum"> 559 </span> :<span class="lineNoCov"> 0 : prlog(PR_DEBUG, " %"PRIx64" - [%016"PRIx64"-%016"PRIx64")\n",</span></a>
<a name="560"><span class="lineNum"> 560 </span> : : hbrt_id, start, end);</a>
<a name="561"><span class="lineNum"> 561 </span> : : </a>
<a name="562"><span class="lineNum"> 562 </span> :<span class="lineNoCov"> 0 : reg[2 * ranges ] = cpu_to_be64(start);</span></a>
<a name="563"><span class="lineNum"> 563 </span> :<span class="lineNoCov"> 0 : reg[2 * ranges + 1] = cpu_to_be64(end - start + 1);</span></a>
<a name="564"><span class="lineNum"> 564 </span> :<span class="lineNoCov"> 0 : flags[ranges] = mmio->flags; /* both are BE */</span></a>
<a name="565"><span class="lineNum"> 565 </span> :<span class="lineNoCov"> 0 : ranges++;</span></a>
<a name="566"><span class="lineNum"> 566 </span> : : }</a>
<a name="567"><span class="lineNum"> 567 </span> : : </a>
<a name="568"><span class="lineNum"> 568 </span> :<span class="lineNoCov"> 0 : membuf = dt_find_by_name_addr(dt_root, "memory-buffer", min_addr);</span></a>
<a name="569"><span class="lineNum"> 569 </span> :<span class="lineNoCov"> 0 : if (membuf) {</span></a>
<a name="570"><span class="lineNum"> 570 </span> :<span class="lineNoCov"> 0 : prerror("attempted to duplicate %s\n", membuf->name);</span></a>
<a name="571"><span class="lineNum"> 571 </span> :<span class="lineNoCov"> 0 : goto out;</span></a>
<a name="572"><span class="lineNum"> 572 </span> : : }</a>
<a name="573"><span class="lineNum"> 573 </span> : : </a>
<a name="574"><span class="lineNum"> 574 </span> :<span class="lineNoCov"> 0 : membuf = dt_new_addr(dt_root, "memory-buffer", min_addr);</span></a>
<a name="575"><span class="lineNum"> 575 </span> :<span class="lineNoCov"> 0 : assert(membuf);</span></a>
<a name="576"><span class="lineNum"> 576 </span> : : </a>
<a name="577"><span class="lineNum"> 577 </span> :<span class="lineNoCov"> 0 : dt_add_property_string(membuf, "compatible", "ibm,explorer");</span></a>
<a name="578"><span class="lineNum"> 578 </span> :<span class="lineNoCov"> 0 : dt_add_property_cells(membuf, "ibm,chip-id", hbrt_id);</span></a>
<a name="579"><span class="lineNum"> 579 </span> : : </a>
<a name="580"><span class="lineNum"> 580 </span> : : /*</a>
<a name="581"><span class="lineNum"> 581 </span> : : * FIXME: We should probably be sorting the address ranges based</a>
<a name="582"><span class="lineNum"> 582 </span> : : * on the starting address.</a>
<a name="583"><span class="lineNum"> 583 </span> : : */</a>
<a name="584"><span class="lineNum"> 584 </span> :<span class="lineNoCov"> 0 : dt_add_property(membuf, "reg", reg, sizeof(*reg) * 2 * ranges);</span></a>
<a name="585"><span class="lineNum"> 585 </span> :<span class="lineNoCov"> 0 : dt_add_property(membuf, "flags", flags, sizeof(*flags) * ranges);</span></a>
<a name="586"><span class="lineNum"> 586 </span> : : </a>
<a name="587"><span class="lineNum"> 587 </span> :<span class="lineNoCov"> 0 : out:</span></a>
<a name="588"><span class="lineNum"> 588 </span> :<span class="lineNoCov"> 0 : free(flags);</span></a>
<a name="589"><span class="lineNum"> 589 </span> :<span class="lineNoCov"> 0 : free(reg);</span></a>
<a name="590"><span class="lineNum"> 590 </span> : : }</a>
<a name="591"><span class="lineNum"> 591 </span> : : </a>
<a name="592"><span class="lineNum"> 592 </span> :<span class="lineCov"> 6 : static void add_memory_controller(const struct HDIF_common_hdr *msarea,</span></a>
<a name="593"><span class="lineNum"> 593 </span> : : const struct HDIF_ms_area_address_range *arange)</a>
<a name="594"><span class="lineNum"> 594 </span> : : {</a>
<a name="595"><span class="lineNum"> 595 </span> :<span class="lineCov"> 6 : const uint32_t version = PVR_TYPE(mfspr(SPR_PVR));</span></a>
<a name="596"><span class="lineNum"> 596 </span> : : /*</a>
<a name="597"><span class="lineNum"> 597 </span> : : * Memory hierarchy may change between processor version. Presently</a>
<a name="598"><span class="lineNum"> 598 </span> : : * it's only creating memory hierarchy for P9 (Nimbus) and P9P (Axone).</a>
<a name="599"><span class="lineNum"> 599 </span> : : */</a>
<a name="600"><span class="lineNum"> 600 </span> : : </a>
<a name="601"><span class="lineNum"> 601 </span> :<span class="lineCov"> 6 : if (version == PVR_TYPE_P9)</span></a>
<a name="602"><span class="lineNum"> 602 </span> :<span class="lineNoCov"> 0 : return add_memory_controller_p9n(msarea, arange);</span></a>
<a name="603"><span class="lineNum"> 603 </span> :<span class="lineCov"> 6 : else if (version == PVR_TYPE_P9P)</span></a>
<a name="604"><span class="lineNum"> 604 </span> :<span class="lineNoCov"> 0 : return; //return add_memory_controller_p9p(msarea, arange);</span></a>
<a name="605"><span class="lineNum"> 605 </span> : : else</a>
<a name="606"><span class="lineNum"> 606 </span> :<span class="lineCov"> 6 : return;</span></a>
<a name="607"><span class="lineNum"> 607 </span> : : }</a>
<a name="608"><span class="lineNum"> 608 </span> : : </a>
<a name="609"><span class="lineNum"> 609 </span> :<span class="lineCov"> 2 : static void get_msareas(struct dt_node *root,</span></a>
<a name="610"><span class="lineNum"> 610 </span> : : const struct HDIF_common_hdr *ms_vpd)</a>
<a name="611"><span class="lineNum"> 611 </span> : : {</a>
<a name="612"><span class="lineNum"> 612 </span> : : unsigned int i;</a>
<a name="613"><span class="lineNum"> 613 </span> : : const struct HDIF_child_ptr *msptr;</a>
<a name="614"><span class="lineNum"> 614 </span> : : </a>
<a name="615"><span class="lineNum"> 615 </span> : : /* First childptr refers to msareas. */</a>
<a name="616"><span class="lineNum"> 616 </span> :<span class="lineCov"> 2 : msptr = HDIF_child_arr(ms_vpd, MSVPD_CHILD_MS_AREAS);</span></a>
<a name="617"><span class="lineNum"> 617 </span> :<span class="lineCov"> 2 : if (!CHECK_SPPTR(msptr)) {</span></a>
<a name="618"><span class="lineNum"> 618 </span> :<span class="lineNoCov"> 0 : prerror("MS VPD: no children at %p\n", ms_vpd);</span></a>
<a name="619"><span class="lineNum"> 619 </span> :<span class="lineNoCov"> 0 : return;</span></a>
<a name="620"><span class="lineNum"> 620 </span> : : }</a>
<a name="621"><span class="lineNum"> 621 </span> : : </a>
<a name="622"><span class="lineNum"> 622 </span> :<span class="lineCov"> 8 : for (i = 0; i < be32_to_cpu(msptr->count); i++) {</span></a>
<a name="623"><span class="lineNum"> 623 </span> : : const struct HDIF_common_hdr *msarea;</a>
<a name="624"><span class="lineNum"> 624 </span> : : const struct HDIF_array_hdr *arr;</a>
<a name="625"><span class="lineNum"> 625 </span> : : const struct HDIF_ms_area_address_range *arange;</a>
<a name="626"><span class="lineNum"> 626 </span> : : const struct HDIF_ms_area_id *id;</a>
<a name="627"><span class="lineNum"> 627 </span> : : const void *fruid;</a>
<a name="628"><span class="lineNum"> 628 </span> : : unsigned int size, j, offset;</a>
<a name="629"><span class="lineNum"> 629 </span> : : u16 flags;</a>
<a name="630"><span class="lineNum"> 630 </span> : : </a>
<a name="631"><span class="lineNum"> 631 </span> :<span class="lineCov"> 6 : msarea = HDIF_child(ms_vpd, msptr, i, "MSAREA");</span></a>
<a name="632"><span class="lineNum"> 632 </span> :<span class="lineCov"> 6 : if (!CHECK_SPPTR(msarea))</span></a>
<a name="633"><span class="lineNum"> 633 </span> :<span class="lineNoCov"> 0 : return;</span></a>
<a name="634"><span class="lineNum"> 634 </span> : : </a>
<a name="635"><span class="lineNum"> 635 </span> :<span class="lineCov"> 6 : id = HDIF_get_idata(msarea, 2, &size);</span></a>
<a name="636"><span class="lineNum"> 636 </span> :<span class="lineCov"> 6 : if (!CHECK_SPPTR(id))</span></a>
<a name="637"><span class="lineNum"> 637 </span> :<span class="lineNoCov"> 0 : return;</span></a>
<a name="638"><span class="lineNum"> 638 </span> :<span class="lineCov"> 6 : if (size < sizeof(*id)) {</span></a>
<a name="639"><span class="lineNum"> 639 </span> :<span class="lineNoCov"> 0 : prerror("MS VPD: %p msarea #%i id size too small!\n",</span></a>
<a name="640"><span class="lineNum"> 640 </span> : : ms_vpd, i);</a>
<a name="641"><span class="lineNum"> 641 </span> :<span class="lineNoCov"> 0 : return;</span></a>
<a name="642"><span class="lineNum"> 642 </span> : : }</a>
<a name="643"><span class="lineNum"> 643 </span> : : </a>
<a name="644"><span class="lineNum"> 644 </span> :<span class="lineCov"> 6 : flags = be16_to_cpu(id->flags);</span></a>
<a name="645"><span class="lineNum"> 645 </span> :<span class="lineCov"> 6 : prlog(PR_DEBUG, "MS VPD: %p, area %i: %s %s %s\n",</span></a>
<a name="646"><span class="lineNum"> 646 </span> : : ms_vpd, i,</a>
<a name="647"><span class="lineNum"> 647 </span> : : flags & MS_AREA_INSTALLED ?</a>
<a name="648"><span class="lineNum"> 648 </span> : : "installed" : "not installed",</a>
<a name="649"><span class="lineNum"> 649 </span> : : flags & MS_AREA_FUNCTIONAL ?</a>
<a name="650"><span class="lineNum"> 650 </span> : : "functional" : "not functional",</a>
<a name="651"><span class="lineNum"> 651 </span> : : flags & MS_AREA_SHARED ?</a>
<a name="652"><span class="lineNum"> 652 </span> : : "shared" : "not shared");</a>
<a name="653"><span class="lineNum"> 653 </span> : : </a>
<a name="654"><span class="lineNum"> 654 </span> :<span class="lineCov"> 6 : if ((flags & (MS_AREA_INSTALLED|MS_AREA_FUNCTIONAL))</span></a>
<a name="655"><span class="lineNum"> 655 </span> : : != (MS_AREA_INSTALLED|MS_AREA_FUNCTIONAL))</a>
<a name="656"><span class="lineNum"> 656 </span> :<span class="lineNoCov"> 0 : continue;</span></a>
<a name="657"><span class="lineNum"> 657 </span> : : </a>
<a name="658"><span class="lineNum"> 658 </span> :<span class="lineCov"> 6 : arr = HDIF_get_idata(msarea, 4, &size);</span></a>
<a name="659"><span class="lineNum"> 659 </span> :<span class="lineCov"> 6 : if (!CHECK_SPPTR(arr))</span></a>
<a name="660"><span class="lineNum"> 660 </span> :<span class="lineNoCov"> 0 : continue;</span></a>
<a name="661"><span class="lineNum"> 661 </span> : : </a>
<a name="662"><span class="lineNum"> 662 </span> :<span class="lineCov"> 6 : if (size < sizeof(*arr)) {</span></a>
<a name="663"><span class="lineNum"> 663 </span> :<span class="lineNoCov"> 0 : prerror("MS VPD: %p msarea #%i arr size too small!\n",</span></a>
<a name="664"><span class="lineNum"> 664 </span> : : ms_vpd, i);</a>
<a name="665"><span class="lineNum"> 665 </span> :<span class="lineNoCov"> 0 : return;</span></a>
<a name="666"><span class="lineNum"> 666 </span> : : }</a>
<a name="667"><span class="lineNum"> 667 </span> : : </a>
<a name="668"><span class="lineNum"> 668 </span> :<span class="lineCov"> 6 : offset = offsetof(struct HDIF_ms_area_address_range, mirror_start);</span></a>
<a name="669"><span class="lineNum"> 669 </span> :<span class="lineCov"> 6 : if (be32_to_cpu(arr->eactsz) < offset) {</span></a>
<a name="670"><span class="lineNum"> 670 </span> :<span class="lineNoCov"> 0 : prerror("MS VPD: %p msarea #%i arange size too small!\n",</span></a>
<a name="671"><span class="lineNum"> 671 </span> : : ms_vpd, i);</a>
<a name="672"><span class="lineNum"> 672 </span> :<span class="lineNoCov"> 0 : return;</span></a>
<a name="673"><span class="lineNum"> 673 </span> : : }</a>
<a name="674"><span class="lineNum"> 674 </span> : : </a>
<a name="675"><span class="lineNum"> 675 </span> :<span class="lineCov"> 6 : fruid = HDIF_get_idata(msarea, 0, &size);</span></a>
<a name="676"><span class="lineNum"> 676 </span> :<span class="lineCov"> 6 : if (!CHECK_SPPTR(fruid))</span></a>
<a name="677"><span class="lineNum"> 677 </span> :<span class="lineNoCov"> 0 : return;</span></a>
<a name="678"><span class="lineNum"> 678 </span> : : </a>
<a name="679"><span class="lineNum"> 679 </span> : : /* Add Raiser card VPD */</a>
<a name="680"><span class="lineNum"> 680 </span> :<span class="lineCov"> 6 : if (be16_to_cpu(id->parent_type) & MS_PTYPE_RISER_CARD)</span></a>
<a name="681"><span class="lineNum"> 681 </span> :<span class="lineNoCov"> 0 : dt_add_vpd_node(msarea, 0, 1);</span></a>
<a name="682"><span class="lineNum"> 682 </span> : : </a>
<a name="683"><span class="lineNum"> 683 </span> : : /* Add RAM Area VPD */</a>
<a name="684"><span class="lineNum"> 684 </span> :<span class="lineCov"> 6 : vpd_add_ram_area(msarea);</span></a>
<a name="685"><span class="lineNum"> 685 </span> : : </a>
<a name="686"><span class="lineNum"> 686 </span> :<span class="lineCov"> 6 : add_memory_buffer_mmio(msarea);</span></a>
<a name="687"><span class="lineNum"> 687 </span> : : </a>
<a name="688"><span class="lineNum"> 688 </span> : : /* This offset is from the arr, not the header! */</a>
<a name="689"><span class="lineNum"> 689 </span> :<span class="lineCov"> 6 : arange = (void *)arr + be32_to_cpu(arr->offset);</span></a>
<a name="690"><span class="lineNum"> 690 </span> :<span class="lineCov"> 12 : for (j = 0; j < be32_to_cpu(arr->ecnt); j++) {</span></a>
<a name="691"><span class="lineNum"> 691 </span> :<span class="lineCov"> 6 : uint32_t type = 0, status = 0;</span></a>
<a name="692"><span class="lineNum"> 692 </span> : : </a>
<a name="693"><span class="lineNum"> 693 </span> : : /*</a>
<a name="694"><span class="lineNum"> 694 </span> : : * Check that the required fields are present in this</a>
<a name="695"><span class="lineNum"> 695 </span> : : * version of the HDAT structure.</a>
<a name="696"><span class="lineNum"> 696 </span> : : */</a>
<a name="697"><span class="lineNum"> 697 </span> :<span class="lineCov"> 6 : offset = offsetof(struct HDIF_ms_area_address_range, controller_id);</span></a>
<a name="698"><span class="lineNum"> 698 </span> :<span class="lineCov"> 6 : if (be32_to_cpu(arr->eactsz) >= offset)</span></a>
<a name="699"><span class="lineNum"> 699 </span> :<span class="lineCov"> 6 : add_memory_controller(msarea, arange);</span></a>
<a name="700"><span class="lineNum"> 700 </span> : : </a>
<a name="701"><span class="lineNum"> 701 </span> :<span class="lineCov"> 6 : offset = offsetof(struct HDIF_ms_area_address_range, phys_attr);</span></a>
<a name="702"><span class="lineNum"> 702 </span> :<span class="lineCov"> 6 : if (be32_to_cpu(arr->eactsz) >= offset) {</span></a>
<a name="703"><span class="lineNum"> 703 </span> :<span class="lineNoCov"> 0 : uint32_t attr = be32_to_cpu(arange->phys_attr);</span></a>
<a name="704"><span class="lineNum"> 704 </span> : : </a>
<a name="705"><span class="lineNum"> 705 </span> :<span class="lineNoCov"> 0 : type = GETFIELD(PHYS_ATTR_TYPE_MASK, attr);</span></a>
<a name="706"><span class="lineNum"> 706 </span> :<span class="lineNoCov"> 0 : status = GETFIELD(PHYS_ATTR_STATUS_MASK, attr);</span></a>
<a name="707"><span class="lineNum"> 707 </span> : : }</a>
<a name="708"><span class="lineNum"> 708 </span> : : </a>
<a name="709"><span class="lineNum"> 709 </span> :<span class="lineCov"> 6 : if (!add_address_range(root, id, arange, type, status))</span></a>
<a name="710"><span class="lineNum"> 710 </span> :<span class="lineNoCov"> 0 : prerror("Unable to use memory range %d from MSAREA %d\n", j, i);</span></a>
<a name="711"><span class="lineNum"> 711 </span> : : </a>
<a name="712"><span class="lineNum"> 712 </span> :<span class="lineCov"> 6 : arange = (void *)arange + be32_to_cpu(arr->esize);</span></a>
<a name="713"><span class="lineNum"> 713 </span> : : }</a>
<a name="714"><span class="lineNum"> 714 </span> : : }</a>
<a name="715"><span class="lineNum"> 715 </span> : : }</a>
<a name="716"><span class="lineNum"> 716 </span> : : </a>
<a name="717"><span class="lineNum"> 717 </span> : : static struct dt_node *dt_hb_reserves;</a>
<a name="718"><span class="lineNum"> 718 </span> : : </a>
<a name="719"><span class="lineNum"> 719 </span> :<span class="lineNoCov"> 0 : static struct dt_node *add_hb_reserve_node(const char *name, u64 start, u64 end)</span></a>
<a name="720"><span class="lineNum"> 720 </span> : : {</a>
<a name="721"><span class="lineNum"> 721 </span> : : /* label size + "ibm," + NULL */</a>
<a name="722"><span class="lineNum"> 722 </span> :<span class="lineNoCov"> 0 : char node_name[HB_RESERVE_MEM_LABEL_SIZE + 5] = { 0 };</span></a>
<a name="723"><span class="lineNum"> 723 </span> : : struct dt_node *node, *hb;</a>
<a name="724"><span class="lineNum"> 724 </span> : : </a>
<a name="725"><span class="lineNum"> 725 </span> :<span class="lineNoCov"> 0 : if (!dt_hb_reserves) {</span></a>
<a name="726"><span class="lineNum"> 726 </span> :<span class="lineNoCov"> 0 : hb = dt_new_check(dt_root, "ibm,hostboot");</span></a>
<a name="727"><span class="lineNum"> 727 </span> :<span class="lineNoCov"> 0 : dt_add_property_cells(hb, "#size-cells", 2);</span></a>
<a name="728"><span class="lineNum"> 728 </span> :<span class="lineNoCov"> 0 : dt_add_property_cells(hb, "#address-cells", 2);</span></a>
<a name="729"><span class="lineNum"> 729 </span> : : </a>
<a name="730"><span class="lineNum"> 730 </span> :<span class="lineNoCov"> 0 : dt_hb_reserves = dt_new_check(hb, "reserved-memory");</span></a>
<a name="731"><span class="lineNum"> 731 </span> :<span class="lineNoCov"> 0 : dt_add_property(dt_hb_reserves, "ranges", NULL, 0);</span></a>
<a name="732"><span class="lineNum"> 732 </span> :<span class="lineNoCov"> 0 : dt_add_property_cells(dt_hb_reserves, "#size-cells", 2);</span></a>
<a name="733"><span class="lineNum"> 733 </span> :<span class="lineNoCov"> 0 : dt_add_property_cells(dt_hb_reserves, "#address-cells", 2);</span></a>
<a name="734"><span class="lineNum"> 734 </span> : : }</a>
<a name="735"><span class="lineNum"> 735 </span> : : </a>
<a name="736"><span class="lineNum"> 736 </span> : : /* Add "ibm," to reserved node name */</a>
<a name="737"><span class="lineNum"> 737 </span> :<span class="lineNoCov"> 0 : if (strncasecmp(name, "ibm", 3))</span></a>
<a name="738"><span class="lineNum"> 738 </span> :<span class="lineNoCov"> 0 : snprintf(node_name, 5, "ibm,");</span></a>
<a name="739"><span class="lineNum"> 739 </span> :<span class="lineNoCov"> 0 : strcat(node_name, name);</span></a>
<a name="740"><span class="lineNum"> 740 </span> : : </a>
<a name="741"><span class="lineNum"> 741 </span> :<span class="lineNoCov"> 0 : node = dt_new_addr(dt_hb_reserves, node_name, start);</span></a>
<a name="742"><span class="lineNum"> 742 </span> :<span class="lineNoCov"> 0 : if (!node) {</span></a>
<a name="743"><span class="lineNum"> 743 </span> :<span class="lineNoCov"> 0 : prerror("Unable to create node for %s@%llx\n",</span></a>
<a name="744"><span class="lineNum"> 744 </span> : : node_name, (unsigned long long) start);</a>
<a name="745"><span class="lineNum"> 745 </span> :<span class="lineNoCov"> 0 : return NULL;</span></a>
<a name="746"><span class="lineNum"> 746 </span> : : }</a>
<a name="747"><span class="lineNum"> 747 </span> : : </a>
<a name="748"><span class="lineNum"> 748 </span> :<span class="lineNoCov"> 0 : dt_add_property_u64s(node, "reg", start, end - start + 1);</span></a>
<a name="749"><span class="lineNum"> 749 </span> : : </a>
<a name="750"><span class="lineNum"> 750 </span> :<span class="lineNoCov"> 0 : return node;</span></a>
<a name="751"><span class="lineNum"> 751 </span> : : }</a>
<a name="752"><span class="lineNum"> 752 </span> : : </a>
<a name="753"><span class="lineNum"> 753 </span> :<span class="lineCov"> 2 : static void get_hb_reserved_mem(struct HDIF_common_hdr *ms_vpd)</span></a>
<a name="754"><span class="lineNum"> 754 </span> : : {</a>
<a name="755"><span class="lineNum"> 755 </span> : : const struct msvpd_hb_reserved_mem *hb_resv_mem;</a>
<a name="756"><span class="lineNum"> 756 </span> : : u64 start_addr, end_addr, label_size;</a>
<a name="757"><span class="lineNum"> 757 </span> : : struct dt_node *node;</a>
<a name="758"><span class="lineNum"> 758 </span> : : int count, i;</a>
<a name="759"><span class="lineNum"> 759 </span> : : char label[HB_RESERVE_MEM_LABEL_SIZE + 1];</a>
<a name="760"><span class="lineNum"> 760 </span> : : </a>
<a name="761"><span class="lineNum"> 761 </span> : : /*</a>
<a name="762"><span class="lineNum"> 762 </span> : : * XXX: Reservation names only exist on P9 and on P7/8 we get the</a>
<a name="763"><span class="lineNum"> 763 </span> : : * reserved ranges through the hostboot mini-FDT instead.</a>
<a name="764"><span class="lineNum"> 764 </span> : : */</a>
<a name="765"><span class="lineNum"> 765 </span> :<span class="lineCov"> 2 : if (proc_gen < proc_gen_p9)</span></a>
<a name="766"><span class="lineNum"> 766 </span> :<span class="lineCov"> 2 : return;</span></a>
<a name="767"><span class="lineNum"> 767 </span> : : </a>
<a name="768"><span class="lineNum"> 768 </span> :<span class="lineNoCov"> 0 : count = HDIF_get_iarray_size(ms_vpd, MSVPD_IDATA_HB_RESERVED_MEM);</span></a>
<a name="769"><span class="lineNum"> 769 </span> :<span class="lineNoCov"> 0 : if (count <= 0) {</span></a>
<a name="770"><span class="lineNum"> 770 </span> :<span class="lineNoCov"> 0 : prerror("MS VPD: No hostboot reserved memory found\n");</span></a>
<a name="771"><span class="lineNum"> 771 </span> :<span class="lineNoCov"> 0 : return;</span></a>
<a name="772"><span class="lineNum"> 772 </span> : : }</a>
<a name="773"><span class="lineNum"> 773 </span> : : </a>
<a name="774"><span class="lineNum"> 774 </span> :<span class="lineNoCov"> 0 : for (i = 0; i < count; i++) {</span></a>
<a name="775"><span class="lineNum"> 775 </span> :<span class="lineNoCov"> 0 : hb_resv_mem = HDIF_get_iarray_item(ms_vpd,</span></a>
<a name="776"><span class="lineNum"> 776 </span> : : MSVPD_IDATA_HB_RESERVED_MEM,</a>
<a name="777"><span class="lineNum"> 777 </span> : : i, NULL);</a>
<a name="778"><span class="lineNum"> 778 </span> :<span class="lineNoCov"> 0 : if (!CHECK_SPPTR(hb_resv_mem))</span></a>
<a name="779"><span class="lineNum"> 779 </span> :<span class="lineNoCov"> 0 : continue;</span></a>
<a name="780"><span class="lineNum"> 780 </span> : : </a>
<a name="781"><span class="lineNum"> 781 </span> :<span class="lineNoCov"> 0 : label_size = be32_to_cpu(hb_resv_mem->label_size);</span></a>
<a name="782"><span class="lineNum"> 782 </span> :<span class="lineNoCov"> 0 : start_addr = be64_to_cpu(hb_resv_mem->start_addr);</span></a>
<a name="783"><span class="lineNum"> 783 </span> :<span class="lineNoCov"> 0 : end_addr = be64_to_cpu(hb_resv_mem->end_addr);</span></a>
<a name="784"><span class="lineNum"> 784 </span> : : </a>
<a name="785"><span class="lineNum"> 785 </span> : : /* Zero length regions are a normal, but should be ignored */</a>
<a name="786"><span class="lineNum"> 786 </span> :<span class="lineNoCov"> 0 : if (start_addr - end_addr == 0) {</span></a>
<a name="787"><span class="lineNum"> 787 </span> :<span class="lineNoCov"> 0 : prlog(PR_DEBUG, "MEM: Ignoring zero length range\n");</span></a>
<a name="788"><span class="lineNum"> 788 </span> :<span class="lineNoCov"> 0 : continue;</span></a>
<a name="789"><span class="lineNum"> 789 </span> : : }</a>
<a name="790"><span class="lineNum"> 790 </span> : : </a>
<a name="791"><span class="lineNum"> 791 </span> : : /*</a>
<a name="792"><span class="lineNum"> 792 </span> : : * Workaround broken HDAT reserve regions which are</a>
<a name="793"><span class="lineNum"> 793 </span> : : * bigger than 512MB</a>
<a name="794"><span class="lineNum"> 794 </span> : : */</a>
<a name="795"><span class="lineNum"> 795 </span> :<span class="lineNoCov"> 0 : if ((end_addr - start_addr) > 0x20000000) {</span></a>
<a name="796"><span class="lineNum"> 796 </span> :<span class="lineNoCov"> 0 : prlog(PR_ERR, "MEM: Ignoring Bad HDAT reserve: too big\n");</span></a>
<a name="797"><span class="lineNum"> 797 </span> :<span class="lineNoCov"> 0 : continue;</span></a>
<a name="798"><span class="lineNum"> 798 </span> : : }</a>
<a name="799"><span class="lineNum"> 799 </span> : : </a>
<a name="800"><span class="lineNum"> 800 </span> : : /* remove the HRMOR bypass bit */</a>
<a name="801"><span class="lineNum"> 801 </span> :<span class="lineNoCov"> 0 : start_addr &= ~HRMOR_BIT;</span></a>
<a name="802"><span class="lineNum"> 802 </span> :<span class="lineNoCov"> 0 : end_addr &= ~HRMOR_BIT;</span></a>
<a name="803"><span class="lineNum"> 803 </span> :<span class="lineNoCov"> 0 : if (label_size > HB_RESERVE_MEM_LABEL_SIZE)</span></a>
<a name="804"><span class="lineNum"> 804 </span> :<span class="lineNoCov"> 0 : label_size = HB_RESERVE_MEM_LABEL_SIZE;</span></a>
<a name="805"><span class="lineNum"> 805 </span> : : </a>
<a name="806"><span class="lineNum"> 806 </span> :<span class="lineNoCov"> 0 : memset(label, 0, HB_RESERVE_MEM_LABEL_SIZE + 1);</span></a>
<a name="807"><span class="lineNum"> 807 </span> :<span class="lineNoCov"> 0 : memcpy(label, hb_resv_mem->label, label_size);</span></a>
<a name="808"><span class="lineNum"> 808 </span> :<span class="lineNoCov"> 0 : label[label_size] = '\0';</span></a>
<a name="809"><span class="lineNum"> 809 </span> : : </a>
<a name="810"><span class="lineNum"> 810 </span> : : /* Unnamed reservations are always broken. Ignore them. */</a>
<a name="811"><span class="lineNum"> 811 </span> :<span class="lineNoCov"> 0 : if (strlen(label) == 0)</span></a>
<a name="812"><span class="lineNum"> 812 </span> :<span class="lineNoCov"> 0 : continue;</span></a>
<a name="813"><span class="lineNum"> 813 </span> : : </a>
<a name="814"><span class="lineNum"> 814 </span> :<span class="lineNoCov"> 0 : prlog(PR_DEBUG, "MEM: Reserve '%s' %#" PRIx64 "-%#" PRIx64 " (type/inst=0x%08x)\n",</span></a>
<a name="815"><span class="lineNum"> 815 </span> : : label, start_addr, end_addr, be32_to_cpu(hb_resv_mem->type_instance));</a>
<a name="816"><span class="lineNum"> 816 </span> : : </a>
<a name="817"><span class="lineNum"> 817 </span> :<span class="lineNoCov"> 0 : node = add_hb_reserve_node(label, start_addr, end_addr);</span></a>
<a name="818"><span class="lineNum"> 818 </span> :<span class="lineNoCov"> 0 : if (!node) {</span></a>
<a name="819"><span class="lineNum"> 819 </span> :<span class="lineNoCov"> 0 : prerror("unable to add node?\n");</span></a>
<a name="820"><span class="lineNum"> 820 </span> :<span class="lineNoCov"> 0 : continue;</span></a>
<a name="821"><span class="lineNum"> 821 </span> : : }</a>
<a name="822"><span class="lineNum"> 822 </span> : : </a>
<a name="823"><span class="lineNum"> 823 </span> : : /* the three low bytes of type_instance is the instance data */</a>
<a name="824"><span class="lineNum"> 824 </span> :<span class="lineNoCov"> 0 : dt_add_property_cells(node, "ibm,prd-instance",</span></a>
<a name="825"><span class="lineNum"> 825 </span> : : (be32_to_cpu(hb_resv_mem->type_instance) & 0xffffff));</a>
<a name="826"><span class="lineNum"> 826 </span> : : </a>
<a name="827"><span class="lineNum"> 827 </span> : : /*</a>
<a name="828"><span class="lineNum"> 828 </span> : : * Most reservations are used by HBRT itself so we should leave</a>
<a name="829"><span class="lineNum"> 829 </span> : : * the label as-is. The exception is hbrt-code-image which is</a>
<a name="830"><span class="lineNum"> 830 </span> : : * used by opal-prd to locate the HBRT image. Older versions</a>
<a name="831"><span class="lineNum"> 831 </span> : : * of opal-prd expect this to be "ibm,hbrt-code-image" so make</a>
<a name="832"><span class="lineNum"> 832 </span> : : * sure the prefix is there.</a>
<a name="833"><span class="lineNum"> 833 </span> : : */</a>
<a name="834"><span class="lineNum"> 834 </span> :<span class="lineNoCov"> 0 : if (!strcmp(label, "hbrt-code-image"))</span></a>
<a name="835"><span class="lineNum"> 835 </span> :<span class="lineNoCov"> 0 : strcpy(label, "ibm,hbrt-code-image");</span></a>
<a name="836"><span class="lineNum"> 836 </span> :<span class="lineNoCov"> 0 : dt_add_property_string(node, "ibm,prd-label", label);</span></a>
<a name="837"><span class="lineNum"> 837 </span> : : }</a>
<a name="838"><span class="lineNum"> 838 </span> : : }</a>
<a name="839"><span class="lineNum"> 839 </span> : : </a>
<a name="840"><span class="lineNum"> 840 </span> :<span class="lineCov"> 2 : static void parse_trace_reservations(struct HDIF_common_hdr *ms_vpd)</span></a>
<a name="841"><span class="lineNum"> 841 </span> : : {</a>
<a name="842"><span class="lineNum"> 842 </span> : : unsigned int size;</a>
<a name="843"><span class="lineNum"> 843 </span> : : int count, i;</a>
<a name="844"><span class="lineNum"> 844 </span> : : </a>
<a name="845"><span class="lineNum"> 845 </span> : : /*</a>
<a name="846"><span class="lineNum"> 846 </span> : : * The trace arrays are only setup when hostboot is explicitly</a>
<a name="847"><span class="lineNum"> 847 </span> : : * configured to enable them. We need to check and gracefully handle</a>
<a name="848"><span class="lineNum"> 848 </span> : : * when they're not present.</a>
<a name="849"><span class="lineNum"> 849 </span> : : */</a>
<a name="850"><span class="lineNum"> 850 </span> : : </a>
<a name="851"><span class="lineNum"> 851 </span> :<span class="lineCov"> 2 : if (!HDIF_get_idata(ms_vpd, MSVPD_IDATA_TRACE_AREAS, &size) || !size) {</span></a>
<a name="852"><span class="lineNum"> 852 </span> :<span class="lineNoCov"> 0 : prlog(PR_DEBUG, "MS VPD: No trace areas found\n");</span></a>
<a name="853"><span class="lineNum"> 853 </span> :<span class="lineCov"> 2 : return;</span></a>
<a name="854"><span class="lineNum"> 854 </span> : : }</a>
<a name="855"><span class="lineNum"> 855 </span> : : </a>
<a name="856"><span class="lineNum"> 856 </span> :<span class="lineCov"> 2 : count = HDIF_get_iarray_size(ms_vpd, MSVPD_IDATA_TRACE_AREAS);</span></a>
<a name="857"><span class="lineNum"> 857 </span> :<span class="lineCov"> 2 : if (count <= 0) {</span></a>
<a name="858"><span class="lineNum"> 858 </span> :<span class="lineCov"> 2 : prlog(PR_DEBUG, "MS VPD: No trace areas found\n");</span></a>
<a name="859"><span class="lineNum"> 859 </span> :<span class="lineCov"> 2 : return;</span></a>
<a name="860"><span class="lineNum"> 860 </span> : : }</a>
<a name="861"><span class="lineNum"> 861 </span> : : </a>
<a name="862"><span class="lineNum"> 862 </span> :<span class="lineNoCov"> 0 : prlog(PR_INFO, "MS VPD: Found %d trace areas\n", count);</span></a>
<a name="863"><span class="lineNum"> 863 </span> : : </a>
<a name="864"><span class="lineNum"> 864 </span> :<span class="lineNoCov"> 0 : for (i = 0; i < count; i++) {</span></a>
<a name="865"><span class="lineNum"> 865 </span> : : const struct msvpd_trace *trace_area;</a>
<a name="866"><span class="lineNum"> 866 </span> : : struct dt_node *node;</a>
<a name="867"><span class="lineNum"> 867 </span> : : u64 start, end;</a>
<a name="868"><span class="lineNum"> 868 </span> : : </a>
<a name="869"><span class="lineNum"> 869 </span> :<span class="lineNoCov"> 0 : trace_area = HDIF_get_iarray_item(ms_vpd,</span></a>
<a name="870"><span class="lineNum"> 870 </span> : : MSVPD_IDATA_TRACE_AREAS, i, &size);</a>
<a name="871"><span class="lineNum"> 871 </span> : : </a>
<a name="872"><span class="lineNum"> 872 </span> :<span class="lineNoCov"> 0 : if (!trace_area)</span></a>
<a name="873"><span class="lineNum"> 873 </span> :<span class="lineNoCov"> 0 : return; /* shouldn't happen */</span></a>
<a name="874"><span class="lineNum"> 874 </span> : : </a>
<a name="875"><span class="lineNum"> 875 </span> :<span class="lineNoCov"> 0 : start = be64_to_cpu(trace_area->start) & ~HRMOR_BIT;</span></a>
<a name="876"><span class="lineNum"> 876 </span> :<span class="lineNoCov"> 0 : end = be64_to_cpu(trace_area->end) & ~HRMOR_BIT;</span></a>
<a name="877"><span class="lineNum"> 877 </span> : : </a>
<a name="878"><span class="lineNum"> 878 </span> :<span class="lineNoCov"> 0 : prlog(PR_INFO,</span></a>
<a name="879"><span class="lineNum"> 879 </span> : : "MS VPD: Trace area: 0x%.16"PRIx64"-0x%.16"PRIx64"\n",</a>
<a name="880"><span class="lineNum"> 880 </span> : : start, end);</a>
<a name="881"><span class="lineNum"> 881 </span> : : </a>
<a name="882"><span class="lineNum"> 882 </span> :<span class="lineNoCov"> 0 : node = add_hb_reserve_node("trace-area", start, end);</span></a>
<a name="883"><span class="lineNum"> 883 </span> :<span class="lineNoCov"> 0 : if (!node) {</span></a>
<a name="884"><span class="lineNum"> 884 </span> :<span class="lineNoCov"> 0 : prerror("MEM: Unable to reserve trace area %p-%p\n",</span></a>
<a name="885"><span class="lineNum"> 885 </span> : : (void *) start, (void *) end);</a>
<a name="886"><span class="lineNum"> 886 </span> :<span class="lineNoCov"> 0 : continue;</span></a>
<a name="887"><span class="lineNum"> 887 </span> : : }</a>
<a name="888"><span class="lineNum"> 888 </span> : : </a>
<a name="889"><span class="lineNum"> 889 </span> :<span class="lineNoCov"> 0 : dt_add_property(node, "no-map", NULL, 0);</span></a>
<a name="890"><span class="lineNum"> 890 </span> : : }</a>
<a name="891"><span class="lineNum"> 891 </span> : : }</a>
<a name="892"><span class="lineNum"> 892 </span> : : </a>
<a name="893"><span class="lineNum"> 893 </span> :<span class="lineCov"> 2 : static bool __memory_parse(struct dt_node *root)</span></a>
<a name="894"><span class="lineNum"> 894 </span> : : {</a>
<a name="895"><span class="lineNum"> 895 </span> : : struct HDIF_common_hdr *ms_vpd;</a>
<a name="896"><span class="lineNum"> 896 </span> : : const struct msvpd_ms_addr_config *msac;</a>
<a name="897"><span class="lineNum"> 897 </span> : : const struct msvpd_total_config_ms *tcms;</a>
<a name="898"><span class="lineNum"> 898 </span> : : unsigned int size;</a>
<a name="899"><span class="lineNum"> 899 </span> : : </a>
<a name="900"><span class="lineNum"> 900 </span> :<span class="lineCov"> 2 : ms_vpd = get_hdif(&spira.ntuples.ms_vpd, MSVPD_HDIF_SIG);</span></a>
<a name="901"><span class="lineNum"> 901 </span> :<span class="lineCov"> 2 : if (!ms_vpd) {</span></a>
<a name="902"><span class="lineNum"> 902 </span> :<span class="lineNoCov"> 0 : prerror("MS VPD: invalid\n");</span></a>
<a name="903"><span class="lineNum"> 903 </span> :<span class="lineNoCov"> 0 : op_display(OP_FATAL, OP_MOD_MEM, 0x0000);</span></a>
<a name="904"><span class="lineNum"> 904 </span> :<span class="lineNoCov"> 0 : return false;</span></a>
<a name="905"><span class="lineNum"> 905 </span> : : }</a>
<a name="906"><span class="lineNum"> 906 </span> :<span class="lineCov"> 2 : if (be32_to_cpu(spira.ntuples.ms_vpd.act_len) < sizeof(*ms_vpd)) {</span></a>
<a name="907"><span class="lineNum"> 907 </span> :<span class="lineNoCov"> 0 : prerror("MS VPD: invalid size %u\n",</span></a>
<a name="908"><span class="lineNum"> 908 </span> : : be32_to_cpu(spira.ntuples.ms_vpd.act_len));</a>
<a name="909"><span class="lineNum"> 909 </span> :<span class="lineNoCov"> 0 : op_display(OP_FATAL, OP_MOD_MEM, 0x0001);</span></a>
<a name="910"><span class="lineNum"> 910 </span> :<span class="lineNoCov"> 0 : return false;</span></a>
<a name="911"><span class="lineNum"> 911 </span> : : }</a>
<a name="912"><span class="lineNum"> 912 </span> : : </a>
<a name="913"><span class="lineNum"> 913 </span> :<span class="lineCov"> 2 : prlog(PR_DEBUG, "MS VPD: is at %p\n", ms_vpd);</span></a>
<a name="914"><span class="lineNum"> 914 </span> : : </a>
<a name="915"><span class="lineNum"> 915 </span> :<span class="lineCov"> 2 : msac = HDIF_get_idata(ms_vpd, MSVPD_IDATA_MS_ADDR_CONFIG, &size);</span></a>
<a name="916"><span class="lineNum"> 916 </span> :<span class="lineCov"> 2 : if (!CHECK_SPPTR(msac) ||</span></a>
<a name="917"><span class="lineNum"> 917 </span> :<span class="lineCov"> 2 : size < offsetof(struct msvpd_ms_addr_config, max_possible_ms_address)) {</span></a>
<a name="918"><span class="lineNum"> 918 </span> :<span class="lineNoCov"> 0 : prerror("MS VPD: bad msac size %u @ %p\n", size, msac);</span></a>
<a name="919"><span class="lineNum"> 919 </span> :<span class="lineNoCov"> 0 : op_display(OP_FATAL, OP_MOD_MEM, 0x0002);</span></a>
<a name="920"><span class="lineNum"> 920 </span> :<span class="lineNoCov"> 0 : return false;</span></a>
<a name="921"><span class="lineNum"> 921 </span> : : }</a>
<a name="922"><span class="lineNum"> 922 </span> :<span class="lineCov"> 2 : prlog(PR_DEBUG, "MS VPD: MSAC is at %p\n", msac);</span></a>
<a name="923"><span class="lineNum"> 923 </span> : : </a>
<a name="924"><span class="lineNum"> 924 </span> :<span class="lineCov"> 2 : dt_add_property_u64(dt_root, DT_PRIVATE "maxmem",</span></a>
<a name="925"><span class="lineNum"> 925 </span> : : be64_to_cpu(msac->max_configured_ms_address));</a>
<a name="926"><span class="lineNum"> 926 </span> : : </a>
<a name="927"><span class="lineNum"> 927 </span> :<span class="lineCov"> 2 : tcms = HDIF_get_idata(ms_vpd, MSVPD_IDATA_TOTAL_CONFIG_MS, &size);</span></a>
<a name="928"><span class="lineNum"> 928 </span> :<span class="lineCov"> 2 : if (!CHECK_SPPTR(tcms) || size < sizeof(*tcms)) {</span></a>
<a name="929"><span class="lineNum"> 929 </span> :<span class="lineNoCov"> 0 : prerror("MS VPD: Bad tcms size %u @ %p\n", size, tcms);</span></a>
<a name="930"><span class="lineNum"> 930 </span> :<span class="lineNoCov"> 0 : op_display(OP_FATAL, OP_MOD_MEM, 0x0003);</span></a>
<a name="931"><span class="lineNum"> 931 </span> :<span class="lineNoCov"> 0 : return false;</span></a>
<a name="932"><span class="lineNum"> 932 </span> : : }</a>
<a name="933"><span class="lineNum"> 933 </span> :<span class="lineCov"> 2 : prlog(PR_DEBUG, "MS VPD: TCMS is at %p\n", tcms);</span></a>
<a name="934"><span class="lineNum"> 934 </span> : : </a>
<a name="935"><span class="lineNum"> 935 </span> :<span class="lineCov"> 2 : prlog(PR_DEBUG, "MS VPD: Maximum configured address: 0x%llx\n",</span></a>
<a name="936"><span class="lineNum"> 936 </span> : : (long long)be64_to_cpu(msac->max_configured_ms_address));</a>
<a name="937"><span class="lineNum"> 937 </span> :<span class="lineCov"> 2 : prlog(PR_DEBUG, "MS VPD: Maximum possible address: 0x%llx\n",</span></a>
<a name="938"><span class="lineNum"> 938 </span> : : (long long)be64_to_cpu(msac->max_possible_ms_address));</a>
<a name="939"><span class="lineNum"> 939 </span> : : </a>
<a name="940"><span class="lineNum"> 940 </span> :<span class="lineCov"> 2 : get_msareas(root, ms_vpd);</span></a>
<a name="941"><span class="lineNum"> 941 </span> : : </a>
<a name="942"><span class="lineNum"> 942 </span> :<span class="lineCov"> 2 : get_hb_reserved_mem(ms_vpd);</span></a>
<a name="943"><span class="lineNum"> 943 </span> : : </a>
<a name="944"><span class="lineNum"> 944 </span> :<span class="lineCov"> 2 : parse_trace_reservations(ms_vpd);</span></a>
<a name="945"><span class="lineNum"> 945 </span> : : </a>
<a name="946"><span class="lineNum"> 946 </span> :<span class="lineCov"> 2 : prlog(PR_INFO, "MS VPD: Total MB of RAM: 0x%llx\n",</span></a>
<a name="947"><span class="lineNum"> 947 </span> : : (long long)be64_to_cpu(tcms->total_in_mb));</a>
<a name="948"><span class="lineNum"> 948 </span> : : </a>
<a name="949"><span class="lineNum"> 949 </span> :<span class="lineCov"> 2 : return true;</span></a>
<a name="950"><span class="lineNum"> 950 </span> : : }</a>
<a name="951"><span class="lineNum"> 951 </span> : : </a>
<a name="952"><span class="lineNum"> 952 </span> :<span class="lineCov"> 2 : void memory_parse(void)</span></a>
<a name="953"><span class="lineNum"> 953 </span> : : {</a>
<a name="954"><span class="lineNum"> 954 </span> :<span class="lineCov"> 2 : if (!__memory_parse(dt_root)) {</span></a>
<a name="955"><span class="lineNum"> 955 </span> :<span class="lineNoCov"> 0 : prerror("MS VPD: Failed memory init !\n");</span></a>
<a name="956"><span class="lineNum"> 956 </span> :<span class="lineNoCov"> 0 : abort();</span></a>
<a name="957"><span class="lineNum"> 957 </span> : : }</a>
<a name="958"><span class="lineNum"> 958 </span> :<span class="lineCov"> 2 : }</span></a>
</pre>
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