From 5362f85e04bd1b03d94711c62c20de3111234f25 Mon Sep 17 00:00:00 2001 From: Mahesh Salgaonkar Date: Mon, 16 Apr 2018 23:04:23 +0530 Subject: opal/hmi: check thread 0 tfmr to validate latched tfmr errors. Due to P9 errata, HDEC parity and TB residue errors are latched for non-zero threads 1-3 even if they are cleared. But these are not latched on thread 0. Hence, use xscom SCOMC/SCOMD to read thread 0 tfmr value and ignore them on non-zero threads if they are not present on thread 0. Signed-off-by: Mahesh Salgaonkar Signed-off-by: Stewart Smith --- include/xscom-p9-regs.h | 8 ++++++++ 1 file changed, 8 insertions(+) (limited to 'include') diff --git a/include/xscom-p9-regs.h b/include/xscom-p9-regs.h index 4738e81..c332249 100644 --- a/include/xscom-p9-regs.h +++ b/include/xscom-p9-regs.h @@ -21,4 +21,12 @@ #define P9_GPIO_DATA_OUT_ENABLE 0x00000000000B0054ull #define P9_GPIO_DATA_OUT 0x00000000000B0051ull +/* xscom address for SCOM Control and data Register */ +/* bits 54:60 of SCOM SPRC register is used for core specific SPR selection. */ +#define P9_SCOM_SPRC 0x20010A80 +#define P9_SCOMC_SPR_SELECT PPC_BITMASK(54, 60) +#define P9_SCOMC_TFMR_T0 0x8 /* 0b0001000 TFMR */ + +#define P9_SCOM_SPRD 0x20010A81 + #endif /* __XSCOM_P9_REGS_H__ */ -- cgit v1.1