From 882e867012a8c4af8a7bbd42b93816b2a2f3b827 Mon Sep 17 00:00:00 2001 From: Christophe Lombard Date: Thu, 14 Oct 2021 17:56:54 +0200 Subject: pau: create phb MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Implement the necessary operations for the OpenCAPI PHB type and inform the device-tree properties associated. The OpenCapi PCI config Addr/Data registers are reachable through the Generation-ID Registers MMIO BARS. The Config Address and Data registers are located at the following offsets from the AFU Config BAR plus 320 KB. • Config Address for Brick 0 – Offset 0 • Config Data for Brick 0 – Offsets: ◦ 128 – 4-byte config register • Config Address for Brick 1 – Offset 256 • Config Data for Brick 1 – Offsets: ◦ 384 – 4-byte config register Signed-off-by: Christophe Lombard Reviewed-by: Frederic Barrat Signed-off-by: Vasant Hegde --- include/pci.h | 1 + 1 file changed, 1 insertion(+) (limited to 'include/pci.h') diff --git a/include/pci.h b/include/pci.h index 8d46721..caae744 100644 --- a/include/pci.h +++ b/include/pci.h @@ -352,6 +352,7 @@ enum phb_type { phb_type_pcie_v4, phb_type_npu_v2, phb_type_npu_v2_opencapi, + phb_type_pau_opencapi, }; /* Generic PCI NVRAM flags */ -- cgit v1.1