From ac6f1599ff330fa602b3c9557a08f31f1158a55f Mon Sep 17 00:00:00 2001 From: Reza Arbab Date: Mon, 13 Nov 2017 16:19:16 -0600 Subject: npu2: hw-procedures: Add phy_rx_clock_sel() Change the RX clk mux control to be done by software instead of HW. This avoids glitches caused by changing the mux setting. Signed-off-by: Reza Arbab Reviewed-By: Alistair Popple Signed-off-by: Stewart Smith --- include/npu2-regs.h | 1 + 1 file changed, 1 insertion(+) (limited to 'include/npu2-regs.h') diff --git a/include/npu2-regs.h b/include/npu2-regs.h index 307e93b..88ba709 100644 --- a/include/npu2-regs.h +++ b/include/npu2-regs.h @@ -281,6 +281,7 @@ void npu2_write_mask(struct npu2 *p, uint64_t reg, uint64_t val, uint64_t mask); #define NPU2_NTL_CQ_FENCE_STATUS(ndev) NPU2_NTLU_REG_OFFSET(ndev, 0x500) #define NPU2_NTL_DL_CONTROL(ndev) NPU2_DL_REG_OFFSET(ndev, 0xFFF4) #define NPU2_NTL_DL_CONFIG(ndev) NPU2_DL_REG_OFFSET(ndev, 0xFFF8) +#define NPU2_NTL_DL_CLK_CTRL(ndev) NPU2_DL_REG_OFFSET(ndev, 0x001C) /* Misc block registers. Unlike the SM/CTL/DAT/NTL registers above * there is only a single instance of each of these in the NPU so we -- cgit v1.1