From a6816a42c1f40481c998177b2b88329984ed25b2 Mon Sep 17 00:00:00 2001 From: Stewart Smith Date: Mon, 20 Dec 2021 22:22:46 +1000 Subject: Add CONFIG_P8 with PHB3 behind it MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit We can use a base CPU of POWER9 if we don't have P8. We can also hide PHB3 code behind this, and shave 12kb off skiboot.lid.xz Reviewed-by: Dan Horák [npiggin: add cpp define, fail gracefully on P8] Signed-off-by: Stewart Smith Signed-off-by: Cédric Le Goater --- hw/Makefile.inc | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) (limited to 'hw') diff --git a/hw/Makefile.inc b/hw/Makefile.inc index 9fcbb63..e273e89 100644 --- a/hw/Makefile.inc +++ b/hw/Makefile.inc @@ -3,12 +3,15 @@ SUBDIRS += hw HW_OBJS = xscom.o chiptod.o lpc.o lpc-uart.o psi.o HW_OBJS += homer.o slw.o occ.o fsi-master.o centaur.o imc.o HW_OBJS += nx.o nx-rng.o nx-crypto.o nx-compress.o nx-842.o nx-gzip.o -HW_OBJS += phb3.o sfc-ctrl.o fake-rtc.o bt.o p8-i2c.o prd.o +HW_OBJS += sfc-ctrl.o fake-rtc.o bt.o p8-i2c.o prd.o HW_OBJS += dts.o lpc-rtc.o npu.o npu-hw-procedures.o xive.o phb4.o HW_OBJS += fake-nvram.o lpc-mbox.o npu2.o npu2-hw-procedures.o HW_OBJS += npu2-common.o npu2-opencapi.o phys-map.o sbe-p9.o capp.o HW_OBJS += occ-sensor.o vas.o sbe-p8.o dio-p9.o lpc-port80h.o cache-p9.o HW_OBJS += npu-opal.o ocmb.o xive2.o pau.o pau-hw-procedures.o +ifeq ($(CONFIG_P8),1) +HW_OBJS += phb3.o +endif HW=hw/built-in.a include $(SRC)/hw/fsp/Makefile.inc -- cgit v1.1