From 47f46e5ff3f816b135b65e210aff65d9194698fa Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?C=C3=A9dric=20Le=20Goater?= Date: Wed, 4 Aug 2021 12:51:15 +0530 Subject: psi/p10: Introduce xive2_source_mask() MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Commit fa161cd89fbf ("hw/psi-p9: Mask OPAL-owned LSIs without handlers") introduced xive_source_mask(). Do the same for P10. Signed-off-by: Cédric Le Goater Signed-off-by: Vasant Hegde --- hw/psi.c | 11 ++++++++++- hw/xive2.c | 7 +++++++ 2 files changed, 17 insertions(+), 1 deletion(-) (limited to 'hw') diff --git a/hw/psi.c b/hw/psi.c index 2914225..e9b8e2e 100644 --- a/hw/psi.c +++ b/hw/psi.c @@ -564,7 +564,16 @@ static void psi_p9_mask_unhandled_irq(struct irq_source *is, uint32_t isn) * have a handler for the interrupt then it needs to be masked to * prevent the IRQ from locking up the thread which handles it. */ - xive_source_mask(is, isn); + switch (proc_gen) { + case proc_gen_p9: + xive_source_mask(is, isn); + break; + case proc_gen_p10: + xive2_source_mask(is, isn); + return; + default: + assert(false); + } } diff --git a/hw/xive2.c b/hw/xive2.c index 125e3fb..a8d25f7 100644 --- a/hw/xive2.c +++ b/hw/xive2.c @@ -2531,6 +2531,13 @@ static char *xive_source_name(struct irq_source *is, uint32_t isn) return s->orig_ops->name(is, isn); } +void xive2_source_mask(struct irq_source *is, uint32_t isn) +{ + struct xive_src *s = container_of(is, struct xive_src, is); + + xive_update_irq_mask(s, isn - s->esb_base, true); +} + static const struct irq_source_ops xive_irq_source_ops = { .interrupt = xive_source_interrupt, .attributes = xive_source_attributes, -- cgit v1.1