From dfb707f5579eb3c4fa2a2e5d94ddb7136fac8249 Mon Sep 17 00:00:00 2001 From: Stewart Smith Date: Tue, 18 Jun 2019 17:29:23 +1000 Subject: Separate FSP specific PSI code Signed-off-by: Stewart Smith --- hw/psi.c | 94 +++++++--------------------------------------------------------- 1 file changed, 9 insertions(+), 85 deletions(-) (limited to 'hw/psi.c') diff --git a/hw/psi.c b/hw/psi.c index 5435c46..3b6ade1 100644 --- a/hw/psi.c +++ b/hw/psi.c @@ -45,7 +45,7 @@ static bool psi_ext_irq_policy = EXTERNAL_IRQ_POLICY_LINUX; static void psi_activate_phb(struct psi *psi); -static struct lock psi_lock = LOCK_UNLOCKED; +struct lock psi_lock = LOCK_UNLOCKED; DEFINE_LOG_ENTRY(OPAL_RC_PSI_TIMEOUT, OPAL_PLATFORM_ERR_EVT, OPAL_PSI, OPAL_PLATFORM_FIRMWARE, @@ -199,7 +199,8 @@ static void psi_link_poll(void *data __unused) psi_activate_phb(psi); psi_set_link_polling(false); unlock(&psi_lock); - fsp_reinit_fsp(); + if (platform.psi && platform.psi->link_established) + platform.psi->link_established(); return; } } @@ -333,14 +334,14 @@ static void psihb_interrupt(struct irq_source *is, uint32_t isn __unused) */ if (!psi->active) psi_spurious_fsp_irq(psi); - else - fsp_interrupt(); + else { + if (platform.psi && platform.psi->fsp_interrupt) + platform.psi->fsp_interrupt(); + } } - /* Poll the console buffers on any interrupt since we don't - * get send notifications - */ - fsp_console_poll(NULL); + if (platform.psi && platform.psi->psihb_interrupt) + platform.psi->psihb_interrupt(); } @@ -627,83 +628,6 @@ static const struct irq_source_ops psi_p9_irq_ops = { .name = psi_p9_irq_name, }; -static void psi_tce_enable(struct psi *psi, bool enable) -{ - void *addr; - u64 val; - - switch (proc_gen) { - case proc_gen_p8: - case proc_gen_p9: - addr = psi->regs + PSIHB_PHBSCR; - break; - default: - prerror("%s: Unknown CPU type\n", __func__); - return; - } - - val = in_be64(addr); - if (enable) - val |= PSIHB_CR_TCE_ENABLE; - else - val &= ~PSIHB_CR_TCE_ENABLE; - out_be64(addr, val); -} - -/* - * Configure the PSI interface for communicating with - * an FSP, such as enabling the TCEs, FSP commands, - * etc... - */ -void psi_init_for_fsp(struct psi *psi) -{ - uint64_t reg; - bool enable_tce = true; - - lock(&psi_lock); - - /* Disable and setup TCE base address */ - psi_tce_enable(psi, false); - - switch (proc_gen) { - case proc_gen_p8: - case proc_gen_p9: - out_be64(psi->regs + PSIHB_TAR, PSI_TCE_TABLE_BASE | - PSIHB_TAR_256K_ENTRIES); - break; - default: - enable_tce = false; - }; - - /* Enable various other configuration register bits based - * on what pHyp does. We keep interrupts disabled until - * after the mailbox has been properly configured. We assume - * basic stuff such as PSI link enable is already there. - * - * - FSP CMD Enable - * - FSP MMIO Enable - * - TCE Enable - * - Error response enable - * - * Clear all other error bits - */ - if (!psi->active) { - prerror("PSI: psi_init_for_fsp() called on inactive link!\n"); - unlock(&psi_lock); - return; - } - - reg = in_be64(psi->regs + PSIHB_CR); - reg |= PSIHB_CR_FSP_CMD_ENABLE; - reg |= PSIHB_CR_FSP_MMIO_ENABLE; - reg |= PSIHB_CR_FSP_ERR_RSP_ENABLE; - reg &= ~0x00000000ffffffffull; - out_be64(psi->regs + PSIHB_CR, reg); - psi_tce_enable(psi, enable_tce); - - unlock(&psi_lock); -} - void psi_set_external_irq_policy(bool policy) { psi_ext_irq_policy = policy; -- cgit v1.1