From aac13141c95022126d089aa4177a1f8467cd105f Mon Sep 17 00:00:00 2001 From: Sukadev Bhattiprolu Date: Wed, 24 May 2017 22:02:13 -0700 Subject: vas: Create MMIO device tree node Create a device tree node for VAS and add properties that Linux will need to configure/use VAS. Signed-off-by: Sukadev Bhattiprolu Signed-off-by: Stewart Smith --- doc/device-tree/vas.rst | 28 ++++++++++++++++++++++++++++ 1 file changed, 28 insertions(+) create mode 100644 doc/device-tree/vas.rst (limited to 'doc') diff --git a/doc/device-tree/vas.rst b/doc/device-tree/vas.rst new file mode 100644 index 0000000..606f476 --- /dev/null +++ b/doc/device-tree/vas.rst @@ -0,0 +1,28 @@ +Virtual Accelerator Switchboard (VAS) +==================================== + +VAS is present in P9 or later processors. In P9, each chip has one +instance of VAS. Each instance of VAS is represented as a "platform +device" i.e as a node in root of the device tree: +:: + + /vas@ + +with unique VAS address which also represents the Hypervisor window +context address for the instance of VAS. + +Each VAS node contains: :: + + compatible: "ibm,power9-vas", "ibm,vas" + + ibm,vas-id: unique identifier for each instance of VAS in the system. + + reg: contains 8 64-bit fields. + + Fields [0] and [1] represent the Hypervisor window context BAR + (start and length). Fields [2] and [3] represent the OS/User + window context BAR (start and length). Fields [4] and [5] + contain the start and length of paste power bus address region + for this chip. Fields [6] and [7] represent the bit field (start + bit and number of bits) where the window id of the window should + be encoded when computing the paste address for the window. -- cgit v1.1