From 6d9a87cec05ab7f5bc48d4c26c6877108061330a Mon Sep 17 00:00:00 2001 From: Anju T Sudhakar Date: Fri, 22 Mar 2019 12:13:46 +0530 Subject: doc/imc: Edit imc.rst documentation to include Add documentation for IMC trace-mode in imc.rst. Signed-off-by: Anju T Sudhakar Signed-off-by: Stewart Smith --- doc/imc.rst | 67 +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 67 insertions(+) (limited to 'doc/imc.rst') diff --git a/doc/imc.rst b/doc/imc.rst index 3324aa3..32fe7cb 100644 --- a/doc/imc.rst +++ b/doc/imc.rst @@ -44,6 +44,73 @@ sampling duration) fetches the counter data and accumulate to main memory. Memory to accumulate counter data are refered from "PDBAR" (per-core scom) and "LDBAR" per-thread spr. +Trace mode of IMC: +------------------ + +POWER9 support two modes for IMC which are the Accumulation mode and +Trace mode. In Accumulation mode event counts are accumulated in system +memory. Hypervisor/kernel then reads the posted counts periodically, or +when requested. In IMC Trace mode, the 64 bit trace scom value is initialized +with the event information. The CPMC*SEL and CPMC_LOAD in the trace scom, specifies +the event to be monitored and the sampling duration. On each overflow in the +CPMC*SEL, hardware snapshots the program counter along with event counts +and writes into memory pointed by LDBAR. LDBAR has bits to indicate whether +hardware is configured for accumulation or trace mode. +Currently the event monitored for trace-mode is fixed as cycle. + +PMI interrupt handling is avoided, since IMC trace mode snapshots the +program counter and update to the memory. And this also provide a way for +the operating system to do instruction sampling in real time without +PMI(Performance Monitoring Interrupts) processing overhead. + +**Example:** + +Performance data using 'perf top' with and without trace-imc event: + + +*PMI interrupts count when `perf top` command is executed without trace-imc event.* +:: + + # cat /proc/interrupts (a snippet from the output) + 9944 1072 804 804 1644 804 1306 + 804 804 804 804 804 804 804 + 804 804 1961 1602 804 804 1258 + [-----------------------------------------------------------------] + 803 803 803 803 803 803 803 + 803 803 803 803 804 804 804 + 804 804 804 804 804 804 803 + 803 803 803 803 803 1306 803 + 803 Performance monitoring interrupts + + +*PMI interrupts count when `perf top` command executed with trace-imc event +(executed right after 'perf top' without trace-imc event).* +:: + + # perf top -e trace_imc/trace_cycles/ + 12.50% [kernel] [k] arch_cpu_idle + 11.81% [kernel] [k] __next_timer_interrupt + 11.22% [kernel] [k] rcu_idle_enter + 10.25% [kernel] [k] find_next_bit + 7.91% [kernel] [k] do_idle + 7.69% [kernel] [k] rcu_dynticks_eqs_exit + 5.20% [kernel] [k] tick_nohz_idle_stop_tick + [-----------------------] + + # cat /proc/interrupts (a snippet from the output) + + 9944 1072 804 804 1644 804 1306 + 804 804 804 804 804 804 804 + 804 804 1961 1602 804 804 1258 + [-----------------------------------------------------------------] + 803 803 803 803 803 803 803 + 803 803 803 804 804 804 804 + 804 804 804 804 804 804 803 + 803 803 803 803 803 1306 803 + 803 Performance monitoring interrupts + +Here the PMI interrupts count remains the same. + OPAL APIs: ---------- -- cgit v1.1