From 9eeb5af64be73fb2ca981330b39d0b46acc69057 Mon Sep 17 00:00:00 2001 From: Stewart Smith Date: Wed, 26 Aug 2015 16:40:10 +1000 Subject: Fix spelling mistakes See https://github.com/lucasdemarchi/codespel Signed-off-by: Stewart Smith --- core/affinity.c | 2 +- core/hostservices.c | 6 +++--- core/init.c | 2 +- core/mem_region.c | 2 +- core/time-utils.c | 2 +- hw/ast-bmc/ast-io.c | 4 ++-- hw/fsp/fsp-dump.c | 2 +- hw/fsp/fsp-epow.c | 2 +- hw/fsp/fsp-leds.c | 8 ++++---- hw/fsp/fsp-mem-err.c | 2 +- hw/fsp/fsp.c | 2 +- hw/ipmi/ipmi-watchdog.c | 4 ++-- hw/p5ioc2-phb.c | 2 +- hw/p8-i2c.c | 4 ++-- include/errorlog.h | 2 +- include/fsp-attn.h | 2 +- include/opal-api.h | 2 +- include/stack.h | 2 +- include/xscom.h | 2 +- libfdt/libfdt.h | 4 ++-- libflash/blocklevel.c | 2 +- platforms/astbmc/common.c | 2 +- platforms/ibm-fsp/firenze.c | 2 +- platforms/ibm-fsp/lxvpd.c | 4 ++-- 24 files changed, 34 insertions(+), 34 deletions(-) diff --git a/core/affinity.c b/core/affinity.c index d5eea82..df708a8 100644 --- a/core/affinity.c +++ b/core/affinity.c @@ -35,7 +35,7 @@ * - Core ID * * Here too, we do not use the "cooked" HW processor ID from HDAT but - * intead use the real HW core ID which is basically the interrupt + * instead use the real HW core ID which is basically the interrupt * server number of thread 0 on that core. * * diff --git a/core/hostservices.c b/core/hostservices.c index 68f2e77..815654d 100644 --- a/core/hostservices.c +++ b/core/hostservices.c @@ -553,7 +553,7 @@ static int hservice_set_special_wakeup(struct cpu_thread *cpu) /* * The original HWp reads the XSCOM first but ignores the result * and error, let's do the same until I know for sure that is - * not neccessary + * not necessary */ xscom_read(cpu->chip_id, XSCOM_ADDR_P8_EX_SLAVE(core_id, EX_PM_SPECIAL_WAKEUP_PHYP), @@ -661,7 +661,7 @@ static int hservice_clr_special_wakeup(struct cpu_thread *cpu) /* * The original HWp reads the XSCOM first but ignores the result * and error, let's do the same until I know for sure that is - * not neccessary + * not necessary */ xscom_read(cpu->chip_id, XSCOM_ADDR_P8_EX_SLAVE(core_id, EX_PM_SPECIAL_WAKEUP_PHYP), @@ -696,7 +696,7 @@ static int hservice_wakeup(uint32_t i_core, uint32_t i_mode) /* * Mask out the top nibble of i_core since it may contain - * 0x4 (which we use for XSCOM targetting) + * 0x4 (which we use for XSCOM targeting) */ i_core &= 0x0fffffff; diff --git a/core/init.c b/core/init.c index fc57bcb..e595253 100644 --- a/core/init.c +++ b/core/init.c @@ -756,7 +756,7 @@ void __noreturn main_cpu_entry(const void *fdt, u32 master_cpu) * because they rely on various other things having been setup, * for example, add_opal_interrupts() will add all the interrupt * sources that are going to the firmware. We can't add a new one - * after that call. Similarily, the mem_region calls will construct + * after that call. Similarly, the mem_region calls will construct * the reserve maps in the DT so we shouldn't affect the memory * regions after that */ diff --git a/core/mem_region.c b/core/mem_region.c index 3ed8006..a742fe4 100644 --- a/core/mem_region.c +++ b/core/mem_region.c @@ -766,7 +766,7 @@ restart: /* * If we can't allocate the memory block from the expected - * node, we bail to any one that can accomodate our request. + * node, we bail to any one that can accommodate our request. */ if (!p && use_local) { use_local = false; diff --git a/core/time-utils.c b/core/time-utils.c index 573e7f1..8a02f46 100644 --- a/core/time-utils.c +++ b/core/time-utils.c @@ -17,7 +17,7 @@ #include /* - * Converts an OPAL formated datetime into a struct tm. We ignore microseconds + * Converts an OPAL formatted datetime into a struct tm. We ignore microseconds * as Linux doesn't use them anyway. * * | year | month | mday | diff --git a/hw/ast-bmc/ast-io.c b/hw/ast-bmc/ast-io.c index 08ce99d..a3c5c9f 100644 --- a/hw/ast-bmc/ast-io.c +++ b/hw/ast-bmc/ast-io.c @@ -27,7 +27,7 @@ * using FW space as normal memory space is limited to byte accesses * to a fixed 256M window, while FW space allows us to use different * access sizes and to control the IDSEL bits which essentially enable - * a full 4G addres space. + * a full 4G address space. * * The way FW accesses map onto AHB is controlled via two registers * in the BMC's LPC host controller: @@ -79,7 +79,7 @@ * * For the time being, we use the iLPC->AHB for everything except * pnor accesses. In the long run, we will reconfigure the LPC->AHB - * to provide more direct access to all of the BMC addres space but + * to provide more direct access to all of the BMC address space but * we'll only do that after the boot script/program on the BMC is * updated to restore the bridge to a state compatible with the SBE * expectations on boot. diff --git a/hw/fsp/fsp-dump.c b/hw/fsp/fsp-dump.c index c57d730..ae5bfee 100644 --- a/hw/fsp/fsp-dump.c +++ b/hw/fsp/fsp-dump.c @@ -18,7 +18,7 @@ /* * Dump support: * We get dump notification from different sources: - * - During system intialization via HDAT + * - During system initialization via HDAT * - During FSP reset/reload (FipS dump) * - Dump available notification MBOX command (0xCE, 0x78, 0x00) * diff --git a/hw/fsp/fsp-epow.c b/hw/fsp/fsp-epow.c index 79171c5..df36c46 100644 --- a/hw/fsp/fsp-epow.c +++ b/hw/fsp/fsp-epow.c @@ -129,7 +129,7 @@ static int64_t fsp_opal_get_epow_status(int16_t *out_epow, /* * There can be situations where the host and the Sapphire versions - * dont match with eact other and hence the expected system EPOW status + * don't match with eact other and hence the expected system EPOW status * details. Newer hosts might be expecting status for more number of EPOW * sub classes which Sapphire may not know about and older hosts might be * expecting status for EPOW sub classes which is a subset of what diff --git a/hw/fsp/fsp-leds.c b/hw/fsp/fsp-leds.c index dba7b35..c20049e 100644 --- a/hw/fsp/fsp-leds.c +++ b/hw/fsp/fsp-leds.c @@ -175,7 +175,7 @@ static void compute_encl_status_cec(struct fsp_led_data *encl_led) if (!strstr(led->loc_code, encl_led->loc_code)) continue; - /* Dont count the enclsure LED itself */ + /* Don't count the enclsure LED itself */ if (!strcmp(led->loc_code, encl_led->loc_code)) continue; @@ -350,7 +350,7 @@ static bool sai_update_notification(struct fsp_msg *msg) /* * Update both the local LED lists to reflect upon led state changes - * occured with the recent SPCN command. Subsequent LED requests will + * occurred with the recent SPCN command. Subsequent LED requests will * be served with these updates changed to the list. */ static void update_led_list(char *loc_code, u32 led_state, u32 excl_bit) @@ -751,7 +751,7 @@ static u32 fsp_push_data_to_tce(struct fsp_led_data *led, u8 *out_data, /* * Check for outbound buffer overflow. If there are still - * more LEDs to be sent across to FSP, dont send, ignore. + * more LEDs to be sent across to FSP, don't send, ignore. */ if ((total_size + lcode.size) > PSI_DMA_LOC_COD_BUF_SZ) return 0; @@ -1582,7 +1582,7 @@ static void fsp_process_leds_data(u16 len) * Process the entire captured data from the last command * * TCE mapped 'led_buffer' contains the fsp_led_data structure - * one after the other till the total lenght 'len'. + * one after the other till the total length 'len'. * */ buf = led_buffer; diff --git a/hw/fsp/fsp-mem-err.c b/hw/fsp/fsp-mem-err.c index 019e737..526afaf 100644 --- a/hw/fsp/fsp-mem-err.c +++ b/hw/fsp/fsp-mem-err.c @@ -351,7 +351,7 @@ static bool fsp_mem_err_msg(u32 cmd_sub_mod, struct fsp_msg *msg) /* * We get the memory relilence command from FSP for * correctable/Uncorrectable/scrub UE errors with real - * address of 4K memory page in which the error occured. + * address of 4K memory page in which the error occurred. */ paddr_start = *((u64 *)&msg->data.words[0]); printf("Got memory resilience error message for " diff --git a/hw/fsp/fsp.c b/hw/fsp/fsp.c index a23384c..c80fff7 100644 --- a/hw/fsp/fsp.c +++ b/hw/fsp/fsp.c @@ -109,7 +109,7 @@ static u64 fsp_hir_timeout; /* * We keep track on last logged values for some things to print only on - * value changes, but also to releive pressure on the tracer which + * value changes, but also to relieve pressure on the tracer which * doesn't do a very good job at detecting repeats when called from * many different CPUs */ diff --git a/hw/ipmi/ipmi-watchdog.c b/hw/ipmi/ipmi-watchdog.c index 498d4c6..7dfb0c0 100644 --- a/hw/ipmi/ipmi-watchdog.c +++ b/hw/ipmi/ipmi-watchdog.c @@ -40,9 +40,9 @@ #define WDT_TIMEOUT 600 /* How often to reset the timer using schedule_timer(). Too short and -we risk accidently resetting the system due to opal_run_pollers() not +we risk accidentally resetting the system due to opal_run_pollers() not being called in time, too short and we waste time resetting the wdt -more frequently than neccessary. */ +more frequently than necessary. */ #define WDT_MARGIN 300 static struct timer wdt_timer; diff --git a/hw/p5ioc2-phb.c b/hw/p5ioc2-phb.c index e3f546e..06c2cc2 100644 --- a/hw/p5ioc2-phb.c +++ b/hw/p5ioc2-phb.c @@ -906,7 +906,7 @@ static void p5ioc2_phb_hwinit(struct p5ioc2_phb *p) * wired on the motherboard). I set things up based on * the values I read on a Juno machine. We setup the BPR * with the various timeouts etc... as well based one - * similarily captured values + * similarly captured values */ if (p->is_pcie) { out_be32(p->regs + CAP_AER, 0x04000000); diff --git a/hw/p8-i2c.c b/hw/p8-i2c.c index 775e777..dfb26d4 100644 --- a/hw/p8-i2c.c +++ b/hw/p8-i2c.c @@ -294,7 +294,7 @@ static bool p8_i2c_has_irqs(struct p8_i2c_master *master) /* The i2c interrurpt was only added to Murano DD2.1 and Venice * DD2.0. When operating without interrupts, we need to bump the * timeouts as we rely solely on the polls from Linux which can - * be up to 2s appart ! + * be up to 2s apart ! * * Also we don't have interrupts for the Centaur i2c. */ @@ -466,7 +466,7 @@ static void p8_i2c_status_error(struct p8_i2c_master_port *port, */ if (!(status & I2C_STAT_NACK_RCVD_ERR)) { log_simple_error(&e_info(OPAL_RC_I2C_TRANSFER), - "I2C: Transfer error occured\n"); + "I2C: Transfer error occurred\n"); p8_i2c_print_debug_info(port, req); } diff --git a/include/errorlog.h b/include/errorlog.h index 1499587..33d2de2 100644 --- a/include/errorlog.h +++ b/include/errorlog.h @@ -29,7 +29,7 @@ #define OPAL_INPUT_OUTPUT_ERR_EVT 0x02 /* RESOURCE_DEALLOC: Hotplug events and errors */ #define OPAL_RESOURCE_DEALLOC_ERR_EVT 0x03 -/* MISC: Miscellanous error */ +/* MISC: Miscellaneous error */ #define OPAL_MISC_ERR_EVT 0x04 /* OPAL Subsystem IDs listed for reporting events/errors */ diff --git a/include/fsp-attn.h b/include/fsp-attn.h index 1eaa5bb..bc09fcc 100644 --- a/include/fsp-attn.h +++ b/include/fsp-attn.h @@ -60,7 +60,7 @@ struct sp_attn_area { /* Maximum sapphire version length (approx) */ #define VERSION_LEN 80 -/* Upto 10 frames each of length 40 bytes + header = 430 bytes */ +/* Up to 10 frames each of length 40 bytes + header = 430 bytes */ #define BT_FRAME_LEN 430 /* File info length : Use the rest of the memory for file details */ #define FILE_INFO_LEN (TI_MSG_LEN - VERSION_LEN - BT_FRAME_LEN) diff --git a/include/opal-api.h b/include/opal-api.h index e22370f..f70520b 100644 --- a/include/opal-api.h +++ b/include/opal-api.h @@ -926,7 +926,7 @@ struct opal_sg_entry { }; /* - * Candiate image SG list. + * Candidate image SG list. * * length = VER | length */ diff --git a/include/stack.h b/include/stack.h index 0009ea9..3c9799b 100644 --- a/include/stack.h +++ b/include/stack.h @@ -20,7 +20,7 @@ #include #define STACK_ENTRY_OPAL_API 0 /* OPAL call */ -#define STACK_ENTRY_HMI 0x0e60 /* Hypervisor maintainance */ +#define STACK_ENTRY_HMI 0x0e60 /* Hypervisor maintenance */ #define STACK_ENTRY_RESET 0x0100 /* System reset */ #define STACK_ENTRY_SOFTPATCH 0x1500 /* Soft patch (denorm emulation) */ diff --git a/include/xscom.h b/include/xscom.h index 09db99b..6e47c0d 100644 --- a/include/xscom.h +++ b/include/xscom.h @@ -99,7 +99,7 @@ * Generate a local address from a given ring/satellite/offset * combination: * - * Ring Satelite offset + * Ring Satellite offset * +---------+---------+-------------+ * | 4 | 4 | 6 | * +---------+---------+-------------+ diff --git a/libfdt/libfdt.h b/libfdt/libfdt.h index e51f364..a161224 100644 --- a/libfdt/libfdt.h +++ b/libfdt/libfdt.h @@ -62,7 +62,7 @@ #define FDT_ERR_NOTFOUND 1 /* FDT_ERR_NOTFOUND: The requested node or property does not exist */ #define FDT_ERR_EXISTS 2 - /* FDT_ERR_EXISTS: Attemped to create a node or property which + /* FDT_ERR_EXISTS: Attempted to create a node or property which * already exists */ #define FDT_ERR_NOSPACE 3 /* FDT_ERR_NOSPACE: Operation needed to expand the device @@ -505,7 +505,7 @@ const char *fdt_get_alias_namelen(const void *fdt, const char *name, int namelen); /** - * fdt_get_alias - retreive the path referenced by a given alias + * fdt_get_alias - retrieve the path referenced by a given alias * @fdt: pointer to the device tree blob * @name: name of the alias th look up * diff --git a/libflash/blocklevel.c b/libflash/blocklevel.c index d9be775..e97859c 100644 --- a/libflash/blocklevel.c +++ b/libflash/blocklevel.c @@ -248,7 +248,7 @@ static int insert_bl_prot_range(struct blocklevel_range *ranges, struct bl_prot_ /* * Check the inserted range isn't wedged between two ranges, if it - * is, merge aswell + * is, merge as well */ i++; if (i < count && range.start + range.len == old_ranges[i].start) { diff --git a/platforms/astbmc/common.c b/platforms/astbmc/common.c index 50341d6..2af0309 100644 --- a/platforms/astbmc/common.c +++ b/platforms/astbmc/common.c @@ -342,7 +342,7 @@ void astbmc_early_init(void) ast_setup_sio_uart1(UART_IO_BASE, UART_LPC_IRQ); } - /* Similarily, some BMCs don't configure the BT interrupt properly */ + /* Similarly, some BMCs don't configure the BT interrupt properly */ ast_setup_ibt(BT_IO_BASE, BT_LPC_IRQ); /* Setup UART and use it as console with interrupts */ diff --git a/platforms/ibm-fsp/firenze.c b/platforms/ibm-fsp/firenze.c index 507841d..4dd07a1 100644 --- a/platforms/ibm-fsp/firenze.c +++ b/platforms/ibm-fsp/firenze.c @@ -285,7 +285,7 @@ static void firenze_send_pci_inventory(void) aend = (end + 0xffful) & ~0xffful; offset = PSI_DMA_PCIE_INVENTORY + (base & 0xfff); - /* We can only accomodate so many entries in the PSI map */ + /* We can only accommodate so many entries in the PSI map */ if ((aend - abase) > PSI_DMA_PCIE_INVENTORY_SIZE) { prerror("PLAT: PCIe inventory too large (%lld bytes)\n", aend - abase); diff --git a/platforms/ibm-fsp/lxvpd.c b/platforms/ibm-fsp/lxvpd.c index 43a1c5e..1155070 100644 --- a/platforms/ibm-fsp/lxvpd.c +++ b/platforms/ibm-fsp/lxvpd.c @@ -157,7 +157,7 @@ static void lxvpd_parse_1004_map(struct phb *phb, const uint8_t *sm, uint8_t sz) num_slots = (sz / sizeof(struct pci_slot_entry_1004)); slot_info = lxvpd_alloc_slot_info(phb, num_slots); - /* Iterate thru the entries in the keyword */ + /* Iterate through the entries in the keyword */ entry = (const struct pci_slot_entry_1004 *)sm; for (slot = 0; slot < num_slots; slot++) { info = &slot_info[slot]; @@ -206,7 +206,7 @@ static void lxvpd_parse_1005_map(struct phb *phb, const uint8_t *sm, uint8_t sz) num_slots = (sz / sizeof(struct pci_slot_entry_1005)); slot_info = lxvpd_alloc_slot_info(phb, num_slots); - /* Iterate thru the entries in the keyword */ + /* Iterate through the entries in the keyword */ entry = (const struct pci_slot_entry_1005 *)sm; for (slot = 0; slot < num_slots; slot++) { info = &slot_info[slot]; -- cgit v1.1