From 0ed09ec18e3f856d5456908c4abe3649a025ea12 Mon Sep 17 00:00:00 2001 From: Nicholas Piggin Date: Sun, 8 Dec 2019 22:22:44 +1000 Subject: cpu: use dt accessor device tree access In several cases the make test reference .dts files were incorrectly byteswapped, these are fixed here too. Reviewed-by: Vasant Hegde Signed-off-by: Nicholas Piggin Signed-off-by: Oliver O'Halloran --- core/cpu.c | 2 +- core/device.c | 1 + core/fdt.c | 4 ++-- core/interrupts.c | 4 ++-- core/pci.c | 28 +++++++++++++--------------- hdata/fsp.c | 7 ++++--- hdata/iohub.c | 32 ++++++++++++++++---------------- hdata/test/op920.wsp.dts | 20 ++++++++++++++------ hdata/test/p8-840-spira.dts | 16 ++++++++-------- hdata/test/p81-811.spira.dts | 25 +++++++++++++------------ hw/fsp/fsp-sysparam.c | 4 ++-- hw/fsp/fsp.c | 2 +- hw/imc.c | 4 ++-- hw/lpc.c | 8 ++++---- hw/psi.c | 8 ++++---- hw/vas.c | 6 ++---- 16 files changed, 89 insertions(+), 82 deletions(-) diff --git a/core/cpu.c b/core/cpu.c index 99d016f..370bf4b 100644 --- a/core/cpu.c +++ b/core/cpu.c @@ -1214,7 +1214,7 @@ void init_all_cpus(void) t = &cpu_stacks[pir + thread].cpu; init_cpu_thread(t, state, pir + thread); t->trace = boot_cpu->trace; - t->server_no = ((const u32 *)p->prop)[thread]; + t->server_no = dt_property_get_cell(p, thread); t->is_secondary = true; t->primary = pt; t->node = cpu; diff --git a/core/device.c b/core/device.c index ce0171b..0118d48 100644 --- a/core/device.c +++ b/core/device.c @@ -1110,6 +1110,7 @@ void dt_adjust_subtree_phandle(struct dt_node *dev, continue; phandle = dt_prop_get_u32(node, *name); phandle += import_phandle; + phandle = cpu_to_be32(phandle); memcpy((char *)&prop->prop, &phandle, prop->len); } } diff --git a/core/fdt.c b/core/fdt.c index d3c6d9f..e093e8b 100644 --- a/core/fdt.c +++ b/core/fdt.c @@ -146,8 +146,8 @@ static void create_dtb_reservemap(void *fdt, const struct dt_node *root) ranges = (const void *)prop->prop; for (i = 0; i < prop->len / (sizeof(uint64_t) * 2); i++) { - base = *(ranges++); - size = *(ranges++); + base = be64_to_cpu(*(ranges++)); + size = be64_to_cpu(*(ranges++)); save_err(fdt_add_reservemap_entry(fdt, base, size)); } } diff --git a/core/interrupts.c b/core/interrupts.c index b0c1da1..10baa15 100644 --- a/core/interrupts.c +++ b/core/interrupts.c @@ -231,8 +231,8 @@ void add_opal_interrupts(void) names[tns++] = 0; i = count++; irqs = realloc(irqs, 8 * count); - irqs[i*2] = isn; - irqs[i*2+1] = iflags; + irqs[i*2] = cpu_to_be32(isn); + irqs[i*2+1] = cpu_to_be32(iflags); } } unlock(&irq_lock); diff --git a/core/pci.c b/core/pci.c index f74d716..e497fd5 100644 --- a/core/pci.c +++ b/core/pci.c @@ -1312,7 +1312,7 @@ void pci_std_swizzle_irq_map(struct dt_node *np, { uint32_t *map, *p; int dev, irq, esize, edevcount; - size_t map_size, isize; + size_t map_size; /* Some emulated setups don't use standard interrupts * representation @@ -1320,9 +1320,6 @@ void pci_std_swizzle_irq_map(struct dt_node *np, if (lstate->int_size == 0) return; - /* Size in bytes of a target interrupt */ - isize = lstate->int_size * sizeof(uint32_t); - /* Calculate the size of a map entry: * * 3 cells : PCI Address @@ -1362,22 +1359,23 @@ void pci_std_swizzle_irq_map(struct dt_node *np, for (dev = 0; dev < edevcount; dev++) { for (irq = 0; irq < 4; irq++) { /* Calculate pin */ + size_t i; uint32_t new_irq = (irq + dev + swizzle) % 4; /* PCI address portion */ - *(p++) = dev << (8 + 3); + *(p++) = cpu_to_be32(dev << (8 + 3)); *(p++) = 0; *(p++) = 0; /* PCI interrupt portion */ - *(p++) = irq + 1; + *(p++) = cpu_to_be32(irq + 1); /* Parent phandle */ - *(p++) = lstate->int_parent[new_irq]; + *(p++) = cpu_to_be32(lstate->int_parent[new_irq]); /* Parent desc */ - memcpy(p, lstate->int_val[new_irq], isize); - p += lstate->int_size; + for (i = 0; i < lstate->int_size; i++) + *(p++) = cpu_to_be32(lstate->int_val[new_irq][i]); } } @@ -1526,16 +1524,16 @@ static void __noinline pci_add_one_device_node(struct phb *phb, char name[MAX_NAME]; char compat[MAX_NAME]; uint32_t rev_class; - uint32_t reg[5]; + __be32 reg[5]; uint8_t intpin; bool is_pcie; - const uint32_t ranges_direct[] = { + const __be32 ranges_direct[] = { /* 64-bit direct mapping. We know the bridges * don't cover the entire address space so * use 0xf00... as a good compromise. */ - 0x02000000, 0x0, 0x0, - 0x02000000, 0x0, 0x0, - 0xf0000000, 0x0}; + cpu_to_be32(0x02000000), 0x0, 0x0, + cpu_to_be32(0x02000000), 0x0, 0x0, + cpu_to_be32(0xf0000000), 0x0}; pci_cfg_read32(phb, pd->bdfn, PCI_CFG_REV_ID, &rev_class); pci_cfg_read8(phb, pd->bdfn, PCI_CFG_INT_PIN, &intpin); @@ -1611,7 +1609,7 @@ static void __noinline pci_add_one_device_node(struct phb *phb, * entry in the "reg" property. That's enough for Linux and we might * even want to make this legit in future ePAPR */ - reg[0] = pd->bdfn << 8; + reg[0] = cpu_to_be32(pd->bdfn << 8); reg[1] = reg[2] = reg[3] = reg[4] = 0; dt_add_property(np, "reg", reg, sizeof(reg)); diff --git a/hdata/fsp.c b/hdata/fsp.c index 5923f1f..fe36eef 100644 --- a/hdata/fsp.c +++ b/hdata/fsp.c @@ -206,7 +206,7 @@ static void fsp_create_links(const void *spss, int index, chip = fsp_create_link(iopath, i, index); lp = lcount++; links = realloc(links, 4 * lcount); - links[lp] = chip; + links[lp] = cpu_to_be32(chip); } if (links) dt_add_property(fsp_node, "ibm,psi-links", links, lcount * 4); @@ -268,7 +268,7 @@ static void add_uart(const struct spss_iopath *iopath, struct dt_node *lpc) be32_to_cpu(iopath->lpc.uart_baud)); } -static void add_chip_id_to_sensors(struct dt_node *sensor_node, __be32 slca_index) +static void add_chip_id_to_sensors(struct dt_node *sensor_node, uint32_t slca_index) { unsigned int i; const void *hdif; @@ -347,7 +347,8 @@ static void add_ipmi_sensors(struct dt_node *bmc_node) dt_add_property_cells(sensor_node, "ipmi-sensor-type", ipmi_sensors->data[i].type); - add_chip_id_to_sensors(sensor_node, ipmi_sensors->data[i].slca_index); + add_chip_id_to_sensors(sensor_node, + be32_to_cpu(ipmi_sensors->data[i].slca_index)); } } diff --git a/hdata/iohub.c b/hdata/iohub.c index 6921d95..6647e6a 100644 --- a/hdata/iohub.c +++ b/hdata/iohub.c @@ -20,7 +20,7 @@ static bool io_get_lx_info(const void *kwvpd, unsigned int kwvpd_sz, { const void *lxr; char recname[5]; - uint32_t lxrbuf[2] = { 0, 0 }; + beint32_t lxrbuf[2] = { 0, 0 }; /* Find LXRn, where n is the index passed in*/ strcpy(recname, "LXR0"); @@ -38,17 +38,17 @@ static bool io_get_lx_info(const void *kwvpd, unsigned int kwvpd_sz, return false; } - memcpy(lxrbuf, lxr, sizeof(uint32_t)*2); + memcpy(lxrbuf, lxr, sizeof(beint32_t)*2); - prlog(PR_DEBUG, "CEC: LXRn=%d LXR=%08x%08x\n", lx_idx, lxrbuf[0], lxrbuf[1]); + prlog(PR_DEBUG, "CEC: LXRn=%d LXR=%08x%08x\n", lx_idx, be32_to_cpu(lxrbuf[0]), be32_to_cpu(lxrbuf[1])); prlog(PR_DEBUG, "CEC: LX Info added to %llx\n", (long long)hn); /* Add the LX info */ if (!dt_has_node_property(hn, "ibm,vpd-lx-info", NULL)) { dt_add_property_cells(hn, "ibm,vpd-lx-info", lx_idx, - lxrbuf[0], - lxrbuf[1]); + be32_to_cpu(lxrbuf[0]), + be32_to_cpu(lxrbuf[1])); } return true; @@ -109,12 +109,12 @@ static struct dt_node *io_add_phb3(const struct cechub_io_hub *hub, /* "reg" property contains in order the PE, PCI and SPCI XSCOM * addresses */ - reg[0] = pe_xscom; - reg[1] = 0x20; - reg[2] = pci_xscom; - reg[3] = 0x05; - reg[4] = spci_xscom; - reg[5] = 0x15; + reg[0] = cpu_to_be32(pe_xscom); + reg[1] = cpu_to_be32(0x20); + reg[2] = cpu_to_be32(pci_xscom); + reg[3] = cpu_to_be32(0x05); + reg[4] = cpu_to_be32(spci_xscom); + reg[5] = cpu_to_be32(0x15); dt_add_property(pbcq, "reg", reg, sizeof(reg)); /* A couple more things ... */ @@ -214,10 +214,10 @@ static struct dt_node *io_add_phb4(const struct cechub_io_hub *hub, return NULL; /* "reg" property contains (in order) the PE and PCI XSCOM addresses */ - reg[0] = pe_xscom; - reg[1] = 0x100; - reg[2] = pci_xscom; - reg[3] = 0x200; + reg[0] = cpu_to_be32(pe_xscom); + reg[1] = cpu_to_be32(0x100); + reg[2] = cpu_to_be32(pci_xscom); + reg[3] = cpu_to_be32(0x200); dt_add_property(pbcq, "reg", reg, sizeof(reg)); /* The hubs themselves go under the stacks */ @@ -322,7 +322,7 @@ static void io_add_p8_cec_vpd(const struct HDIF_common_hdr *sp_iohubs) } if (be32_to_cpu(iokids->count) > 1) { prlog(PR_WARNING, "CEC: WARNING ! More than 1 IO KID !!! (%d)\n", - iokids->count); + be32_to_cpu(iokids->count)); /* Ignoring the additional ones */ } diff --git a/hdata/test/op920.wsp.dts b/hdata/test/op920.wsp.dts index 057021f..e26fa12 100644 --- a/hdata/test/op920.wsp.dts +++ b/hdata/test/op920.wsp.dts @@ -76,6 +76,7 @@ sensor@8 { phandle = <0x2b>; compatible = "ibm,ipmi-sensor"; + ibm,chip-id = <0x00>; reg = <0x8>; ipmi-sensor-type = <0x7>; }; @@ -83,6 +84,7 @@ sensor@9 { phandle = <0x3f>; compatible = "ibm,ipmi-sensor"; + ibm,chip-id = <0x08>; reg = <0x9>; ipmi-sensor-type = <0x7>; }; @@ -139,6 +141,7 @@ sensor@59 { phandle = <0x18>; compatible = "ibm,ipmi-sensor"; + ibm,chip-id = <0x00>; reg = <0x59>; ipmi-sensor-type = <0x1>; }; @@ -146,6 +149,7 @@ sensor@5a { phandle = <0x1a>; compatible = "ibm,ipmi-sensor"; + ibm,chip-id = <0x00>; reg = <0x5a>; ipmi-sensor-type = <0x7>; }; @@ -153,6 +157,7 @@ sensor@a3 { phandle = <0x2c>; compatible = "ibm,ipmi-sensor"; + ibm,chip-id = <0x08>; reg = <0xa3>; ipmi-sensor-type = <0x1>; }; @@ -160,6 +165,7 @@ sensor@a4 { phandle = <0x2e>; compatible = "ibm,ipmi-sensor"; + ibm,chip-id = <0x08>; reg = <0xa4>; ipmi-sensor-type = <0x7>; }; @@ -433,6 +439,7 @@ sensor@e0 { phandle = <0x19>; compatible = "ibm,ipmi-sensor"; + ibm,chip-id = <0x00>; reg = <0xe0>; ipmi-sensor-type = <0x1>; }; @@ -440,6 +447,7 @@ sensor@e1 { phandle = <0x2d>; compatible = "ibm,ipmi-sensor"; + ibm,chip-id = <0x08>; reg = <0xe1>; ipmi-sensor-type = <0x1>; }; @@ -4166,7 +4174,7 @@ pbcq@4010c00 { phandle = <0x140>; - reg = <0xc0104 0x10000 0x8010d 0x20000>; + reg = <0x4010c00 0x100 0xd010800 0x200>; compatible = "ibm,power9-pbcq"; ibm,pec-index = <0x0>; #address-cells = <0x1>; @@ -4186,7 +4194,7 @@ pbcq@4011000 { phandle = <0x142>; - reg = <0x100104 0x10000 0x8010e 0x20000>; + reg = <0x4011000 0x100 0xe010800 0x200>; compatible = "ibm,power9-pbcq"; ibm,pec-index = <0x1>; #address-cells = <0x1>; @@ -4215,7 +4223,7 @@ pbcq@4011400 { phandle = <0x145>; - reg = <0x140104 0x10000 0x8010f 0x20000>; + reg = <0x4011400 0x100 0xf010800 0x200>; compatible = "ibm,power9-pbcq"; ibm,pec-index = <0x2>; #address-cells = <0x1>; @@ -4796,7 +4804,7 @@ pbcq@4010c00 { phandle = <0x15c>; - reg = <0xc0104 0x10000 0x8010d 0x20000>; + reg = <0x4010c00 0x100 0xd010800 0x200>; compatible = "ibm,power9-pbcq"; ibm,pec-index = <0x0>; #address-cells = <0x1>; @@ -4816,7 +4824,7 @@ pbcq@4011000 { phandle = <0x15e>; - reg = <0x100104 0x10000 0x8010e 0x20000>; + reg = <0x4011000 0x100 0xe010800 0x200>; compatible = "ibm,power9-pbcq"; ibm,pec-index = <0x1>; #address-cells = <0x1>; @@ -4845,7 +4853,7 @@ pbcq@4011400 { phandle = <0x161>; - reg = <0x140104 0x10000 0x8010f 0x20000>; + reg = <0x4011400 0x100 0xf010800 0x200>; compatible = "ibm,power9-pbcq"; ibm,pec-index = <0x2>; #address-cells = <0x1>; diff --git a/hdata/test/p8-840-spira.dts b/hdata/test/p8-840-spira.dts index dfd2628..625935d 100644 --- a/hdata/test/p8-840-spira.dts +++ b/hdata/test/p8-840-spira.dts @@ -1,8 +1,8 @@ /dts-v1/; -/memreserve/ 0x000070fd07000000 0x0000100000000000; -/memreserve/ 0x00006afd07000000 0x0000060000000000; -/memreserve/ 0x000051fd07000000 0x0000190000000000; +/memreserve/ 0x00000007fd510000 0x0000000000190000; +/memreserve/ 0x00000007fd6a0000 0x0000000000060000; +/memreserve/ 0x00000007fd700000 0x0000000000100000; / { phandle = <0x1>; #address-cells = <0x2>; @@ -12,7 +12,7 @@ nest-frequency = <0x0 0x77359400>; vendor = "IBM"; ibm,io-base-loc-code = "U78C9.001.WZS0CWX-P1"; - ibm,vpd-lx-info = <0x0 0x1040031 0x43003000>; + ibm,vpd-lx-info = <0x0 0x31000401 0x300043>; model = "8286-41A"; system-id = "TU00163"; system-brand = "S0"; @@ -991,7 +991,7 @@ pbcq@2012000 { phandle = <0x4c>; - reg = <0x200102 0x20000000 0x200109 0x5000000 0x3c0109 0x15000000>; + reg = <0x2012000 0x20 0x9012000 0x05 0x9013c00 0x15>; compatible = "ibm,power8-pbcq"; ibm,phb-index = <0x0>; ibm,hub-id = <0x0>; @@ -1002,7 +1002,7 @@ pbcq@2012400 { phandle = <0x4d>; - reg = <0x240102 0x20000000 0x240109 0x5000000 0x403c0109 0x15000000>; + reg = <0x2012400 0x20 0x9012400 0x05 0x9013c40 0x15>; compatible = "ibm,power8-pbcq"; ibm,phb-index = <0x1>; ibm,hub-id = <0x0>; @@ -1056,7 +1056,7 @@ pbcq@2012000 { phandle = <0x4e>; - reg = <0x200102 0x20000000 0x200109 0x5000000 0x3c0109 0x15000000>; + reg = <0x2012000 0x20 0x9012000 0x05 0x9013c00 0x15>; compatible = "ibm,power8-pbcq"; ibm,phb-index = <0x0>; ibm,hub-id = <0x1>; @@ -1067,7 +1067,7 @@ pbcq@2012400 { phandle = <0x4f>; - reg = <0x240102 0x20000000 0x240109 0x5000000 0x403c0109 0x15000000>; + reg = <0x2012400 0x20 0x9012400 0x05 0x9013c40 0x15>; compatible = "ibm,power8-pbcq"; ibm,phb-index = <0x1>; ibm,hub-id = <0x1>; diff --git a/hdata/test/p81-811.spira.dts b/hdata/test/p81-811.spira.dts index cea6a32..ed7bd5d 100644 --- a/hdata/test/p81-811.spira.dts +++ b/hdata/test/p81-811.spira.dts @@ -1,8 +1,9 @@ /dts-v1/; -/memreserve/ 0x000070fd1f000000 0x0000100000000000; -/memreserve/ 0x00d06bfd1f000000 0x0030040000000000; -/memreserve/ 0x006058fd1f000000 0x0070130000000000; +/memreserve/ 0x0000001ffd586000 0x0000000000137000; +/memreserve/ 0x0000001ffd6bd000 0x0000000000043000; +/memreserve/ 0x0000001ffd700000 0x0000000000100000; + / { phandle = <0x1>; #address-cells = <0x2>; @@ -12,7 +13,7 @@ nest-frequency = <0x0 0x77359400>; vendor = "IBM"; ibm,io-base-loc-code = "U78CB.001.WZS00AL-P1"; - ibm,vpd-lx-info = <0x0 0x1040031 0x42003000>; + ibm,vpd-lx-info = <0x0 0x31000401 0x300042>; model = "8247-22L"; system-id = "1010C8A"; system-brand = "S0"; @@ -1401,7 +1402,7 @@ hw-version = <0x2>; sw-version = <0x1>; primary; - ibm,psi-links = <0x0 0x10000000>; + ibm,psi-links = <0x0 0x10>; }; }; @@ -2209,7 +2210,7 @@ pbcq@2012000 { phandle = <0x95>; - reg = <0x200102 0x20000000 0x200109 0x5000000 0x3c0109 0x15000000>; + reg = <0x2012000 0x20 0x9012000 0x05 0x9013c00 0x15>; compatible = "ibm,power8-pbcq"; ibm,phb-index = <0x0>; ibm,hub-id = <0x0>; @@ -2220,7 +2221,7 @@ pbcq@2012400 { phandle = <0x96>; - reg = <0x240102 0x20000000 0x240109 0x5000000 0x403c0109 0x15000000>; + reg = <0x2012400 0x20 0x9012400 0x05 0x9013c40 0x15>; compatible = "ibm,power8-pbcq"; ibm,phb-index = <0x1>; ibm,hub-id = <0x0>; @@ -2273,7 +2274,7 @@ pbcq@2012000 { phandle = <0x97>; - reg = <0x200102 0x20000000 0x200109 0x5000000 0x3c0109 0x15000000>; + reg = <0x2012000 0x20 0x9012000 0x05 0x9013c00 0x15>; compatible = "ibm,power8-pbcq"; ibm,phb-index = <0x0>; ibm,hub-id = <0x1>; @@ -2284,7 +2285,7 @@ pbcq@2012400 { phandle = <0x98>; - reg = <0x240102 0x20000000 0x240109 0x5000000 0x403c0109 0x15000000>; + reg = <0x2012400 0x20 0x9012400 0x05 0x9013c40 0x15>; compatible = "ibm,power8-pbcq"; ibm,phb-index = <0x1>; ibm,hub-id = <0x1>; @@ -2336,7 +2337,7 @@ pbcq@2012000 { phandle = <0x99>; - reg = <0x200102 0x20000000 0x200109 0x5000000 0x3c0109 0x15000000>; + reg = <0x2012000 0x20 0x9012000 0x05 0x9013c00 0x15>; compatible = "ibm,power8-pbcq"; ibm,phb-index = <0x0>; ibm,hub-id = <0x2>; @@ -2388,7 +2389,7 @@ pbcq@2012000 { phandle = <0x9a>; - reg = <0x200102 0x20000000 0x200109 0x5000000 0x3c0109 0x15000000>; + reg = <0x2012000 0x20 0x9012000 0x05 0x9013c00 0x15>; compatible = "ibm,power8-pbcq"; ibm,phb-index = <0x0>; ibm,hub-id = <0x3>; @@ -2399,7 +2400,7 @@ pbcq@2012400 { phandle = <0x9b>; - reg = <0x240102 0x20000000 0x240109 0x5000000 0x403c0109 0x15000000>; + reg = <0x2012400 0x20 0x9012400 0x05 0x9013c40 0x15>; compatible = "ibm,power8-pbcq"; ibm,phb-index = <0x1>; ibm,hub-id = <0x3>; diff --git a/hw/fsp/fsp-sysparam.c b/hw/fsp/fsp-sysparam.c index 09005ef..0e1e818 100644 --- a/hw/fsp/fsp-sysparam.c +++ b/hw/fsp/fsp-sysparam.c @@ -469,8 +469,8 @@ static void add_opal_sysparam_node(void) strcpy(s, sysparam_attrs[i].name); s = s + strlen(sysparam_attrs[i].name) + 1; - ids[i] = sysparam_attrs[i].id; - lens[i] = sysparam_attrs[i].length; + ids[i] = cpu_to_be32(sysparam_attrs[i].id); + lens[i] = cpu_to_be32(sysparam_attrs[i].length); perms[i] = sysparam_attrs[i].perm; } diff --git a/hw/fsp/fsp.c b/hw/fsp/fsp.c index f368998..2b2c537 100644 --- a/hw/fsp/fsp.c +++ b/hw/fsp/fsp.c @@ -1912,7 +1912,7 @@ static void fsp_init_links(struct dt_node *fsp_node) u64 reg; u32 link; - link = ((const u32 *)linksprop->prop)[i]; + link = be32_to_cpu(((const __be32 *)linksprop->prop)[i]); fiop = &fsp->iopath[i]; fiop->psi = psi_find_link(link); if (fiop->psi == NULL) { diff --git a/hw/imc.c b/hw/imc.c index ca06f3c..16b060d 100644 --- a/hw/imc.c +++ b/hw/imc.c @@ -458,8 +458,8 @@ static void imc_dt_update_nest_node(struct dt_node *dev) base_addr = malloc(sizeof(uint64_t) * nr_chip); chipids = malloc(sizeof(uint32_t) * nr_chip); for_each_chip(chip) { - base_addr[i] = chip->homer_base; - chipids[i] = chip->id; + base_addr[i] = cpu_to_be64(chip->homer_base); + chipids[i] = cpu_to_be32(chip->id); i++; } diff --git a/hw/lpc.c b/hw/lpc.c index 354d2b4..ec5146f 100644 --- a/hw/lpc.c +++ b/hw/lpc.c @@ -873,7 +873,7 @@ unsigned int lpc_get_irq_policy(uint32_t chip_id, uint32_t psi_idx) static void lpc_create_int_map(struct lpcm *lpc, struct dt_node *psi_node) { - uint32_t map[LPC_NUM_SERIRQ * 5], *pmap; + __be32 map[LPC_NUM_SERIRQ * 5], *pmap; uint32_t i; if (!psi_node) @@ -884,9 +884,9 @@ static void lpc_create_int_map(struct lpcm *lpc, struct dt_node *psi_node) continue; *(pmap++) = 0; *(pmap++) = 0; - *(pmap++) = i; - *(pmap++) = psi_node->phandle; - *(pmap++) = lpc->sirq_routes[i] + P9_PSI_IRQ_LPC_SIRQ0; + *(pmap++) = cpu_to_be32(i); + *(pmap++) = cpu_to_be32(psi_node->phandle); + *(pmap++) = cpu_to_be32(lpc->sirq_routes[i] + P9_PSI_IRQ_LPC_SIRQ0); } if (pmap == map) return; diff --git a/hw/psi.c b/hw/psi.c index 73e49ce..30c2a6c 100644 --- a/hw/psi.c +++ b/hw/psi.c @@ -786,10 +786,10 @@ static void psi_create_p9_int_map(struct psi *psi, struct dt_node *np) int i; for (i = 0; i < P9_PSI_NUM_IRQS; i++) { - map[i][0] = i; - map[i][1] = get_ics_phandle(); - map[i][2] = psi->interrupt + i; - map[i][3] = 1; + map[i][0] = cpu_to_be32(i); + map[i][1] = cpu_to_be32(get_ics_phandle()); + map[i][2] = cpu_to_be32(psi->interrupt + i); + map[i][3] = cpu_to_be32(1); } dt_add_property(np, "interrupt-map", map, sizeof(map)); dt_add_property_cells(np, "#address-cells", 0); diff --git a/hw/vas.c b/hw/vas.c index b913519..b4af31d 100644 --- a/hw/vas.c +++ b/hw/vas.c @@ -379,7 +379,6 @@ static struct vas *alloc_vas(uint32_t chip_id, uint32_t vas_id, uint64_t base) static void create_mm_dt_node(struct proc_chip *chip) { - int gcid; struct dt_node *dn; struct vas *vas; uint64_t hvwc_start, hvwc_len; @@ -388,7 +387,6 @@ static void create_mm_dt_node(struct proc_chip *chip) uint64_t pbf_start, pbf_nbits; vas = chip->vas; - gcid = chip->id; get_hvwc_mmio_bar(chip->id, &hvwc_start, &hvwc_len); get_uwc_mmio_bar(chip->id, &uwc_start, &uwc_len); get_paste_bar(chip->id, &pbar_start, &pbar_len); @@ -404,8 +402,8 @@ static void create_mm_dt_node(struct proc_chip *chip) pbar_start, pbar_len, pbf_start, pbf_nbits); - dt_add_property(dn, "ibm,vas-id", &vas->vas_id, sizeof(vas->vas_id)); - dt_add_property(dn, "ibm,chip-id", &gcid, sizeof(gcid)); + dt_add_property_cells(dn, "ibm,vas-id", vas->vas_id); + dt_add_property_cells(dn, "ibm,chip-id", chip->id); if (vas->vas_irq) { dt_add_property_cells(dn, "interrupts", vas->vas_irq, 0); dt_add_property_cells(dn, "interrupt-parent", -- cgit v1.1