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This patch adds opencapi support on ZZ. It hard-codes the required
device tree entries for the NPU and links. The alternative was to use
HDAT, but it somehow proved too painful to do.
The new device tree entries activate the npu2 init code on ZZ. On
systems with no opencapi adapters, it should go unnoticed, as presence
detection will skip link training.
Signed-off-by: Frederic Barrat <fbarrat@linux.ibm.com>
Reviewed-by: Oliver O'Halloran <oohall@gmail.com>
Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
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>From Gautham's patch to fix pstates_init() that this was based on:
> On FSP based systems (particularly POWER8), we perform
> occ_pstates_init() late in the boot to allow OCC to be loaded. Hence
> this was being performed in platform.exit(). occ_pstates_init() would
> add pstate information into the device-tree.
>
> A recent commit 9fc0c1287ada ("Move FSP specific op-panel calls to
> platform.exit()") moved the invocation of platform.exit() after the
> creation of device-tree blob. As a result, on FSP based systems, we
> don't have the pstate information in the device-tree, and thus the
> Kernel is unable to perform frequency scaling.
>
> Fix this by moving occ_pstates_init() out of ibm_fsp_exit() and call
> it before the creation of the device-tree blob.
The same patch also broke fast-reboot on ZZ. Without this patch applied
we get the following assert() fail when fast rebooting:
[ 1153.398889405,5] CUPD: Waiting read marker LID and in flight parsm completion...
[ 1153.398892228,3] Duplicate property "mi-version" in node /ibm,opal/firmware
[ 1153.398894036,0] Aborting!
CPU 0054 Backtrace:
S: 0000000031ea39b0 R: 0000000030013828 .backtrace+0x34
S: 0000000031ea3a70 R: 000000003001b268 ._abort+0x4c
S: 0000000031ea3af0 R: 0000000030027788 .new_property+0x80
S: 0000000031ea3b80 R: 00000000300278d0 .dt_add_property+0xa8
S: 0000000031ea3c10 R: 0000000030081a98 .fsp_code_update_wait_vpd+0x19c
S: 0000000031ea3d10 R: 000000003008ff98 .ibm_fsp_exit+0x1c
S: 0000000031ea3d80 R: 0000000030014864 .load_and_boot_kernel+0xb14
S: 0000000031ea3e60 R: 000000003002685c .fast_reboot_entry+0x38c
S: 0000000031ea3f00 R: 0000000030002988 reset_fast_reboot_wakeup+0x40
This happens because fsp_code_update_wait_vpd(true) adds some properties
to the DT so moving it to finalise_dt fixes that crash too.
Cc: Vasant Hegde <hegdevasant@linux.vnet.ibm.com>
Cc: Gautham R. Shenoy <ego@linux.vnet.ibm.com>
Cc: Vaidyanathan Srinivasan <svaidy@linux.ibm.com>
Fixes: 9fc0c1287ada ("Move FSP specific op-panel calls to platform.exit()")
Signed-off-by: Oliver O'Halloran <oohall@gmail.com>
Tested-by: Gautham R. Shenoy <ego@linux.vnet.ibm.com>
Reviewed-by: Vasant Hegde <hegdevasant@linux.vnet.ibm.com>
Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
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This information is consumed by Linux so it needs to be in the DT. Move
it to finalise_dt().
Cc: A Russian <aik@ozlabs.ru>
Fixes: 9fc0c1287ada ("Move FSP specific op-panel calls to platform.exit()")
Signed-off-by: Oliver O'Halloran <oohall@gmail.com>
Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
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The platform is a new storage controller for TATLIN server.
Based on IBM Romulus reference design (POWER9).
Signed-off-by: Artem Senichev <a.senichev@yadro.com>
Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
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We have new platform type under ZZ. Lets add them. With this fix
we are able to boot the system.
Signed-off-by: Vasant Hegde <hegdevasant@linux.vnet.ibm.com>
Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
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Now, with CONFIG_FSP=0/1 we have:
1.6M/1.4M skiboot.lid
323K/375K skiboot.lid.xz
Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
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Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
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Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
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Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
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Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
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Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
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We move the platform exit call much closer to executing the kernel,
which should all be safe, and in fact a much better time to do watchdog
related things.
Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
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Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
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It's only used on FSP systems so should really just be part of that
platform support.
Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
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Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
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We have an implementation for non-FSP systems now, and we shouldn't be
calling that from code in an fsp/ directory, so move op_display() to a
platform function.
Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
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Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
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It's been a good long while since either OPAL POWER7 user touched a
machine, and even longer since they'd have been okay using an old
version rather than tracking master.
There's also been no testing of OPAL on POWER7 systems for an awfully
long time, so it's pretty safe to assume that it's very much bitrotted.
It also saves a whole 14kb of xz compressed payload space.
Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
Enthusiasticly-Acked-by: Oliver O'Halloran <oohall@gmail.com>
Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
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This patch implements generic interface to pass data from FSP to HBRT during
runtime (FSP -> OPAL -> opal-prd -> HBRT).
OPAL gets notification from FSP for new HBRT messages. We will convert MBOX
message to firmware_notify format and send it to HBRT.
Signed-off-by: Vasant Hegde <hegdevasant@linux.vnet.ibm.com>
Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
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We have user space opal-prd running on ZZ. We don't use host services.
Hence do not call hservices_init().
CC: Jeremy Kerr <jk@ozlabs.org>
Signed-off-by: Vasant Hegde <hegdevasant@linux.vnet.ibm.com>
Acked-by: Jeremy Kerr <jk@ozlabs.org>
Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
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Replace raw protocol with OEM message supported by OpenBMC's IPMI
plugins.
BMC-side implementation (IPMI plug-in):
https://github.com/YADRO-KNS/phosphor-pci-inventory
Signed-off-by: Artem Senichev <a.senichev@yadro.com>
Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
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These new QEMU platforms have characteristics closer to real OpenPOWER
systems that we use today and define a different BMC depending on the
CPU type. New platform properties are introduced for each,
"qemu,powernv8", "qemu,powernv9" and these should be compatible with
existing QEMUs which only expose the "qemu,powernv" property
Signed-off-by: Cédric Le Goater <clg@kaod.org>
Reviewed-by: Joel Stanley <joel@jms.id.au>
Reviewed-by: Andrew Jeffery <andrew@aj.id.au>
Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
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On some POWER8 astbmc systems an update to the SBE requires pausing at
runtime to ensure integrity of the SBE. If this is required the BMC will
set a chassis boot option IPMI flag using the OEM parameter 0x62. If
Skiboot sees this flag is set it waits until the SBE update is complete
and the flag is cleared.
Unfortunately the mystery operation that validates the SBE also leaves
it in a bad state and unable to be used for timer operations. To
workaround this the flag is checked as soon as possible (ie. when IPMI
and the console are set up), and once complete the system is rebooted.
Signed-off-by: Samuel Mendoza-Jonas <sam@mendozajonas.com>
Reviewed-by: Vasant Hegde <hegdevasant@linux.vnet.ibm.com>
Reviewed-by: Andrew Jeffery <andrew@aj.id.au>
Signed-off-by: Oliver O'Halloran <oohall@gmail.com>
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Signed-off-by: Timothy Pearson <tpearson@raptorengineering.com>
Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
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Talos II has some hardware differences from Romulus, therefore
we cannot guarantee Talos II == Romulus in skiboot. Copy and
slightly modify the Romulus files for Talos II.
Signed-off-by: Timothy Pearson <tpearson@raptorengineering.com>
Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
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For some system planars we need to apply some fixups to the PCI slot
power controllers. These are done at boot time and a slightly bizzare in
their construction since they share the I2C request completion callback
with the runtime slot power on method which affects the PCI slot state
machine.
This is confusing to say the least, so this patch reworks the fixup code
to use the synchronus I2C request code rather than open-coding the wait
based on what PCI slot state is in use. It also does some general
control flow cleanup and adds some comments explaining what the fixups
are for.
Signed-off-by: Oliver O'Halloran <oohall@gmail.com>
Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
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Initialising raw flash lead to a dead assignment to rc. Check the return
code and take the failure path as necessary. Both before and after the
fix we see output along the lines of the following when flash_init()
fails:
[ 53.283182881,7] IRQ: Registering 0800..0ff7 ops @0x300d4b98 (data 0x3052b9d8)
[ 53.283184335,7] IRQ: Registering 0ff8..0fff ops @0x300d4bc8 (data 0x3052b9d8)
[ 53.283185513,7] PHB#0000: Initializing PHB...
[ 53.288260827,4] FLASH: Can't load resource id:0. No system flash found
[ 53.288354442,4] FLASH: Can't load resource id:1. No system flash found
[ 53.342933439,3] CAPP: Error loading ucode lid. index=200ea
[ 53.462749486,2] NVRAM: Failed to load
[ 53.462819095,2] NVRAM: Failed to load
[ 53.462894236,2] NVRAM: Failed to load
[ 53.462967071,2] NVRAM: Failed to load
[ 53.463033077,2] NVRAM: Failed to load
[ 53.463144847,2] NVRAM: Failed to load
Eventually followed by:
[ 57.216942479,5] INIT: platform wait for kernel load failed
[ 57.217051132,5] INIT: Assuming kernel at 0x20000000
[ 57.217127508,3] INIT: ELF header not found. Assuming raw binary.
[ 57.217249886,2] NVRAM: Failed to load
[ 57.221294487,0] FATAL: Kernel is zeros, can't execute!
[ 57.221397429,0] Assert fail: core/init.c:615:0
[ 57.221471414,0] Aborting!
CPU 0028 Backtrace:
S: 0000000031d43c60 R: 000000003001b274 ._abort+0x4c
S: 0000000031d43ce0 R: 000000003001b2f0 .assert_fail+0x34
S: 0000000031d43d60 R: 0000000030014814 .load_and_boot_kernel+0xae4
S: 0000000031d43e30 R: 0000000030015164 .main_cpu_entry+0x680
S: 0000000031d43f00 R: 0000000030002718 boot_entry+0x1c0
--- OPAL boot ---
Analysis of the execution paths suggests we'll always "safely" end this
way due the setup sequence for the blocklevel callbacks in flash_init()
and error handling in blocklevel_get_info(), and there's no current risk
of executing from unexpected memory locations. As such the issue is
reduced to down to a fix for poor error hygene in the original change
and a resolution for a Coverity warning (famous last words etc).
Fixes: c826e1ca9e5b ("astbmc: Try IPMI HIOMAP for P8 (again)")
Signed-off-by: Andrew Jeffery <andrew@aj.id.au>
Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
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PCIe ports connected to CPU1 and CPU3 now work as x16 instead of x8x8.
Signed-off-by: Artem Senichev <a.senichev@yadro.com>
Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
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We can slot information from the LXVPD without having power control
information about that slot. This patch changes the init path so that
we always override the add_properties() call rather than only when we
have power control information about the slot.
Signed-off-by: Oliver O'Halloran <oohall@gmail.com>
Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
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Useful to know since it changes the behaviour of the slot core.
Signed-off-by: Oliver O'Halloran <oohall@gmail.com>
Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
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GPUs on Redbud and Sequoia platforms are interconnected in groups of
2 or 3 GPUs. The problem with that is if the user decides to pass a single
GPU from a group to the userspace, we need to ensure that links between
GPUs do not get enabled.
A V100 GPU provides a way to disable selected links. In order to only
disable links to peer GPUs, we need a topology map.
This adds an "ibm,nvlink-peers" property to a GPU DT node with phandles
of peer GPUs and NVLink2 bridges. The index in the property is a GPU link
number.
Signed-off-by: Alexey Kardashevskiy <aik@ozlabs.ru>
Acked-by: Reza Arbab <arbab@linux.ibm.com>
[stewart: fixed strtol found in review by Reza]
Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
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The two are similar enough and I'd like to have a slot table for our
Talos.
Cc: Timothy Pearson <tpearson@raptorengineering.com>
Signed-off-by: Oliver O'Halloran <oohall@gmail.com>
Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
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During some code updates the slot labels were updated to reflect
the phb layout, however expectations were that the slot labels be
aligned with the riser card slots and not the system planar slots.
[stewart: The tale of how we got here is long and varied and not at
all clear. The first ESS systems went out with a skiboot v5.9.8 with
additional SuperMicro patches. It was probably a slot table, but who knows,
we don't have the code so can't check. It's possible it was all coming
in through HDAT instead). The op-build tree (thus the exact patches)
shipped on systems that work correct seems to not be around anywhere anymore
(if it ever was). It was only in skiboot v6.0 that a slot table made
it in, and, of course, only having remote machines in random configs,
including possibly with riser cards from Briggs&Stratton rather than
the ones destined for this system, doesn't make for verifying this
at all. It also doesn't help that *consistently* there is *never*
any review on slot tables, and we've had things be wrong in the past.
Combine this with not upstream Hostboot patches.]
Cc: skiboot-stable@lists.ozlabs.org
Cc: Benjamin Mashak <mashak@us.ibm.com>
Cc: Michael Lim <youhour@us.ibm.com>
Fixes: 64a16ae05bb2 ("p9dsu: Fix slot labels for p9dsu2u")
Fixes: 87517c8737b9 ("p9dsu: Fix p9dsu slot tables")
Fixes: 31231ed300f2 ("p9dsu: Fix p9dsu default variant")
Signed-off-by: Deb McLemore <debmc@linux.ibm.com>
[stewart: added more detailed explanation, cc stable]
Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
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Update the slot labels for the p9dsu2u tables.
Signed-off-by: Deb McLemore <debmc@linux.ibm.com>
Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
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>From memory this was disabled in the distant past since we were waiting
for an updates to the LXPVD format. It looks like that never happened
so re-enable it for the ZZ platform so that we can get PCI slot location
codes on ZZ.
Cc: Vasant Hegde <hegdevasant@linux.vnet.ibm.com>
Signed-off-by: Oliver O'Halloran <oohall@gmail.com>
Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
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Frederic reported that Zaius was failing with a NULL dereference when
trying to initialise IPMI HIOMAP. It turns out that the BMC wasn't
described at all, so add a description.
Tested on zaius1, which reached petitboot with the patch applied.
Reported-by: Frederic Barrat <fbarrat@linux.ibm.com>
Tested-by: Frederic Barrat <fbarrat@linux.ibm.com>
Signed-off-by: Andrew Jeffery <andrew@aj.id.au>
Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
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Required for Habanero, Palmetto and Romulus.
Cc: Lei YU <mine260309@gmail.com>
Cc: Uma Yadlapati <yadlapat@us.ibm.com>
Signed-off-by: Andrew Jeffery <andrew@aj.id.au>
Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
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The HIOMAP protocol was developed after the release of P8 in preparation
for P9. As a consequence P9 always uses it, but it has rarely been
enabled for P8. P8DTU has recently added IPMI HIOMAP support to its BMC
firmware, so enable its use in skiboot with P8 machines. Doing so
requires some rework to ensure fallback works correctly as in the past
the fallback was to mbox, which will only work for P9.
Tested on Garrison, Palmetto without HIOMAP, Palmetto with HIOMAP, and
Witherspoon.
Signed-off-by: Andrew Jeffery <andrew@aj.id.au>
Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
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If we're missing chips for some reason, we print a warning when configuring
the PCIe shared slot.
The warning doesn't really make it clear what "shared slot" is, and if it's
printed, it'll come right after a bunch of messages about NPU setup, so
let's clarify the message to explicitly mention PCI.
Signed-off-by: Andrew Donnellan <andrew.donnellan@au1.ibm.com>
[stewart: bikeshed]
Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
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This reverts commit bd9839684d482417e8c60449592f4308e9a91dac as it broke
booting on P8 systems, including Garrison (AMI BMC), Firestone (AMI BMC)
and QEMU (BMC simulator).
Issue https://github.com/open-power/skiboot/issues/217 tracks the
failure. The P8 IPMI HIOMAP feature can be re-enabled once this issue is
resolved.
Reported-by: Sam Mendoza-Jonas <sam@mendozajonas.com>
Reported-by: Sam Mendoza-Jonas <sam@mendozajonas.com>
Signed-off-by: Joel Stanley <joel@jms.id.au>
Acked-by: Sam Mendoza-Jonas <sam@mendozajonas.com>
Acked-by: Sam Mendoza-Jonas <sam@mendozajonas.com>
Tested-by: Alexey Kardashevskiy <aik@ozlabs.ru>
Acked-by: Andrew Jeffery <andrew@aj.id.au>
Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
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Set the attributes on the slot tables to account for
builtin or pluggable etypes, this will allow pci
enumeration to calculate subordinate buses.
Update some slot label strings.
Add WIO Slot5 which is standard on the ESS config.
Signed-off-by: Deb McLemore <debmc@linux.ibm.com>
Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
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Add the default when no riser_id is returned from the ipmi query.
This addresses: https://github.com/open-power/boston-openpower/issues/1369
Allow a little more time for BMC reply and cleanup some label strings.
Signed-off-by: Deb McLemore <debmc@linux.ibm.com>
Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
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We can no-longer read the values from the BMC in the way we have in the
past. Values were provided by Eric Chen of SMC.
Signed-off-by: Andrew Jeffery <andrew@aj.id.au>
Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
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Signed-off-by: Andrew Jeffery <andrew@aj.id.au>
Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
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The HIOMAP protocol was developed after the release of P8 in preparation
for P9. As a consequence P9 always uses it, but it has rarely been
enabled for P8. P8DTU has recently added IPMI HIOMAP support to its BMC
firmware, so enable its use in skiboot with P8 machines. Doing so
requires some rework to ensure fallback works correctly as in the past
the fallback was to mbox, which will only work for P9.
Signed-off-by: Andrew Jeffery <andrew@aj.id.au>
Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
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Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
Acked-by: Andrew Donnellan <andrew.donnellan@au1.ibm.com>
Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
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Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
Acked-by: Andrew Donnellan <andrew.donnellan@au1.ibm.com>
Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
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Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
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Just use the normal for_each_compatible instead.
Otherwise in the qemu model as executed by op-test,
we wouldn't go down the astbmc_init() path, thus not having flash.
Cc: stable # v6.2+
Fixes: 2f0b6af6e01c5f7b3c762647d06c4f792e2cb3b7
Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
Reviewed-by: Cédric Le Goater <clg@kaod.org>
Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
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A QEMU PowerNV machine does not necessarily have a BT device. It needs
to be defined on the command line with :
-device ipmi-bmc-sim,id=bmc0 -device isa-ipmi-bt,bmc=bmc0,irq=10
When the QEMU platform is initialized by skiboot, we need to check
that such a device is present and if not, skip the AST initialization.
Fixes: 8340a9642bba ("plat/qemu: use the common OpenPOWER routines to initialize")
Signed-off-by: Cédric Le Goater <clg@kaod.org>
Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
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