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Signed-off-by: Jim Yuan <jim.yuan@supermicro.com>
[stewart@linux.vnet.ibm.com: Adapted to new bmc_platform functionality]
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
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From:
https://github.com/supermicro/p8dtu-op-build/blob/9e8242de579ce947a3d30df8b8ddb94584783f91/openpower/package/skiboot/skiboot-0001-add-p8dtu1u-and-p8dtu2u-mode-in-skiboot.patch
Signed-off-by: Jim Yuan <jim.yuan@supermicro.com>
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
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An out of tree platform (p8dtu) uses a different IPMI OEM command
for IPMI_PARTIAL_ADD_ESEL. This exposed some assumptions about the BMC
implementation in our core code.
Now, with platform.bmc, each platform can dictate (or detect) the BMC
that is present. We allow it to be set at runtime rather than purely
statically in struct platform as it's possible to have differing BMC
implementations on the one machine (e.g. AMI BMC or OpenBMC).
Acked-by: Jeremy Kerr <jk@ozlabs.org>
[stewart@linux.vnet.ibm.com: remove enum, update (C) years]
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
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No functional change
Signed-off-by: Michael Neuling <mikey@neuling.org>
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
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Also moves some code around to ensure things are defined before they
are used.
Signed-off-by: Michael Neuling <mikey@neuling.org>
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
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Also changes the function name:
mambo_read/write() -> mambo_console_read/write()
Signed-off-by: Michael Neuling <mikey@neuling.org>
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
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Signed-off-by: Michael Neuling <mikey@neuling.org>
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
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To be used for rtc and simstop calls
Signed-off-by: Michael Neuling <mikey@neuling.org>
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
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Make callthru functions return 64 bits so we can return larger
numbers.
Signed-off-by: Michael Neuling <mikey@neuling.org>
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
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Recent changes to the skiboot resource loading code means that reads for
BOOTKERNEL and ROOTFS partitions will be exactly the number of bytes
required and no longer the (inaccurate) partition total size which
happened to be block size aligned.
Error when booting in mambo:
1140078: (1140078): [ 0.001132323,3] FLASH: failed to read content
size 14252376 BOOTKERNEL partition, rc -1
Signed-off-by: Cyril Bur <cyril.bur@au1.ibm.com>
[initial review and changes by Mikey Neuling]
Signed-off-by: Michael Neuling <mikey@neuling.org>
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
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PCI slot pfreset() operation is obsoleted as nobody uses it. This
removes it and the related PCI slot states. No functional changes
introduced.
Signed-off-by: Gavin Shan <gwshan@linux.vnet.ibm.com>
Acked-by: Russell Currey <ruscur@russell.cc>
Reviewed-by: Andrew Donnellan <andrew.donnellan@au1.ibm.com>
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
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Various backends define their own PCI slot states for flexibility
with numbers [A]. PCI core also defines its PCI slot states [B].
For one specific PCI slot state, the major number of [A] and [B]
should be same so that the corresponding operation can be found.
It means [A] and [B] are relevant to some extent, but the code
where defines the PCI slots in backends doesn't reflect it.
This makes the major PCI slot state defined in backend same to
the corresponding one defined in PCI core. The minor PCI slot
states are made to be incremental to their base number (major
PCI slot state). No functional changes introduced.
Signed-off-by: Gavin Shan <gwshan@linux.vnet.ibm.com>
Acked-by: Russell Currey <ruscur@russell.cc>
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
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This claims PCIe surprise hotplug capability through device node's
property "ibm,slot-surprise-pluggable". The slot has the capability
when surprise hotplug is supported in its slot's capability bits or
link state change reporting is supported in PCIe link capability bits.
In order for link state events to be properly raised during surprise
hotplug, the power supply to the slot should be always on. The slot's
power state should be switched accordingly during fundamental reset.
Signed-off-by: Gavin Shan <gwshan@linux.vnet.ibm.com>
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
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This is an experimental patch that implements "Fast reboot" on P8
machines.
The basic idea is that when the OS calls OPAL reboot, we gather all
the threads in the system using a combination of patching the reset
vector and soft-resetting them, then cleanup a few bits of hardware
(we do re-probe PCIe for example), and reload & restart the bootloader.
For Trusted Boot, this means we *add* measurements to the TPM, so you
will get *different* PCR values as compared to a full IPL. This makes
sense as if you want to be sure you are running something known then,
well, do a full IPL as soft reset should never be trusted to clear any
malicious code.
This is very experimental and needs a lot of testing and also auditing
code for other bits of HW that might need to be cleaned up.
BenH TODO: I also need to check if we are properly PERST'ing PCI devices.
This is partially based on old code I had to do that on P7. I only
support it on P8 though as there are issues with the PSI interrupts
on P7 that cannot be reliably solved.
Even though this should be considered somewhat experimental, we've had
a lot of success on a variety of machines. Dozens/hundreds of reboots
across Tuleta, Garrison and Habanero.
Currently, we've hidden it behind a NVRAM config option, which *is*
liable to change in the future (to ensure that only those who know
what they're doing enable it)
You can enable the experimental support via nvram option:
nvram -p ibm,skiboot --update-config experimental-fast-reset=feeling-lucky
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
[stewart@linux.vnet.ibm.com: hide behind nvram option, include Mambo fixes
from Mikey]
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
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In the PCI post-fundamental reset code, a hot reset is performed at the
end. This is causing issues at boot time as a reset signal is being sent
downstream before the links are up, which is causing issues on adapters
behind switches. No errors result in skiboot, but the adapters are not
usable in Linux as a result.
Hot resets also occur in the FSP platform-specific code for conventional
PCI slots, which could cause issues.
This patch fixes some adapters not being configurable in Linux on some
systems. The issue was not present in skiboot 5.2.x.
Cc: stable # 5.3.x
Signed-off-by: Russell Currey <ruscur@russell.cc>
Acked-by: Gavin Shan <gwshan@linux.vnet.ibm.com>
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
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We might insert a PCIe switch to PHB direct slot and the downstream
ports of the PCIe switch supports PCI hotplug. This creates dynamic
PCI slots for the downstream ports in the scenario:
* The dynamic PCI slot's label has fixed encoding: "S<domain><bus_num>".
* No associated platform slot.
* The management on dynamic PCI slot relies on the generic layer
implemented in pcie-slot.c.
Requested-by: Li Meng <shlimeng@cn.ibm.com>
Signed-off-by: Gavin Shan <gwshan@linux.vnet.ibm.com>
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
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This moves the logic initializing PCI slot to helper function
slot_info_info() so that it can be reused by subsequent patch
supporting dynamic PCI slot creation. No functional changes
introduced.
Signed-off-by: Gavin Shan <gwshan@linux.vnet.ibm.com>
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
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"ibm,slot-label" should not depend on "ibm,slot-location-code". The
later one can not be populted because of oversized "ibm,slot-label"
or PHB's base location code.
Signed-off-by: Gavin Shan <gwshan@linux.vnet.ibm.com>
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
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Remove the unnecessary space before @pd argument.
Signed-off-by: Gavin Shan <gwshan@linux.vnet.ibm.com>
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
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Commit 5cda6f6d added 8 byte property instead of 4 byte..which resulted
in below calltrace.
I think its fine to convert u64 to u32 here as we devide bus frequency
by 4.
Backtrace:
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[ 1.212366090,3] DT: Unexpected property length /xscom@3fc0000000000/i2cm@a0020/clock-frequency
[ 1.212369108,3] DT: Expected len: 4 got len: 8
[ 1.212370117,0] Assert fail: core/device.c:603:0
[ 1.212371550,0] Aborting!
CPU 0870 Backtrace:
S: 0000000033dc39e0 R: 0000000030013758 .backtrace+0x24
S: 0000000033dc3a60 R: 0000000030018e0c ._abort+0x4c
S: 0000000033dc3ae0 R: 0000000030018e88 .assert_fail+0x34
S: 0000000033dc3b60 R: 0000000030023da4 .dt_require_property+0xb4
S: 0000000033dc3bf0 R: 000000003002403c .dt_prop_get_u32+0x14
S: 0000000033dc3c60 R: 000000003004e884 .p8_i2c_init+0x12c
S: 0000000033dc3e30 R: 0000000030014684 .main_cpu_entry+0x4a8
S: 0000000033dc3f00 R: 00000000300025a0 boot_entry+0x198
Fixes: 5cda6f6d (platforms/firenze: Fix I2C clock source frequency)
Fixes: 5acf424a (HDAT: Fix typo in nest-frequency property)
Reported-by: Pridhiviraj Paidipeddi <ppaidipe@linux.vnet.ibm.com>
CC: Gavin Shan <gwshan@linux.vnet.ibm.com>
Signed-off-by: Vasant Hegde <hegdevasant@linux.vnet.ibm.com>
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
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Previously the power_ctl bit provided by the VPD was unused, now that we
are correctly assigning it we can use it when determining the slot reset
method.
The power_ctl bit is used to represent if power management is available.
If power_ctl is set to true, then the I2C based external power management
functionality will be populated on the PCI slot. Otherwise we will try to
use the inband PERST as the fundamental reset, as before.
While we are here we introduce a helper function to isolate the logic
initialisation for the I2C based external power management, to improve
readibility.
Signed-off-by: Suraj Jitindar Singh <sjitindarsingh@gmail.com>
Acked-by: Gavin Shan <gwshan@linux.vnet.ibm.com>
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
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This brings the qemu platform to the level of an Open Power platform.
It adds the BT device used to communicate with the BMC using IPMI
messaging, power_downs and reboots the way OpenPower systems operate.
The device tree is also checked for UART and RTC device nodes and
updated if qemu has not defined them already. The initialization of
the BT and IPMI interfaces depends on the availability of the BT
device which needs to be explicitly defined by qemu. These tests
enable skiboot to maintain compatibility with previous versions of
qemu which did not update the device tree with enabled devices.
Signed-off-by: Cédric Le Goater <clg@kaod.org>
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
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The current flash code was written with only one flash chip, which is
a system_flash (ie. the PNOR image), in mind.
Now that we have mambo bogusdisk flash, we can have many flash chips.
This is resulting in some confusing output messages.
This reworks some of the error paths and warnings to make this more
coherent when we have multiple flash chips.
We assume everything can be a system flash, so I've removed the
is_system_flash parameter from flash_register(). We'll use the first
system flash we find and warn if we find another since discovery order
is not a guaranteed API.
Signed-off-by: Michael Neuling <mikey@neuling.org>
Acked-by: Jeremy Kerr <jk@ozlabs.org>
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
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This reworks interrupt handling a bit and adds support for XIVE
based interrupts and the new sources available on POWER9.
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
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This makes the size of flash 64 bit safe so that we can have flash
devices greater than 4GB. This is especially useful for mambo disks
passed through to Linux.
Fortunately the device tree interface and the linux device driver are
64bit safe so no changes are required there.
Userspace gard and flash tools are also updated to ensure "make check"
still passes.
Signed-off-by: Michael Neuling <mikey@neuling.org>
Reviewed-by: Cyril Bur <cyrilbur@gmail.com>
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
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For a 1004 slot mapping bit 6 (0x40) of the P0 field represents the
pwr_ctl bit. This code previously accessed the wrong field (power_ctl)
which is a single bit which corresponds to the 1005 mapping (which is
the wrong mapping), performed a bitwise and with 0x40 (which will always
be 0), and then compared to 1 (which will also always be 0).
Fix this to access the byte struct member, bitwise and with 0x40 to mask
the power_ctl bit, and double negate to guarantee 0 or 1 result.
Fixes: Coverity Bug #97820
Fixes: 6884fe63 ("platforms/ibm-fsp: Support PCI slot")
Signed-off-by: Suraj Jitindar Singh <sjitindarsingh@gmail.com>
Acked-by: Gavin Shan <gwshan@linux.vnet.ibm.com>
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
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The console is very slow when using Skiboot with Mambo.
This adds a heartbeat timer as a platform quirk so that the console is
refresh more quickly. This results in Skiboot doing the right thing
without requiring custom settings in skiboot.tcl files.
Signed-off-by: Chris Smart <chris@distroguy.com>
Acked-by: Michael Neuling <mikey@neuling.org>
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
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Allocating BDFNs to NPU devices and associating NPU devices with PCI
devices of GPUs both rely on comparing PBCQ handles. This will fail if a
system has multiple sets of GPUs behind a single PHB.
Rework this to instead use slot locations. The following changes are
introduced:
- Groups of NPU links that connect to the same GPU are presented in the
slot table entries as st_npu_slot, using ST_LOC_NPU_GROUP
- NPU links are created with the ibm,npu-group-id property replacing the
ibm,pbcq property, which is used in BDFN allocation and GPU association
- Slot comparison is handled slightly differently for NPU devices as the
function of the BDFN is ignored, since the device number represents the
physical GPU the link is connected to
- BDFN allocation for NPU devices is now derived from the groups in the
slot table. For Garrison, the same BDFNs are generated as before.
- Association with GPU PCI devices is performed by comparing the slot
label. This means for future machines with NPUs that slot labels
are compulsory to have NVLink functionality working.
Signed-off-by: Russell Currey <ruscur@russell.cc>
Reviewed-By: Alistair Popple <alistair@popple.id.au>
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
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We shouldn't have a hotpluggable slot behind PHB as the root port
cannot be plugged. This removes the association between PHB slot
and platform specific slot. Otherwise, we will run into strange
situation: there are two slots behind PHB and root port separately,
but both of them are dereferencing same platform specific slot.
Signed-off-by: Gavin Shan <gwshan@linux.vnet.ibm.com>
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
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Currently, we have separately I2C stubs used for PCI slot power
management and fixup. It's reasonable to merge them to one so
that the code looks unified. Also, this introduces a table tracking
PCI slot fixup info which is very easy to be extended in future.
Signed-off-by: Gavin Shan <gwshan@linux.vnet.ibm.com>
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
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While it extremely unlikely that these paths will ever by triggered
the error message could be useful to help diagnose a broken system.
This patch also fixes coverity issue 127700
Signed-off-by: Cyril Bur <cyril.bur@au1.ibm.com>
Reviewed-by: Andrew Donnellan <andrew.donnellan@au1.ibm.com>
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
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Add more generic support for MMIO based UARTs, simplify code,
use common initialization, and clean up the device-tree
representation as well.
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Acked-by: Michael Neuling <mikey@neuling.org>
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
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Implement a flash driver using mambo bogus disk.
Works as a system flash (ie palmetto.pnor) or with disk images (via
Linux mtdblock).
Linux MTD needs this patch to perform at a resonable speed:
https://lists.ozlabs.org/pipermail/linuxppc-dev/2016-July/145202.html
Signed-off-by: Michael Neuling <mikey@neuling.org>
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
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Just one annotation here, pretty rare situation I think... but
best to bail on this one, as this certainly isn't something we
want in production.
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
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Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
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In firenze_pci_slot_init(), i2c_alloc_req() can return NULL though
it's very rare. We don't cover the case. If NULL I2C request returned
from the function, the I2C dependent power management won't be used.
This checks if i2c_alloc_req() returns valid I2C request or not.
Suggested-by: Stewart Smith <stewart@linux.vnet.ibm.com>
Signed-off-by: Gavin Shan <gwshan@linux.vnet.ibm.com>
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
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After commit aa928bfbd891 ("platforms/astbmc: Support PCI slot")
is merged, we have the assumption that PHB's base location code
is always valid. It's not true on openPower platforms, including
Garrison. It causes the PCI slot location code isn't exposed via
device-tree.
This fixes the above issue. The PCI slot location code contains
the label only if PHB's base location code is invalid.
Reported-by: Russell Currey <ruscur@russell.cc>
Signed-off-by: Gavin Shan <gwshan@linux.vnet.ibm.com>
Tested-by: Russell Currey <ruscur@russell.cc>
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
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Found with static analysis:
939 id = ((uint64_t)p[1] << 32) | p[2];
value_overwrite: Overwriting previous write to id with value 0ULL.
940 id = 0;
Fixes: 6884fe63
Acked-by: Gavin Shan <gwshan@linux.vnet.ibm.com>
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
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We also convert from custom prlog() macros over to straight prlog
with the magic pr_fmt define.
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
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This reworks PCI stuff for astbmc platform to support PCI slot:
* The PCI slot is created in slot_table_get_slot_info().
* There are no platform dependent operations provided to PCI
slots at current stage.
* The slot location code is populated accordingly.
Signed-off-by: Gavin Shan <gwshan@linux.vnet.ibm.com>
Reviewed-by: Russell Currey <ruscur@russell.cc>
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
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The patch reworks PCI stuff for IBM's Apollo and Firenze platforms to
support PCI slot:
* Platform shared PCI slot is represented by "struct lxvpd_pci_slot"
for Apollo and Firenze. The information of that is fetched from
VPD.
* Apollo platform uses "struct lxvpd_pci_slot" as its platform slot,
while Firenze platform uses "struct firenze_pci_slot" as its
platform slot in order to support external I2C-based PCI slot power
maangement as well as PERST supported by the downstream ports of
particular PLX PCIe switches.
* On Firenze platform, the properties and methods to manage PHB slot
might be overrided to utilize the capability of external power
management.
Signed-off-by: Gavin Shan <gwshan@linux.vnet.ibm.com>
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
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Every PCIE bridge port or PHB is expected to be bound with PCI slot
, to which various PCI slot's functionalities are attached (e.g. power,
link, reset). This supports PCI slot:
* PCI slot is reprsented by "struct pci_slot".
* "struct pci_slot_ops" represents the functions supported on the
PCI slot. It's initialized by PCI slot core at the beginning and
allowed to be overrided by platform partially or completely.
* On PCI hot plugging event, the PCI devices behind the slot are
enumarated. Device sub-tree is populated and sent to OS by OPAL
message.
* On PCI hot unplugging event, the PCI devices behind the slot are
destroyed. Device sub-tree is removed and the slot is powered off.
Signed-off-by: Gavin Shan <gwshan@linux.vnet.ibm.com>
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
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The Garrison workbook numbers GPUs starting from GPU1 instead of
GPU0. Update the skiboot location codes to match.
Signed-off-by: Alistair Popple <alistair@popple.id.au>
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
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Add the slot location names for the PCI and NPU slots.
Signed-off-by: Alistair Popple <alistair@popple.id.au>
Claimed-to-be-Tested-By: Abhijit Saikia <Abhijit.Saikia@in.ibm.com>
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
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The PHB slot location code ueses the ibm,phb-index property to find
slot location names. As the NPU is implemented as a different PHB type
it means the phb-index property overlaps with the other PHBs in the
system.
This patch changes the existing usage of phb-index to npu-index which
allows the phb-index property to be assigned a unique value which can
then be matched by the PHB slot location code.
Signed-off-by: Alistair Popple <alistair@popple.id.au>
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
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We pre-allocate IPMI message for PANIC event and use that memory to send
PANIC event to BMC. Presently we return NULL if we have not initiated PANIC
event message. So we won't be able to log early failure events.
This patch tries to initialize ipmi message instead of returning NULL.
Also intialize elog before ipmi_sel_init. Otherwise we will not be able
to create elog message.
Signed-off-by: Vasant Hegde <hegdevasant@linux.vnet.ibm.com>
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
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The I2C master clock source frequency is hardcoded to wrong value.
The correct frequency should be the nest clock frequency divided
by 16 as Ben said.
This fixes I2C master source frequency with the help of additional
properties "nest-frequency" and "bus-frequency" to root and xscom
device node separately.
Suggested-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Gavin Shan <gwshan@linux.vnet.ibm.com>
Acked-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
[stewart@linux.vnet.ibm.com: fixup hdata test for added property]
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
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Add terminate callback to mambo platform so that the simulator exits.
Signed-off-by: Michael Neuling <mikey@neuling.org>
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
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Signed-off-by: Johnny <johnny.cl.chang@foxconn.com>
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
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