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2020-06-23platform/mihawk: Fix IPMI double-freenichole1-2/+0
[ Upstream commit 68dc040a6540c218d20517764ff5d740a3626c55 ] The commit 6826095 ("platform/mihawk: support dynamic PCIe slot table") added the IPMI OEM command to communicate with BMC. We do the ipmi_free_msg(msg) twice that caused the Fast-reboot fail. This patch fixes it by removing the IPMI double-free bug to restore Fast-reboot. Signed-off-by: Nichole Wang <Nichole_Wang@wistron.com> Cc: skiboot-stable@lists.ozlabs.org # skiboot-6.6.x Cc: skiboot-stable@lists.ozlabs.org # skiboot-op940.x Fixes: commit 6826095 ("platform/mihawk: support dynamic PCIe slot table") Reviewed-by: Vasant Hegde <hegdevasant@linux.vnet.ibm.com> Signed-off-by: Oliver O'Halloran <oohall@gmail.com> Signed-off-by: Vasant Hegde <hegdevasant@linux.vnet.ibm.com>
2020-06-06platform/mihawk: Tune equalization settings for opencapiFrederic Barrat1-0/+7
[ Upstream commit afe6bc9051907d25082309895f8cfe44f59e2f25 ] The Bittware 250SOC adapter on Mihawk was showing a high count of CRC errors on one of the opencapi slots. The PHY team suggested new equalization settings to correct the errors. All existing adapters have been tested on mihawk to make sure the settings are compatible. However, the new settings should not be used on platforms other than mihawk. The changes specific to mihawk are: - Update the tx_ffe_pre_coeff and tx_ffe_post_coeff input parameters used during zcal - turn off the tx_ffe_boost parameter through scom Signed-off-by: Frederic Barrat <fbarrat@linux.ibm.com> Cc: skiboot-stable@lists.ozlabs.org # skiboot-op940.x Reviewed-by: Andrew Donnellan <ajd@linux.ibm.com> Signed-off-by: Oliver O'Halloran <oohall@gmail.com> Signed-off-by: Vasant Hegde <hegdevasant@linux.vnet.ibm.com>
2020-04-03platform/mihawk: support dynamic PCIe slot tableJoy Chu1-16/+212
[ Upstream commit 6826095796c91583f344950ff76ef8ccf6e756b5 ] Slot table auto-detection for different riser cards by using IPMI OEM command to communicate with BMC. Signed-off-by: Joy Chu <joy_chu@wistron.com> Signed-off-by: Oliver O'Halloran <oohall@gmail.com> Signed-off-by: Vasant Hegde <hegdevasant@linux.vnet.ibm.com>
2020-04-03hw/phb4: Tune GPU direct performance on witherspoon in PCI modeFrederic Barrat1-0/+47
[ Upstream commit e876514b3773dcecc0b39317ca341d27db96d81c ] Good GPU direct performance on witherspoon, with a Mellanox adapter on the shared slot, requires to reallocate some dma engines within PEC2, "stealing" some from PHB4&5 and giving extras to PHB3. It's currently done when using CAPI mode. But the same is true if the adapter stays in PCI mode. In preparation for upcoming versions of MOFED, which may not use CAPI mode, this patch reallocates dma engines even in PCI mode for a series of Mellanox adapters that can be used with GPU direct, on witherspoon and on the shared slot only. The loss of dma engines for PHB4&5 on witherspoon has not shown problems in testing, as well as in current deployments where CAPI mode is used. Here is a comparison of the bandwidth numbers seen with the PHB in PCI mode (no CAPI) with and without this patch. Variations on smaller packet sizes can be attributed to jitter and are not that meaningful. # OSU MPI-CUDA Bi-Directional Bandwidth Test v5.6.1 # Send Buffer on DEVICE (D) and Receive Buffer on DEVICE (D) # Size Bandwidth (MB/s) Bandwidth (MB/s) # with patch without patch 1 1.29 1.48 2 2.66 3.04 4 5.34 5.93 8 10.68 11.86 16 21.39 23.71 32 42.78 49.15 64 85.43 97.67 128 170.82 196.64 256 385.47 383.02 512 774.68 755.54 1024 1535.14 1495.30 2048 2599.31 2561.60 4096 5192.31 5092.47 8192 9930.30 9566.90 16384 18189.81 16803.42 32768 24671.48 21383.57 65536 28977.71 24104.50 131072 31110.55 25858.95 262144 32180.64 26470.61 524288 32842.23 26961.93 1048576 33184.87 27217.38 2097152 33342.67 27338.08 Signed-off-by: Frederic Barrat <fbarrat@linux.ibm.com> Cc: skiboot-stable@lists.ozlabs.org # skiboot-op940.x Reviewed-by: Andrew Donnellan <ajd@linux.ibm.com> Signed-off-by: Oliver O'Halloran <oohall@gmail.com> Signed-off-by: Vasant Hegde <hegdevasant@linux.vnet.ibm.com>
2020-03-26platform/mihawk: add nvme devices slot tableJoy Chu1-16/+76
[ Upstream commit d6ab89dbdbb894e835b08022bf9d46999ffc9df6 ] Add nvme slot table for broadcom gen4 nvme hba card support. Signed-off-by: Joy Chu <joy_chu@wistron.com> [oliver: fixed statment with no effect warning] Signed-off-by: Oliver O'Halloran <oohall@gmail.com> Signed-off-by: Vasant Hegde <hegdevasant@linux.vnet.ibm.com>
2020-03-12npu2-opencapi: Allow platforms to identify physical slotsFrederic Barrat2-0/+40
[ Upstream commit 9de4f2284c54433f7f4ff3dc3d13a39c657e2c19 ] This patch lets each platform define the name of the opencapi slots. It makes it easier to identify which physical card is generating errors or messages in the linux or skiboot log files. The patch provides slot names for mihawk and witherspoon. If the platform doesn't define any, then we default to 'OPENCAPI-xxxx' There are various ways to find out about the slot names: skiboot log lspci command (if the PCI hotplug driver pnv-php is loaded) lshw checking the device tree and probably others.... Signed-off-by: Frederic Barrat <fbarrat@linux.ibm.com> Reviewed-by: Andrew Donnellan <ajd@linux.ibm.com> Signed-off-by: Oliver O'Halloran <oohall@gmail.com> Signed-off-by: Vasant Hegde <hegdevasant@linux.vnet.ibm.com>
2020-03-11npu2, npu3: Remove ibm, phb-index property from the NPU dt nodeFrederic Barrat2-4/+0
[ Upstream commit bbb4777f682dab0f1411a493861af9e340e81229 ] The 'ibm,phb-index' property of the NPU node is now useless, as we can have multiple PHBs associated to the same NPU on P9. Let's remove it to avoid confusion. Reviewed-by: Reza Arbab <arbab@linux.ibm.com> Reviewed-by: Andrew Donnellan <ajd@linux.ibm.com> Signed-off-by: Frederic Barrat <fbarrat@linux.ibm.com> Signed-off-by: Oliver O'Halloran <oohall@gmail.com> Signed-off-by: Vasant Hegde <hegdevasant@linux.vnet.ibm.com>
2019-12-05platform/mihawk: Add system VPD EEPROM to I2C busJoy Chu1-0/+20
[ Upstream commit 52952aca9d6148e7ae3c3725ae43d48e27b61357 ] Add VPD EEPROM type fix for planar VPD update. Signed-off-by: Joy Chu <joy_chu@wistron.com> [oliver: commit subject] Signed-off-by: Oliver O'Halloran <oohall@gmail.com> Signed-off-by: Vasant Hegde <hegdevasant@linux.vnet.ibm.com>
2019-12-05platform/mihawk: Detect old system compatible stringFrederic Barrat1-1/+2
[ Upstream commit 425340bd2809808f21856d80bf76b785b87b6041 ] Newer firmware declares the system as "ibm,mihawk", but the labs are full of older installs, which were using "wistron,mihawk". Let's keep detecting the older string since it allows to run recent skiboot on older fw stack and make people's lives a little tiny bit easier. Reviewed-by: Andrew Donnellan <ajd@linux.ibm.com> Reviewed-by: Stewart Smith <stewart@flamingspork.com> Signed-off-by: Frederic Barrat <fbarrat@linux.ibm.com> Signed-off-by: Oliver O'Halloran <oohall@gmail.com> Signed-off-by: Vasant Hegde <hegdevasant@linux.vnet.ibm.com>
2019-08-16pci: Use a macro for accessing PCI BDF Function NumberJordan Niethe1-1/+1
Currently when the Function Number bits of a BDF are needed the bit operations to get it are free coded. There are many places where the Function Number is used, so make a macro to use instead of free coding it everytime. Signed-off-by: Jordan Niethe <jniethe5@gmail.com> Signed-off-by: Oliver O'Halloran <oohall@gmail.com>
2019-08-16pci: Use a macro for accessing PCI BDF Device NumberJordan Niethe1-1/+1
Currently when the Device Number bits of a BDF are needed the bit operations to get it are free coded. There are many places where the Device Number is used, so make a macro to use instead of free coding it everytime. Signed-off-by: Jordan Niethe <jniethe5@gmail.com> Signed-off-by: Oliver O'Halloran <oohall@gmail.com>
2019-08-16pci: Use a macro for accessing PCI BDF Bus NumberJordan Niethe1-1/+1
Currently when the Bus Number bits of a BDF are needed the bit operations to get it are free coded. There are many places where the Bus Number is used, so make a macro to use instead of free coding it everytime. Signed-off-by: Jordan Niethe <jniethe5@gmail.com> Signed-off-by: Oliver O'Halloran <oohall@gmail.com>
2019-07-30hw: Put SPDX on new filesOliver O'Halloran1-14/+3
Convert the npu3 files to use SPDX headers. Signed-off-by: Oliver O'Halloran <oohall@gmail.com>
2019-07-26Add Swift platformReza Arbab2-1/+142
Swift is a dual-chip Axone system, wired for four possible GPUs. This is akin to a POWER9P version of a (Redbud) Witherspoon. Add a platform definition for this system, using details from v1.1 of the design workbook (29 May 2019). Signed-off-by: Reza Arbab <arbab@linux.ibm.com> Signed-off-by: Oliver O'Halloran <oohall@gmail.com>
2019-07-26SPDX-ify all skiboot codeStewart Smith18-271/+47
Use Software Package Data Exchange (SPDX) to indicate license for each file that is unique to skiboot. At the same time, ensure the (C) who and years are correct. See https://spdx.org/ Signed-off-by: Stewart Smith <stewart@linux.ibm.com> [oliver: Added a few missing files] Signed-off-by: Oliver O'Halloran <oohall@gmail.com>
2019-07-19Add: add mihawk platform filejoy_chu2-1/+268
Signed-off-by: joy_chu <joy_chu@wistron.com> Acked-by: Stewart Smith <stewart@linux.ibm.com> [oliver: use SPDX for license; removed whitespace error] Signed-off-by: Oliver O'Halloran <oohall@gmail.com>
2019-07-15witherspoon: Add nvlink peers in finalise_dt()Oliver O'Halloran1-4/+6
This information is consumed by Linux so it needs to be in the DT. Move it to finalise_dt(). Cc: A Russian <aik@ozlabs.ru> Fixes: 9fc0c1287ada ("Move FSP specific op-panel calls to platform.exit()") Signed-off-by: Oliver O'Halloran <oohall@gmail.com> Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
2019-07-08platforms/nicole: Add new platformArtem Senichev2-1/+80
The platform is a new storage controller for TATLIN server. Based on IBM Romulus reference design (POWER9). Signed-off-by: Artem Senichev <a.senichev@yadro.com> Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
2019-06-24op_display: make platform function rather than "FSP" specificStewart Smith13-0/+14
We have an implementation for non-FSP systems now, and we shouldn't be calling that from code in an fsp/ directory, so move op_display() to a platform function. Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
2019-06-03platforms/vesnin: PCI inventory via IPMI OEMArtem Senichev1-33/+44
Replace raw protocol with OEM message supported by OpenBMC's IPMI plugins. BMC-side implementation (IPMI plug-in): https://github.com/YADRO-KNS/phosphor-pci-inventory Signed-off-by: Artem Senichev <a.senichev@yadro.com> Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
2019-05-09platforms/astbmc: Check for SBE validation stepSamuel Mendoza-Jonas6-0/+70
On some POWER8 astbmc systems an update to the SBE requires pausing at runtime to ensure integrity of the SBE. If this is required the BMC will set a chassis boot option IPMI flag using the OEM parameter 0x62. If Skiboot sees this flag is set it waits until the SBE update is complete and the flag is cleared. Unfortunately the mystery operation that validates the SBE also leaves it in a bad state and unable to be used for timer operations. To workaround this the flag is checked as soon as possible (ie. when IPMI and the console are set up), and once complete the system is rebooted. Signed-off-by: Samuel Mendoza-Jonas <sam@mendozajonas.com> Reviewed-by: Vasant Hegde <hegdevasant@linux.vnet.ibm.com> Reviewed-by: Andrew Jeffery <andrew@aj.id.au> Signed-off-by: Oliver O'Halloran <oohall@gmail.com>
2019-05-02Remove Talos DT match from Romulus fileTimothy Pearson1-2/+1
Signed-off-by: Timothy Pearson <tpearson@raptorengineering.com> Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
2019-05-02Copy and convert Romulus descriptors to TalosTimothy Pearson2-1/+88
Talos II has some hardware differences from Romulus, therefore we cannot guarantee Talos II == Romulus in skiboot. Copy and slightly modify the Romulus files for Talos II. Signed-off-by: Timothy Pearson <tpearson@raptorengineering.com> Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
2019-03-28astbmc: Handle failure to initialise raw flashAndrew Jeffery1-1/+4
Initialising raw flash lead to a dead assignment to rc. Check the return code and take the failure path as necessary. Both before and after the fix we see output along the lines of the following when flash_init() fails: [ 53.283182881,7] IRQ: Registering 0800..0ff7 ops @0x300d4b98 (data 0x3052b9d8) [ 53.283184335,7] IRQ: Registering 0ff8..0fff ops @0x300d4bc8 (data 0x3052b9d8) [ 53.283185513,7] PHB#0000: Initializing PHB... [ 53.288260827,4] FLASH: Can't load resource id:0. No system flash found [ 53.288354442,4] FLASH: Can't load resource id:1. No system flash found [ 53.342933439,3] CAPP: Error loading ucode lid. index=200ea [ 53.462749486,2] NVRAM: Failed to load [ 53.462819095,2] NVRAM: Failed to load [ 53.462894236,2] NVRAM: Failed to load [ 53.462967071,2] NVRAM: Failed to load [ 53.463033077,2] NVRAM: Failed to load [ 53.463144847,2] NVRAM: Failed to load Eventually followed by: [ 57.216942479,5] INIT: platform wait for kernel load failed [ 57.217051132,5] INIT: Assuming kernel at 0x20000000 [ 57.217127508,3] INIT: ELF header not found. Assuming raw binary. [ 57.217249886,2] NVRAM: Failed to load [ 57.221294487,0] FATAL: Kernel is zeros, can't execute! [ 57.221397429,0] Assert fail: core/init.c:615:0 [ 57.221471414,0] Aborting! CPU 0028 Backtrace: S: 0000000031d43c60 R: 000000003001b274 ._abort+0x4c S: 0000000031d43ce0 R: 000000003001b2f0 .assert_fail+0x34 S: 0000000031d43d60 R: 0000000030014814 .load_and_boot_kernel+0xae4 S: 0000000031d43e30 R: 0000000030015164 .main_cpu_entry+0x680 S: 0000000031d43f00 R: 0000000030002718 boot_entry+0x1c0 --- OPAL boot --- Analysis of the execution paths suggests we'll always "safely" end this way due the setup sequence for the blocklevel callbacks in flash_init() and error handling in blocklevel_get_info(), and there's no current risk of executing from unexpected memory locations. As such the issue is reduced to down to a fix for poor error hygene in the original change and a resolution for a Coverity warning (famous last words etc). Fixes: c826e1ca9e5b ("astbmc: Try IPMI HIOMAP for P8 (again)") Signed-off-by: Andrew Jeffery <andrew@aj.id.au> Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
2019-03-28platforms/vesnin: Disable PCIe port bifurcationArtem Senichev1-34/+16
PCIe ports connected to CPU1 and CPU3 now work as x16 instead of x8x8. Signed-off-by: Artem Senichev <a.senichev@yadro.com> Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
2019-03-20witherspoon: Add nvlink2 interconnect informationAlexey Kardashevskiy1-1/+131
GPUs on Redbud and Sequoia platforms are interconnected in groups of 2 or 3 GPUs. The problem with that is if the user decides to pass a single GPU from a group to the userspace, we need to ensure that links between GPUs do not get enabled. A V100 GPU provides a way to disable selected links. In order to only disable links to peer GPUs, we need a topology map. This adds an "ibm,nvlink-peers" property to a GPU DT node with phandles of peer GPUs and NVLink2 bridges. The index in the property is a GPU link number. Signed-off-by: Alexey Kardashevskiy <aik@ozlabs.ru> Acked-by: Reza Arbab <arbab@linux.ibm.com> [stewart: fixed strtol found in review by Reza] Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
2019-03-20platforms/romulus: Also support talosOliver O'Halloran1-1/+2
The two are similar enough and I'd like to have a slot table for our Talos. Cc: Timothy Pearson <tpearson@raptorengineering.com> Signed-off-by: Oliver O'Halloran <oohall@gmail.com> Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
2019-03-15p9dsu: Undo slot label name changesDeb McLemore1-16/+16
During some code updates the slot labels were updated to reflect the phb layout, however expectations were that the slot labels be aligned with the riser card slots and not the system planar slots. [stewart: The tale of how we got here is long and varied and not at all clear. The first ESS systems went out with a skiboot v5.9.8 with additional SuperMicro patches. It was probably a slot table, but who knows, we don't have the code so can't check. It's possible it was all coming in through HDAT instead). The op-build tree (thus the exact patches) shipped on systems that work correct seems to not be around anywhere anymore (if it ever was). It was only in skiboot v6.0 that a slot table made it in, and, of course, only having remote machines in random configs, including possibly with riser cards from Briggs&Stratton rather than the ones destined for this system, doesn't make for verifying this at all. It also doesn't help that *consistently* there is *never* any review on slot tables, and we've had things be wrong in the past. Combine this with not upstream Hostboot patches.] Cc: skiboot-stable@lists.ozlabs.org Cc: Benjamin Mashak <mashak@us.ibm.com> Cc: Michael Lim <youhour@us.ibm.com> Fixes: 64a16ae05bb2 ("p9dsu: Fix slot labels for p9dsu2u") Fixes: 87517c8737b9 ("p9dsu: Fix p9dsu slot tables") Fixes: 31231ed300f2 ("p9dsu: Fix p9dsu default variant") Signed-off-by: Deb McLemore <debmc@linux.ibm.com> [stewart: added more detailed explanation, cc stable] Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
2019-03-05p9dsu: Fix slot labels for p9dsu2uDeb McLemore1-5/+5
Update the slot labels for the p9dsu2u tables. Signed-off-by: Deb McLemore <debmc@linux.ibm.com> Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
2019-03-05zaius: Add BMC descriptionAndrew Jeffery1-1/+20
Frederic reported that Zaius was failing with a NULL dereference when trying to initialise IPMI HIOMAP. It turns out that the BMC wasn't described at all, so add a description. Tested on zaius1, which reached petitboot with the patch applied. Reported-by: Frederic Barrat <fbarrat@linux.ibm.com> Tested-by: Frederic Barrat <fbarrat@linux.ibm.com> Signed-off-by: Andrew Jeffery <andrew@aj.id.au> Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
2019-03-01astbmc: Enable IPMI HIOMAP for AMI platformsAndrew Jeffery1-0/+1
Required for Habanero, Palmetto and Romulus. Cc: Lei YU <mine260309@gmail.com> Cc: Uma Yadlapati <yadlapat@us.ibm.com> Signed-off-by: Andrew Jeffery <andrew@aj.id.au> Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
2019-02-25astbmc: Try IPMI HIOMAP for P8 (again)Andrew Jeffery2-31/+59
The HIOMAP protocol was developed after the release of P8 in preparation for P9. As a consequence P9 always uses it, but it has rarely been enabled for P8. P8DTU has recently added IPMI HIOMAP support to its BMC firmware, so enable its use in skiboot with P8 machines. Doing so requires some rework to ensure fallback works correctly as in the past the fallback was to mbox, which will only work for P9. Tested on Garrison, Palmetto without HIOMAP, Palmetto with HIOMAP, and Witherspoon. Signed-off-by: Andrew Jeffery <andrew@aj.id.au> Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
2019-02-18platforms/witherspoon: Make PCIe shared slot error message more informativeAndrew Donnellan1-2/+3
If we're missing chips for some reason, we print a warning when configuring the PCIe shared slot. The warning doesn't really make it clear what "shared slot" is, and if it's printed, it'll come right after a bunch of messages about NPU setup, so let's clarify the message to explicitly mention PCI. Signed-off-by: Andrew Donnellan <andrew.donnellan@au1.ibm.com> [stewart: bikeshed] Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
2019-02-10Revert "astbmc: Try IPMI HIOMAP for P8"Joel Stanley2-59/+31
This reverts commit bd9839684d482417e8c60449592f4308e9a91dac as it broke booting on P8 systems, including Garrison (AMI BMC), Firestone (AMI BMC) and QEMU (BMC simulator). Issue https://github.com/open-power/skiboot/issues/217 tracks the failure. The P8 IPMI HIOMAP feature can be re-enabled once this issue is resolved. Reported-by: Sam Mendoza-Jonas <sam@mendozajonas.com> Reported-by: Sam Mendoza-Jonas <sam@mendozajonas.com> Signed-off-by: Joel Stanley <joel@jms.id.au> Acked-by: Sam Mendoza-Jonas <sam@mendozajonas.com> Acked-by: Sam Mendoza-Jonas <sam@mendozajonas.com> Tested-by: Alexey Kardashevskiy <aik@ozlabs.ru> Acked-by: Andrew Jeffery <andrew@aj.id.au> Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
2019-02-04p9dsu: Fix p9dsu slot tablesDeb McLemore1-15/+30
Set the attributes on the slot tables to account for builtin or pluggable etypes, this will allow pci enumeration to calculate subordinate buses. Update some slot label strings. Add WIO Slot5 which is standard on the ESS config. Signed-off-by: Deb McLemore <debmc@linux.ibm.com> Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
2019-01-25p9dsu: Fix p9dsu default variantDeb McLemore1-19/+21
Add the default when no riser_id is returned from the ipmi query. This addresses: https://github.com/open-power/boston-openpower/issues/1369 Allow a little more time for BMC reply and cleanup some label strings. Signed-off-by: Deb McLemore <debmc@linux.ibm.com> Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
2019-01-18p8dtu: Configure BMC graphicsAndrew Jeffery1-1/+9
We can no-longer read the values from the BMC in the way we have in the past. Values were provided by Eric Chen of SMC. Signed-off-by: Andrew Jeffery <andrew@aj.id.au> Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
2019-01-18p8dtu: Enable HIOMAP supportAndrew Jeffery1-0/+1
Signed-off-by: Andrew Jeffery <andrew@aj.id.au> Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
2019-01-18astbmc: Try IPMI HIOMAP for P8Andrew Jeffery2-31/+59
The HIOMAP protocol was developed after the release of P8 in preparation for P9. As a consequence P9 always uses it, but it has rarely been enabled for P8. P8DTU has recently added IPMI HIOMAP support to its BMC firmware, so enable its use in skiboot with P8 machines. Doing so requires some rework to ensure fallback works correctly as in the past the fallback was to mbox, which will only work for P9. Signed-off-by: Andrew Jeffery <andrew@aj.id.au> Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
2019-01-18zaius: zaius_ocapi can be staticStewart Smith1-1/+1
Signed-off-by: Stewart Smith <stewart@linux.ibm.com> Acked-by: Andrew Donnellan <andrew.donnellan@au1.ibm.com> Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
2019-01-18sparse: Make tree 'constant is so big' warning cleanStewart Smith4-6/+6
Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
2018-11-19platform/witherspoon: Fix opencapi lane-mask used on GPU0Frederic Barrat1-3/+3
When an opencapi device is used via the Acorn adapter, the link used is connected to the "middle" group of lanes of the obus. We were using the wrong set of lanes. The link was somehow still training, likely because the default settings at power-on were good enough, but it's still wrong. Signed-off-by: Frederic Barrat <fbarrat@linux.ibm.com> Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
2018-11-19platform/witherspoon: Avoid harmless error messageFrederic Barrat1-0/+7
The I2C read to find out if a device on the GPU slot is an opencapi adapter or nvidia card is reporting an "arbitration loss" error if no device is connected on the GPU slot. That I2C read is actually useless if we already know there's no device connected, so let's skip it. It will avoid logging an harmless error. Signed-off-by: Frederic Barrat <fbarrat@linux.ibm.com> Reviewed-by: Andrew Donnellan <andrew.donnellan@au1.ibm.com> Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
2018-11-01p9dsu: Describe platform BMC register configurationAndrew Jeffery1-1/+9
Provide the p9dsu-specific BMC configuration values required for the host kernel to drive the VGA display correctly. Signed-off-by: Andrew Jeffery <andrew@aj.id.au> Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
2018-11-01p9dsu: Add HIOMAP-over-IPMI supportAndrew Jeffery1-0/+1
Boston uses the same netfn / command values as OpenBMC. Signed-off-by: Andrew Jeffery <andrew@aj.id.au> Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
2018-10-25Quieten 'warnings' now that SIO is disabledStewart Smith1-2/+9
Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
2018-10-23platforms/astbmc/vesnin: Send list of PCI devices to BMC through IPMIArtem Senichev1-2/+101
Implements sending a list of installed PCI devices through IPMI protocol. Each PCI device description is sent as a standalone IPMI message. A list of devices can be gathered from separate messages using the session identifier. The session Id is an incremental counter that is updated at the start of synchronization session. Signed-off-by: Artem Senichev <a.senichev@yadro.com> Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
2018-10-11platform: Restructure bmc_platform typeAndrew Jeffery12-23/+74
Segregate the BMC platform configuration into hardware and software components. This allows population of platform default values for hardware configuration that may no-longer be accessible by the host. Signed-off-by: Andrew Jeffery <andrew@aj.id.au> [stewart: fixup pci-quirk unit test] Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
2018-10-11astbmc: Remove coordinated isolation supportAndrew Jeffery1-41/+6
Signed-off-by: Andrew Jeffery <andrew@aj.id.au> Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
2018-10-11astbmc: Prefer ipmi-hiomap for PNOR accessAndrew Jeffery2-14/+38
If the IPMI command is not available, fall back to the mailbox interface. Signed-off-by: Andrew Jeffery <andrew@aj.id.au> [stewart: fix up mbox test] Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
generated by cgit v1.1 at 2024-09-27 09:30:51 +0000