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Sometimes handy.
Signed-off-by: Oliver O'Halloran <oohall@gmail.com>
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
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Signed-off-by: Shilpasri G Bhat <shilpa.bhat@linux.vnet.ibm.com>
Acked-by: Balbir Singh <bsingharora@gmail.com>
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
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And change include order in libpore to avoid a compile failure
due to the default definition
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
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This adds memcpy_from_ci, a cache inhibited version of memcpy, required
by secure boot. The secure boot verification code is stored in a secure
ROM and the logic that contains the ROM within the processor is
implemented in a way that it only responds to CI (cache inhibited)
operations. Due to performance issues we copy the verification code from
the secure ROM to RAM and we use memcpy_ci for that.
What makes memcpy_ci vs ordinary memcpy?
memcpy copies data like in the example below and the compiler translates that
to load instructions that are not cache inhibited (e.g. lbzx - load byte and
zero indexed). In other words, the data is cached.
a[i] = b[i]
memcpy_ci copies data using the cache inhibited version of load instructions:
in_8() and in_be32(), both defined in include/io.h. These functions use lbzcix
and lwzcix assembly instructions, respectively. In this case, the data is not
cached as required by the logic that contains the ROM.
*((uint8_t*) destp) = in_8((uint8_t*)srcp);
*((uint32_t*) destp) = in_be32((uint32_t*)srcp)
Signed-off-by: Claudio Carvalho <cclaudio@linux.vnet.ibm.com>
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
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Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Acked-by: Michael Neuling <mikey@neuling.org>
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
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Presently abort() call sets up HID0, triggers attention and finally
calls infinite for loop. FSP takes care of collecting required logs
and reboots the system. This sequence is specific to FSP machine
and it will not work on BMC based machine. Hence move FSP specific
code to hw/fsp/fsp-attn.c.
Note that this patch adds new parameter to abort call. Hence replaced
_abort() by abort() in exception.c so that we can capture file info
as well.
Signed-off-by: Vasant Hegde <hegdevasant@linux.vnet.ibm.com>
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
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At the moment ECC reads and writes are still being handled by the low level
core of libflash. ECC should be none of libflashes concern, it is primarily
a hardware access backend.
It makes sense for blocklevel to take care of ECC but currently it has no
way of knowing. With some simple modifications (which are rudimentary at
the moment and will need a performance improvement) blocklevel can handle
ECC, and with a little more effort this can be extended to provide read and
write protection in blocklevel.
Reviewed-By: Alistair Popple <alistair@popple.id.au>
Signed-off-by: Cyril Bur <cyril.bur@au1.ibm.com>
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
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Better to error out than suddenly have places use uninitalized data.
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
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Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
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Signed-off-by: Cédric Le Goater <clg@fr.ibm.com>
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
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Gives better diagnostics in error logs/dumps
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
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Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
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Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
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Both the FSP RTC and the upcoming IPMI RTC implementation need to
manipulate time in various ways. Rather than re-implementing slightly
different versions of the calculations twice lets implement some
standard library functions (with tests) and use those.
This patch adds mktime and gmtime_r to the libc.
Signed-off-by: Alistair Popple <alistair@popple.id.au>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
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For better debugability, the patch adds git version and backtrace
details to user data section (along with file info which was already
present).
After adding required details TermImmedData looks like:
TermImmedData |
| 00000000 63386631 6639322D 64697274 793A0000 c8f1f92-dirty:.. |
| 00000010 00000000 00000000 00000000 00000000 ................ |
| 00000020 00000000 00000000 43505520 30303030 ........CPU 0000 |
| 00000030 30303264 20426163 6B747261 63653A0A 002d Backtrace:. |
| 00000040 20533A20 30303030 30303030 33316162 S: 0000000031ab |
| 00000050 36626130 20523A20 30303030 30303030 6ba0 R: 00000000 |
| 00000060 33303031 33306238 0A20533A 20303030 300130b8. S: 000 |
| 00000070 30303030 30333161 62366334 3020523A 0000031ab6c40 R: |
| 00000080 20303030 30303030 30333030 34623738 000000003004b78 |
| 00000090 380A2053 3A203030 30303030 30303331 8. S: 0000000031 |
| 000000A0 61623663 63302052 3A203030 30303030 ab6cc0 R: 000000 |
| 000000B0 30303330 30313736 31300A20 533A2030 0030017610. S: 0 |
| 000000C0 30303030 30303033 31616236 64343020 000000031ab6d40 |
| 000000D0 523A2030 30303030 30303033 30303035 R: 0000000030005 |
| 000000E0 3133340A 20533A20 30303030 30303030 134. S: 00000000 |
| 000000F0 33316162 36663030 20523A20 30303030 31ab6f00 R: 0000 |
| 00000100 30303030 33303030 32353534 0A000000 000030002554.... |
| 00000110 00000000 00000000 00000000 00000000 ................ |
| 00000120 00000000 00000000 00000000 00000000 ................ |
| 00000130 00000000 00000000 00000000 00000000 ................ |
| 00000140 00000000 00000000 00000000 00000000 ................ |
| 00000150 00000000 00000000 00000000 00000000 ................ |
| 00000160 00000000 00000000 00000000 00000000 ................ |
| 00000170 00000000 00000000 00000000 00000000 ................ |
| 00000180 00000000 00000000 00000000 00000000 ................ |
| 00000190 00000000 00000000 00000000 00000000 ................ |
| 000001A0 00000000 00000000 00000000 00000000 ................ |
| 000001B0 00000000 00000000 00000000 00000000 ................ |
| 000001C0 00000000 00000000 00000000 636F7265 ............core |
| 000001D0 2F6F7061 6C2E633A 3233383A 30000000 /opal.c:238:0... |
|------------------------------------------------------------------------------|
Signed-off-by: Aruna Balakrishnaiah <aruna@linux.vnet.ibm.com>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
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At present CPU control area ntuple in SPIRA structure is NULL.
ATTN component in Service Processor side checks for this field and if its empty,
it logs hardcoded SRC (0xBB821410) and generates SYSDUMP. So we have 1 SRC for
all failure (assert call) from OPAL side. This makes difficult to debug the issue.
Service processor provides attention area interface (FIPS PHyp Attentions spec),
so that we can pass SRC and user data (error message) to service processor.
This will helps us identify different failures in OPAL.
This patch enables attention area and provides interface (update_sp_attn_area())
to add src and user data (error message) through assert macro.
Attention SRC format:
1st byte - Opal src type
2-4 bytes - Holds the address of the assert function call
Signed-off-by: Aruna Balakrishnaiah <aruna@linux.vnet.ibm.com>
Signed-off-by: Vasant Hegde <hegdevasant@linux.vnet.ibm.com>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
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Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
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