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Due to a hardware issue where core responding to scom was delayed due to
thread reconfiguration, leaves the SCOM logic in a state where the
subsequent scom to that core can get errors. This is affected for Core
PC scom registers in the range of 20010A80-20010ABF
The solution is if a xscom timeout occurs to one of Core PC scom registers
in the range of 20010A80-20010ABF, a clearing scom write is done to
0x20010800 with data of '0x00000000' which will also get a timeout but
clears the scom logic errors. After the clearing write is done the original
scom operation can be retried.
The scom timeout is reported as status 0x4 (Invalid address) in HMER[21-23].
Signed-off-by: Mahesh Salgaonkar <mahesh@linux.vnet.ibm.com>
Reviewed-by: Nicholas Piggin <npiggin@gmail.com>
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
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It is common for xscom registers to only contain specific bit fields that
need to be modified without altering the rest of the register. This adds a
convenience function to perform xscom read-modify-write operations under a
mask.
Signed-off-by: Alistair Popple <alistair@popple.id.au>
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
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This patch adds new function to init core for power9 power management.
SPECIAL_WKUP_* SCOM registers, if set, can hold the cores from going into
idle states. Hence, clear PPM_SPECIAL_WKUP_HYP_REG scom register for each
core during init. (This init are not required for MAMBO)
Signed-off-by: Akshay Adiga <akshay.adiga@linux.vnet.ibm.com>
Reviewed-by: Vaidyanathan Srinivasan <svaidy@linux.vnet.ibm.com>
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
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Add code to perform indirect form 1 scoms.
POWER8 does form 0 only. POWER9 adds form 1. The form is determined
from the address only. Hardware only allows writes for form 1.
Only hostboot uses these scoms during IPL, so they are unused by
skiboot currently.
Signed-off-by: Michael Neuling <mikey@neuling.org>
Reviewed-by: Cédric Le Goater <clg@kaod.org>
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
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We add some routines that let a caller get the xscom lock once and
then do a bunch of xscoms while holding it.
In some situations without this, it could take long enough to get
the xscom lock that the 1ms timeout would expire and we'd falsely
think the SLW timer didn't work when in fact it did.
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
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Macros for EP/EX/EC accesses and some register definitions
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Acked-by: Michael Neuling <mikey@neuling.org>
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
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OPAL retries XSCOM read/write operations forever till it succeeds.
This can cause XSCOM ops to hang forever when XSCOM engine remains
busy for some reason. Changed it to retry XSCOM operations only
XSCOM_BUSY_MAX_RETRIES number of times instead of retrying forever.
Also added logic to reset XSCOM engine after XSCOM_BUSY_RESET_THRESHOLD
number of retries to unblock it when it remains busy.
Cc: stable # 9c2d82394fd2 ("xscom: Return OPAL_WRONG_STATE on XSCOM ops..")
Signed-off-by: Vipin K Parashar <vipin@linux.vnet.ibm.com>
Signed-off-by: Vaidyanathan Srinivasan <svaidy@linux.vnet.ibm.com>
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
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It works just like P8, we copy the code for now rather than make
it somewhat common due to our locking differences and to limit
the risk close to release. We can refactor later.
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
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See https://github.com/lucasdemarchi/codespel
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
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This patch adds a new OPAL call OPAL_CEC_REBOOT2 which will
be used to handle abnormal reboot/termination by kernel host.
This call will allow host kernel to pass reboot type and additional
debug data which needs to be captured/saved somewhere (for later
analysis) before going down.
Currently it will support two reboot types (0). normal reboot, that
will behave similar to that of opal_cec_reboot() call, and
(1). platform error reboot, that will trigger a system checkstop
using xscom address and FIR bit information obtained via device-tree
property 'ibm,sw-checkstop-fir'.
For unsupported reboot type, this call will do nothing and return
with OPAL_UNSUPPORTED.
In future, we can overload this call to support additional reboot types.
Signed-off-by: Vipin K Parashar <vipin@linux.vnet.ibm.com>
Signed-off-by: Mahesh Salgaonkar <mahesh@linux.vnet.ibm.com>
Reviewed-by: Samuel Mendoza-Jonas <sam.mj@au1.ibm.com>
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
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his primarily checks whether the caller already holds the corresponding
locks to avoid re-entrancy in some of the deep error path such as when
XSCOM itself triggers an error log. It will be extended in the case of
LPC to also handle known HW error states.
We use them to avoid queuing/polling in the BT driver and to discard
characters in the UART driver.
Note: This will not normally involve a loss of log to the UART as the
UART driver is also protected by the console suspend mechanism. So
this is a safety mechanism only.
This fixes issues where the generation of error logs inside the LPC or
XSCOM drivers could cause a re-entrancy (via the BT interface)
causing deadlocks. Now, the error logs IPMI messages will be queued up
and delivered later on the next poll handler.
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
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Create xscom_read_cfam_chipid() to read the cfam chipid().
We'll need to use this in a few places, so avoid replicating the code.
Signed-off-by: Michael Neuling <mikey@neuling.org>
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
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When the fast/deep power management modes for the cpu idle states
is initialized, bits which are not relevant in this context are also
being set. Fix this.
Besides this, the EX_PM_GP1 register will be read/written into by the
OCC as well. We touch this register during initialization of fast/deep
cpuidle modes and during initialization of pstate transitions. The register
contents can thus get messed up due to potential race conditions between
the OCC and sapphire settings.
Hence make use of the AND and OR scoms to do the settings and hence
let the hardware take care of the necessary synchronization.
We can also get rid of the setting of deep mode during slw_reinit since
we enable the required deep winkle mode during slw_init itself. This means
effectively removing the slw_prepare_chip() and its children functions.
They are no longer useful.
Signed-off-by: Preeti U Murthy <preeti@linux.vnet.ibm.com>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
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Power8 hardware supports deep idle states like sleep and winkle.
Both sleep and winkle have fast/deep modes.
Behaviour of each mode -
Fast sleep
Stop clocks to Core and L2 cache.
Drop Core & L2 voltage to retention.
Leave shared L3 cache running
Deep sleep
Power OFF the core and private L2 cache.
Leave shared L3 cache running.
Fast winkle
Stop clocks to entire chiplet.
Drop chiplet voltage to retention.
Deep winkle
Power OFF the entire chiplet.
Requires restore/re-init to wakeup.
PM GP1 register allows us to select fast/deep modes for sleep and winkle.
Currently we are setting PM GP1 register to use fast sleep and fast winkle.
Change it such that, sleep will use fast mode and winkle will use deep mode.
With deep winkle enabled, hotplug framework in kernel can send cores to winkle
when cpus are offlined.
Signed-off-by: Shreyas B. Prabhu <shreyas@linux.vnet.ibm.com>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
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Add OPAL calls to setup xscom before and after sleep
V1:https://w3-01.ibm.com/stg/linux/ltc/mailinglists/pipermail/sapphire/2014-July/003170.html
Changes in V2:
1.Store L2 Fir Action register contents in primary thread's pointer
2.Enable secondary threads also to call opal, now that the synchronization
across threads of a core will be taken care of by the kernel. We can
hence safely call fastsleep in smt on mode.
Signed-off-by: Vaidyanathan Srinivasan <svaidy@linux.vnet.ibm.com>
Signed-off-by: Preeti U Murthy <preeti@linux.vnet.ibm.com>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
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Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
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