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2021-08-06psi/p10: Activate StoreEOICédric Le Goater1-0/+1
Signed-off-by: Cédric Le Goater <clg@kaod.org> Signed-off-by: Vasant Hegde <hegdevasant@linux.vnet.ibm.com>
2021-08-06psi/p10: Activate 64K ESB pagesCédric Le Goater1-2/+3
Signed-off-by: Cédric Le Goater <clg@kaod.org> Signed-off-by: Vasant Hegde <hegdevasant@linux.vnet.ibm.com>
2021-08-06psi/p10: Activate P10 interruptsCédric Le Goater1-0/+7
Behave as P9 for now until we know more on P10. Interface should be the same, apart from the size of the ESB pages. Signed-off-by: Cédric Le Goater <clg@kaod.org> [Fixed suprious interrupt issue - Vasant] Signed-off-by: Vasant Hegde <hegdevasant@linux.vnet.ibm.com>
2020-03-12Re-license IBM written files as Apache 2.0 OR GPLv2+Stewart Smith1-1/+1
SPDX makes it a simpler diff. I have audited the commit history of each file to ensure that they are exclusively authored by IBM and thus we have the right to relicense. The motivation behind this is twofold: 1) We want to enable experiments with coreboot, which is GPLv2 licensed 2) An upcoming firmware component wants to incorporate code from skiboot and code from the Linux kernel, which is GPLv2 licensed. I have gone through the IBM internal way of gaining approval for this. The following files are not exclusively authored by IBM, so are *not* included in this update (I will be seeking approval from contributors): core/direct-controls.c core/flash.c core/pcie-slot.c external/common/arch_flash_unknown.c external/common/rules.mk external/gard/Makefile external/gard/rules.mk external/opal-prd/Makefile external/pflash/Makefile external/xscom-utils/Makefile hdata/vpd.c hw/dts.c hw/ipmi/ipmi-watchdog.c hw/phb4.c include/cpu.h include/phb4.h include/platform.h libflash/libffs.c libstb/mbedtls/sha512.c libstb/mbedtls/sha512.h platforms/astbmc/barreleye.c platforms/astbmc/garrison.c platforms/astbmc/mihawk.c platforms/astbmc/nicole.c platforms/astbmc/p8dnu.c platforms/astbmc/p8dtu.c platforms/astbmc/p9dsu.c platforms/astbmc/vesnin.c platforms/rhesus/ec/config.h platforms/rhesus/ec/gpio.h platforms/rhesus/gpio.c platforms/rhesus/rhesus.c platforms/astbmc/talos.c platforms/astbmc/romulus.c Signed-off-by: Stewart Smith <stewart@linux.ibm.com> [oliver: fixed up the drift] Signed-off-by: Oliver O'Halloran <oohall@gmail.com>
2019-11-11psi: update registers to reflect >= P8 PHBSCRNicholas Piggin1-6/+2
Reviewed-by: Vasant Hegde <hegdevasant@linux.vnet.ibm.com> Signed-off-by: Nicholas Piggin <npiggin@gmail.com> Signed-off-by: Oliver O'Halloran <oohall@gmail.com>
2019-11-11fsp: map trace areas on P9Nicholas Piggin1-3/+2
P7 did not have enough PSI TCEs to map trace buffers, and so it was P8 only, and not updated for P9 despite P9 having 256KB Signed-off-by: Nicholas Piggin <npiggin@gmail.com> Signed-off-by: Oliver O'Halloran <oohall@gmail.com>
2019-09-06hw/psi: Remove explicit external IRQ policyOliver O'Halloran1-12/+0
Rather than having an explicit policy use the presence of a platform defined external interrupt handler to determine whether we should direct the interrupt to OPAL or not. This lets us remove a pile of comments about why the policy is necessary and the comments about why we need to un-set it on P8+ Reviewed-by: Cédric Le Goater <clg@kaod.org> Signed-off-by: Oliver O'Halloran <oohall@gmail.com>
2019-07-26SPDX-ify all skiboot codeStewart Smith1-17/+3
Use Software Package Data Exchange (SPDX) to indicate license for each file that is unique to skiboot. At the same time, ensure the (C) who and years are correct. See https://spdx.org/ Signed-off-by: Stewart Smith <stewart@linux.ibm.com> [oliver: Added a few missing files] Signed-off-by: Oliver O'Halloran <oohall@gmail.com>
2019-06-24Separate FSP specific PSI codeStewart Smith1-1/+1
Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
2019-06-04Remove POWER7 and POWER7+ supportStewart Smith1-13/+1
It's been a good long while since either OPAL POWER7 user touched a machine, and even longer since they'd have been okay using an old version rather than tracking master. There's also been no testing of OPAL on POWER7 systems for an awfully long time, so it's pretty safe to assume that it's very much bitrotted. It also saves a whole 14kb of xz compressed payload space. Signed-off-by: Stewart Smith <stewart@linux.ibm.com> Enthusiasticly-Acked-by: Oliver O'Halloran <oohall@gmail.com> Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
2019-06-03prd: Implement generic HBRT - FSP interfaceVasant Hegde1-0/+7
This patch implements generic interface to pass data from HBRT to FSP during runtime (HBRT -> opal-prd -> kernel -> OPAL -> FSP). HBRT sends data via firmware_request interface. We have to convert that to MBOX format and send it to FSP. OPAL uses TCE mapped memory to send data. FSP will reuse same memory for response. Once processing is complete FSP sends response to OPAL. Finally OPAL calls HBRT with firmware_response message. Also introduces new opal_msg type (OPAL_MSG_PRD2) to pass bigger prd message to kernel. - if (prd_msg > OPAL_MSG_FIXED_PARAMS_SIZE) use OPAL_MSG_PRD2 Signed-off-by: Vasant Hegde <hegdevasant@linux.vnet.ibm.com> Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
2017-03-03lpc/uart: Support routing of selected LPC interrupts to LinuxBenjamin Herrenschmidt1-0/+1
Each LPC interrupt can be routed to one of 4 lines to the PSI bridge which represent 4 different system interrupts. This allows LPC clients to request as specific target (Linux or OPAL) and makes the LPC core pick a route and configure it appropriately. The UART is updated to properly forward interrupts to Linux if necessary Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
2016-11-15psi: Don't register more interrupts than the HW supportsBenjamin Herrenschmidt1-1/+1
On P9, the HW only has 14 interrupts. Trying to register 16 causes a checkstop when we try to initialize the 2 missing ones. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
2016-11-15psi: Add DT option to disable LPC interruptsBenjamin Herrenschmidt1-0/+1
Some sim models have the LPC interrupts stuck asserted on secondary chips so we add a device-tree option that makes us set the policy for these to "Linux" instead of "OPAL". Since they aren't referenced in the device-tree this will de-facto prevent them from being enabled Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
2016-08-11psi: Remove psi->workingBenjamin Herrenschmidt1-1/+0
I was only ever set to true Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
2016-08-11psi: Add P9 supportBenjamin Herrenschmidt1-1/+38
This reworks interrupt handling a bit and adds support for XIVE based interrupts and the new sources available on POWER9. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
2015-09-11psi: Fix a few typosBenjamin Herrenschmidt1-7/+7
Nothing critical, no functional changes. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
2015-07-10fsp/ipmi: Add the in-band IPMI support for FSP systemsNeelesh Gupta1-0/+4
FSP implements the IPMI commands support that can be accessed over the mailbox interface from the host. The host needs to provide and receive the message/data bytes of the IPMI command in the TCE space in the KCS (Keyboard Controller Style) format. Signed-off-by: Neelesh Gupta <neelegup@linux.vnet.ibm.com> Acked-By: Alistair Popple <alistair@popple.id.au> Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
2015-05-13occ: Send self-interrupt to chip with active PSIJoel Stanley1-0/+1
We were previously asking the OCC of the current chip to generate the self interrupt. If Hostboot does not configure all the PSI Host Bridges, so if the current chip happens to have an unconfigured PSI HB, the chip will never see the interrupt. Instead grab a chip id from the list of configured PSIs, and ask the OCC on that chip to generate the self-interrupt. This adds a pointer to the chip's PSI in struct proc_chip so we can use the current chip's PSI if it is active without having to look through all of them. Signed-off-by: Joel Stanley <joel@jms.id.au> Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
2015-05-07FSP/ELOG: Remove TCE mapping for host bufferVasant Hegde1-1/+1
elog_write_to_host_buffer is used to pass error log to host. Hence we don't need TCE mapping for this buffer. Signed-off-by: Vasant Hegde <hegdevasant@linux.vnet.ibm.com> Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
2015-02-19Change user-defined _MASK/_LSH to just maskDan Streetman1-4/+2
The last patch changed the SETFIELD() and GETFIELD() macros to automatically calculate the shift of a given mask, so manually specifying the shift is no longer needed. Additionally, any masks should have the _MASK suffix removed since the GETFIELD() and SETFIELD() operations expected to be passed the mask name without the _MASK suffix (and so either the mask name or the get/setfield call needs to have its mask name changed). Change all _MASK masks to remove the _MASK suffix, except for any places that leaving _MASK makes sense (e.g. already an existing define without _MASK suffix). Remove all _LSH defines, as they are no longer needed. Signed-off-by: Dan Streetman <ddstreet@ieee.org> Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
2014-07-25elog: Reserve TCE buffer for pushing logs to the hostDeepthi Dharwar1-1/+3
Allocate 16K buffer to push PEL logs to the host in case of unresponsive FSP. Signed-off-by: Deepthi Dharwar <deepthi@linux.vnet.ibm.com> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
2014-07-25FSP/PSI: Drive FSP reset on HIRAnanth N Mavinakayanahalli1-0/+1
Currently, we drive the link down when doing a host initated reset. We should ideally reset the FSP and let it bring the link down. Signed-off-by: Ananth N Mavinakayanahalli <ananth@in.ibm.com> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
2014-07-02Initial commit of Open Source releaseBenjamin Herrenschmidt1-0/+239
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
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