index
:
riscv-gnu-toolchain/qemu/roms/skiboot.git
benh-wip
coverity_scan
gh-pages
master
skiboot-5.1.x
skiboot-5.10.x
skiboot-5.3.x
skiboot-5.4.x
skiboot-5.9.x
skiboot-6.0.x
skiboot-6.2.x
skiboot-6.3.x
skiboot-6.5.x
skiboot-6.6.x
skiboot-6.7.x
skiboot-6.8.x
skiboot-next
skiboot-op940.x
staging
ultravisor
Unnamed repository; edit this file 'description' to name the repository.
root
about
summary
refs
log
tree
commit
diff
log msg
author
committer
range
path:
root
/
include
/
npu2-regs.h
Age
Commit message (
Expand
)
Author
Files
Lines
2018-02-08
hw/npu2: Implement logging HMI actions
Balbir Singh
1
-0
/
+11
2018-01-14
npu2.c: Add PE error detection
Alistair Popple
1
-16
/
+1
2017-11-15
Revert "npu2: hw-procedures: Enable low power mode"
Reza Arbab
1
-6
/
+0
2017-11-15
npu2: Move to new GPU memory map
Michael Neuling
1
-0
/
+5
2017-11-15
npu2: Refactor BAR setting code
Michael Neuling
1
-1
/
+2
2017-11-15
npu2: Create npu2_write_mcd()
Michael Neuling
1
-0
/
+3
2017-11-13
npu2: hw-procedures: Add phy_rx_clock_sel()
Reza Arbab
1
-0
/
+1
2017-11-09
npu2: hw-procedures: Enable low power mode
Reza Arbab
1
-0
/
+6
2017-09-12
npu2: Enable recoverable data link (no-stall) interrupts
Sam Bobroff
1
-0
/
+10
2017-08-04
npu2: Set the XTS config2 register
Reza Arbab
1
-0
/
+1
2017-08-04
npu2: Adjust content of the NTL BAR
Reza Arbab
1
-2
/
+4
2017-08-04
npu2: Adjust content of the GENID BAR
Reza Arbab
1
-2
/
+3
2017-08-04
npu2: Add NPU2_GPU1_MEM_BAR
Reza Arbab
1
-0
/
+1
2017-08-04
npu2: Fix indirect SCOM addresses
Reza Arbab
1
-2
/
+4
2017-06-06
hw/npu2.c: Add memory coherence directory programming
Alistair Popple
1
-0
/
+5
2017-05-10
npu2: Fix BAR mapping for multiple chips
Alistair Popple
1
-4
/
+12
2017-03-30
npu2: Add hardware link training procedures
Alistair Popple
1
-0
/
+7
2017-03-30
npu2: Add npu2 register definitions
Alistair Popple
1
-0
/
+431