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2017-12-14libflash/mbox-flash: Understand v3Cyril Bur1-1/+4
Signed-off-by: Cyril Bur <cyril.bur@au1.ibm.com> Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
2017-12-14libflash/mbox-flash: Allow mbox-flash to tell the driver msg timeoutsCyril Bur1-1/+1
Currently when mbox-flash decides that a message times out the driver has no way of knowing to drop the message and will continue waiting for a response indefinitely preventing more messages from ever being sent. This is a problem if the BMC crashes or has some other issue where it won't ever respond to our outstanding message. This patch provides a method for mbox-flash to tell the driver how long it should wait before it no longer needs to care about the response. Signed-off-by: Cyril Bur <cyril.bur@au1.ibm.com> Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
2017-12-14libflash/mbox-flash: Add v2 error codesCyril Bur1-0/+3
Signed-off-by: Cyril Bur <cyril.bur@au1.ibm.com> Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
2017-05-26libflash/mbox-flash: Update to V2 of the protocolCyril Bur1-0/+11
Updated version 2 of the protocol can be found at: https://github.com/openbmc/mboxbridge/blob/master/Documentation/mbox_protocol.md This commit changes mbox-flash such that it will preferentially talk version 2 to any capable daemon but still remain capable of talking to v1 daemons. Version two changes some of the command definitions for increased consistency and usability. Version two includes more attention bits - these are now dealt with at a simple level. Signed-off-by: Cyril Bur <cyril.bur@au1.ibm.com> Signed-off-by: Suraj Jitindar Singh <sjitindarsingh@gmail.com> Acked-by: Cyril Bur <cyril.bur@au1.ibm.com> Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
2017-05-26hw/lpc-mbox: Use message registers for interruptsCyril Bur1-2/+2
Currently the BMC raises the interrupt using the BMC control register. It does so on all accesses to the 16 'data' registers meaning that when the BMC only wants to set the ATTN (on which we have interrupts enabled) bit we will also get a control register based interrupt. The solution here is to mask that interrupt permanantly and enable interrupts on the protocol defined 'response' data byte. Signed-off-by: Cyril Bur <cyril.bur@au1.ibm.com> Signed-off-by: Suraj Jitindar Singh <sjitindarsingh@gmail.com> Reviewed-by: Andrew Jeffery <andrew@aj.id.au> Acked-by: Cyril Bur <cyril.bur@au1.ibm.com> Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
2017-02-23hw/lpc-mbox: Add skiboot driver for the AST BMC mbox registersCyril Bur1-0/+58
This adds an internal skiboot API for accessing the AST BMC mbox registers. Signed-off-by: Cyril Bur <cyril.bur@au1.ibm.com> Signed-off-by: Michael Neuling <mikey@neuling.org> Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
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