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2019-07-26SPDX-ify all skiboot codeStewart Smith1-15/+3
Use Software Package Data Exchange (SPDX) to indicate license for each file that is unique to skiboot. At the same time, ensure the (C) who and years are correct. See https://spdx.org/ Signed-off-by: Stewart Smith <stewart@linux.ibm.com> [oliver: Added a few missing files] Signed-off-by: Oliver O'Halloran <oohall@gmail.com>
2019-02-25astbmc: Try IPMI HIOMAP for P8 (again)Andrew Jeffery1-1/+2
The HIOMAP protocol was developed after the release of P8 in preparation for P9. As a consequence P9 always uses it, but it has rarely been enabled for P8. P8DTU has recently added IPMI HIOMAP support to its BMC firmware, so enable its use in skiboot with P8 machines. Doing so requires some rework to ensure fallback works correctly as in the past the fallback was to mbox, which will only work for P9. Tested on Garrison, Palmetto without HIOMAP, Palmetto with HIOMAP, and Witherspoon. Signed-off-by: Andrew Jeffery <andrew@aj.id.au> Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
2019-02-10Revert "astbmc: Try IPMI HIOMAP for P8"Joel Stanley1-2/+1
This reverts commit bd9839684d482417e8c60449592f4308e9a91dac as it broke booting on P8 systems, including Garrison (AMI BMC), Firestone (AMI BMC) and QEMU (BMC simulator). Issue https://github.com/open-power/skiboot/issues/217 tracks the failure. The P8 IPMI HIOMAP feature can be re-enabled once this issue is resolved. Reported-by: Sam Mendoza-Jonas <sam@mendozajonas.com> Reported-by: Sam Mendoza-Jonas <sam@mendozajonas.com> Signed-off-by: Joel Stanley <joel@jms.id.au> Acked-by: Sam Mendoza-Jonas <sam@mendozajonas.com> Acked-by: Sam Mendoza-Jonas <sam@mendozajonas.com> Tested-by: Alexey Kardashevskiy <aik@ozlabs.ru> Acked-by: Andrew Jeffery <andrew@aj.id.au> Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
2019-01-18astbmc: Try IPMI HIOMAP for P8Andrew Jeffery1-1/+2
The HIOMAP protocol was developed after the release of P8 in preparation for P9. As a consequence P9 always uses it, but it has rarely been enabled for P8. P8DTU has recently added IPMI HIOMAP support to its BMC firmware, so enable its use in skiboot with P8 machines. Doing so requires some rework to ensure fallback works correctly as in the past the fallback was to mbox, which will only work for P9. Signed-off-by: Andrew Jeffery <andrew@aj.id.au> Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
2018-10-11platform: Restructure bmc_platform typeAndrew Jeffery1-0/+1
Segregate the BMC platform configuration into hardware and software components. This allows population of platform default values for hardware configuration that may no-longer be accessible by the host. Signed-off-by: Andrew Jeffery <andrew@aj.id.au> [stewart: fixup pci-quirk unit test] Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
2018-10-11astbmc: Remove coordinated isolation supportAndrew Jeffery1-2/+0
Signed-off-by: Andrew Jeffery <andrew@aj.id.au> Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
2018-10-11astbmc: Prefer ipmi-hiomap for PNOR accessAndrew Jeffery1-2/+2
If the IPMI command is not available, fall back to the mailbox interface. Signed-off-by: Andrew Jeffery <andrew@aj.id.au> [stewart: fix up mbox test] Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
2018-07-17lpc: Silence LPC SYNC no-response error when necessaryAndrew Jeffery1-0/+1
Add the ability to silence particular errors from the LPC bus when they can be expected, particularly: LPC[000]: Got SYNC no-response error. Error address reg: 0xd001002f This is necessary on platform exit on some astbmc machines to avoid unnecessary noise in the msglog. Signed-off-by: Andrew Jeffery <andrew@aj.id.au> Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
2018-07-17ast-io: Rework setup/tear-down of communication with the BMCAndrew Jeffery1-4/+15
It's possible for the platform to configure the BMC with SuperIO access disabled. Rework the interfaces to report failures if SuperIO is not enabled, and clean up once we're finished. Signed-off-by: Andrew Jeffery <andrew@aj.id.au> Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
2018-07-17ast-bmc: Rename LPC FW cycle helpersAndrew Jeffery1-2/+2
Introduce some consistency for readability and make the names better reflect the nature of the tests. Signed-off-by: Andrew Jeffery <andrew@aj.id.au> Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
2018-07-17ast-bmc: Move copy routines to ast-sf-ctrlAndrew Jeffery1-6/+0
The only user was hw/ast-bmc/ast-sf-ctrl.c, and for accessing flash the copy routines require knowledge of the PNOR LPC offset. For systems using MBOX the ast-sf-ctrl implementation is unused, so move the offset initialisation out of the common code-path and the copy routines to the place where they are necessary. Signed-off-by: Andrew Jeffery <andrew@aj.id.au> Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
2018-06-18astbmc: Enable mbox depending on scratch regJoel Stanley1-0/+1
P8 boxes can opt in for mbox pnor support if they set the scratch register bit to indicate it is supported. Signed-off-by: Joel Stanley <joel@jms.id.au> Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
2017-03-03pci/quirk: Populate device tree for AST2400 VGARussell Currey1-0/+7
Adding these properties enables the kernel to function in the same way that it would if it could no longer access BMC configuration registers through a backdoor, which may become the default in future. The comments describe how isolating the host from the BMC could be achieved in skiboot, assuming all kernels that the system boots support this. Isolating the BMC and the host from each other is important if they are owned by different parties; for example, a cloud provider renting machines "bare metal". Acked-by: Joel Stanley <joel@jms.id.au> Signed-off-by: Russell Currey <ruscur@russell.cc> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
2017-02-23astbmc/pnor: Use mbox-flash for flash accessesCyril Bur1-0/+1
If the BMC is MBOX protocol aware, request flash reads/writes over the MBOX regs. This inits the blocklevel for pnor access with mbox-flash. Signed-off-by: Cyril Bur <cyril.bur@au1.ibm.com> Signed-off-by: Michael Neuling <mikey@neuling.org> Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
2017-02-23ast-bmc: Use the mbox driverCyril Bur1-0/+3
The mbox registers are accessed via superIO, these need to be initialised. The mbox device node won't be present in the device tree hostboot passes us, so fixup the device tree. Signed-off-by: Cyril Bur <cyril.bur@au1.ibm.com> Signed-off-by: Michael Neuling <mikey@neuling.org> Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
2015-11-26libflash: enable 4b mode on BMC SPI flashJoel Stanley1-0/+1
We already support larger parts on the host flash, but the BMC has always had a 16MB part, so we did not need to enable the 4b addressing mode. This enables the 4b addressing mode when the flash is larger than 16MB. Signed-off-by: Joel Stanley <joel@jms.id.au> Reviewed-by: Cédric Le Goater <clg@fr.ibm.com> Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
2015-03-26memboot: Add a memboot flash backendAlistair Popple1-0/+2
memboot uses bmc system memory instead of a real flash chip. This patch adds a flash backend for bmc system memory to allow use of the memboot tool (in external/memboot) to boot the system. Signed-off-by: Alistair Popple <alistair@popple.id.au> Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
2014-10-15libflash: Sync with pflash 0.8.3Benjamin Herrenschmidt1-0/+6
Fixes 64MB chip support, improve Macronix settings, add Micron chip support, etc... Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
2014-10-05plat/palmetto: Fix SIO UART vs UART setup and iBT setupBenjamin Herrenschmidt1-2/+17
The AMI images use the virtual UART, not the SIO UART, so configuring the SIO the way we do is incorrect. Additionally, they don't configure the interrupts properly (bad polarity for VUART and bad number for iBT). This reworks the inits to fix that up: - All SIO interrupts are set to level low - Check if VUART is enabled. If yes, configure and use it (and disable SIO UART which hostboot might have left enabled). - Else, reconfigure VUART LPC address and IRQ properly - Configure iBT LPC address and IRQ properly Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
2014-07-02Initial commit of Open Source releaseBenjamin Herrenschmidt1-0/+78
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
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