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Author
Files
Lines
2020-08-28
fsp/dump: Handle non-MPIPL scenario
Vasant Hegde
1
-4
/
+4
2020-08-28
hw/phb4: Verify AER support before initialising AER regs
Oliver O'Halloran
1
-0
/
+3
2020-08-28
hw/phb4: Actually enable error reporting
Oliver O'Halloran
1
-0
/
+1
2020-08-07
imc: Use pir_to_core_id() rather than cpu_get_core_index()
Benjamin Herrenschmidt
1
-4
/
+4
2020-08-07
slw: Limit fused cores P9 to STOP0/1/2
Benjamin Herrenschmidt
1
-1
/
+81
2020-08-07
xive: Set the fused core mode properly
Benjamin Herrenschmidt
1
-0
/
+4
2020-08-07
Add basic P9 fused core support
Ryan Grimm
1
-1
/
+1
2020-08-07
xive/p9: Enforce thread enablement before TIMA accesses
Cédric Le Goater
1
-0
/
+15
2020-08-07
xive: Fix typos in comments
Gustavo Romero
1
-2
/
+2
2020-08-07
hw/psi-p9: Configure IRQ offset before XIVE notify
Oliver O'Halloran
1
-10
/
+10
2020-07-02
fsp: Skip sysdump retrieval only in MPIPL boot
Vasant Hegde
1
-3
/
+11
2020-06-30
xive: Fix two typos in comments
Gustavo Romero
1
-2
/
+2
2020-06-30
prd: Do not assert if HBRT makes unsupported call
Vasant Hegde
1
-13
/
+29
2020-06-30
mpipl: Move opal_mpipl_save_crashing_pir() call to platform specific code
Vasant Hegde
2
-0
/
+7
2020-06-30
mpipl: Delay MPIPL registration until OPAL init is complete
Vasant Hegde
1
-1
/
+1
2020-06-30
uart: Actually swallow data if LPC is not working
Vasant Hegde
1
-1
/
+1
2020-06-30
dt: Set new property length in dt_resize_property()
Thiago Jung Bauermann
3
-3
/
+0
2020-06-30
xive/P9: Use NUM_INT_PRIORITIES in xive_reset()
Cédric Le Goater
1
-1
/
+1
2020-06-30
xive/p9: Introduce XIVE_ESB_SIZE
Cédric Le Goater
1
-7
/
+8
2020-06-30
xive/p9: use PAGE_SIZE
Cédric Le Goater
1
-19
/
+19
2020-06-30
hw/xive: Use XIVE_VSD_SIZE more
Oliver O'Halloran
1
-2
/
+2
2020-06-30
xive/p9: Introduce definitions for VP ids of HW threads
Cédric Le Goater
1
-13
/
+22
2020-06-30
xive/p9: Modify the size of the VP space
Cédric Le Goater
1
-8
/
+12
2020-06-30
xive/p9: Force 64K page size on the IC and TM BARs
Cédric Le Goater
1
-21
/
+6
2020-06-30
xive/p9: Clarify indirect table allocation
Cédric Le Goater
1
-12
/
+17
2020-06-30
xive/p9: Use sizeof() instead of hardcoded values
Cédric Le Goater
1
-2
/
+3
2020-06-30
xive/p9: Introduce XIVE_EQ_SHIFT
Cédric Le Goater
1
-2
/
+3
2020-06-30
xive/p9: Clarify the escalation IRQ encoding
Cédric Le Goater
1
-4
/
+9
2020-06-30
xive/p9: Introduce XIVE_EQ_ORDER
Cédric Le Goater
1
-8
/
+9
2020-06-30
xive/p9: Introduce XIVE_ESB_SHIFT
Cédric Le Goater
1
-4
/
+6
2020-06-30
xive/p9: Clarify the global IRQ number encoding
Cédric Le Goater
1
-6
/
+13
2020-06-30
xive/p9: Introduce XIVE_INT_ORDER
Cédric Le Goater
1
-14
/
+20
2020-06-17
test: Do gcov builds as a seperate pass
Oliver O'Halloran
1
-1
/
+1
2020-06-11
io: endian annotations and fix
Nicholas Piggin
1
-6
/
+6
2020-06-03
xive: Fix typo and spelling in a comment
Gustavo Romero
1
-1
/
+1
2020-06-03
occ: Fix false negatives in wait_for_all_occ_init()
Gautham R. Shenoy
1
-30
/
+147
2020-06-03
hw/phb4: Enable error interrupts
Oliver O'Halloran
1
-1
/
+39
2020-06-03
hw/phb4: Factor out interrupt setup
Oliver O'Halloran
1
-5
/
+11
2020-06-03
hw/phb4: Don't disable TXE(12) interrupt if on P9 DD2.0
Oliver O'Halloran
1
-4
/
+1
2020-06-03
hw/phb4: Fix interrupt names
Oliver O'Halloran
1
-0
/
+17
2020-06-03
hw/phb4: Make error interrupt handler compile
Oliver O'Halloran
1
-3
/
+1
2020-06-03
uart: Drop console write data if BMC becomes unresponsive
Vasant Hegde
1
-26
/
+74
2020-05-26
hw/phys-map: Fix OCAPI_MEM BAR values
Andrew Donnellan
1
-3
/
+3
2020-05-26
platform/mihawk: Tune equalization settings for opencapi
Frederic Barrat
1
-4
/
+19
2020-05-26
PSI: Convert prerror to PR_NOTICE
Vasant Hegde
1
-1
/
+1
2020-05-26
sensors: occ: Fix a bug when sensor values are zero
Gautham R. Shenoy
1
-1
/
+2
2020-05-26
sensors: occ: Fix the GPU detection code
Gautham R. Shenoy
1
-2
/
+20
2020-04-15
MPIPL: Add support to save crash CPU details on FSP system
Vasant Hegde
1
-3
/
+0
2020-04-15
fsp: Ignore platform dump notification on P9
Vasant Hegde
1
-0
/
+3
2020-04-08
hw/ocmb: Add OCMB SCOM support
Oliver O'Halloran
2
-0
/
+168
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