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Use Software Package Data Exchange (SPDX) to indicate license for each
file that is unique to skiboot.
At the same time, ensure the (C) who and years are correct.
See https://spdx.org/
Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
[oliver: Added a few missing files]
Signed-off-by: Oliver O'Halloran <oohall@gmail.com>
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Allow the submitter to track the state of an I2C request by adding
a state field to the request. This avoids the need to use a stub
completion callback in some cases.
Signed-off-by: Oliver O'Halloran <oohall@gmail.com>
Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
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Commit eb146fac9685 ("core/i2c: Move the timeout field into
i2c_request") simplified a bit how a request timeout is
handled. However there's now some confusion between milliseconds and
timebase increments when defining or using the timeout values, which
breaks i2c requests made for opencapi, and probably others too.
This patch declares all the timeout in milliseconds and just converts
to timebase at the end of the chain, as needed.
Signed-off-by: Frederic Barrat <fbarrat@linux.ibm.com>
Tested-by: Andrew Donnellan <andrew.donnellan@au1.ibm.com>
Reviewed-by: Oliver O'Halloran <oohall@gmail.com>
Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
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These are now pointless and they can be replaced with zalloc() and free().
Signed-off-by: Oliver O'Halloran <oohall@gmail.com>
Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
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The p8_i2c_request structure is barely used and the only useful data it
contains (port_num) can be derived from the bus pointer. Remove it in
preperation for removing the per-bus allocation and free methods.
Signed-off-by: Oliver O'Halloran <oohall@gmail.com>
Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
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Currently to set a per-request timeout you need to use
i2c_req_set_timeout() which is a wrapper for a per-bus method that sets the
actual timeout. This design doesn't make a whole lot of sense, so move
the timeout field into the generic i2c_request structure and set the
timeout to be set using that.
Signed-off-by: Oliver O'Halloran <oohall@gmail.com>
Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
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This is purely to save me from having to look it up every time someone
gets an I2C error.
Signed-off-by: Oliver O'Halloran <oohall@gmail.com>
Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
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We only touch it in limited places, let's simplify skiboot.h
Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
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If the bus is found in error state when starting a new request, the
engine is reset and we enter recovery. However, once complete, the
reset operation shows a status of complete in the status register. So
any badly-timed called to check_status() will think the current top
request is complete, even though it hasn't run yet.
So don't update any request status while we are in recovery, as
nothing useful for the request is supposed to happen in that state.
Signed-off-by: Frederic Barrat <fbarrat@linux.ibm.com>
Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
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Force reset was added as an attempt to work around some issues with TPM
devices locking up their I2C bus. In that particular case the problem
was that the device would hold the SCL line down permanently due to a
device firmware bug. The force reset doesn't actually do anything to
alleviate the situation here, it just happens to reset the internal
master state enough to make the I2C driver appear to work until
something tries to access the bus again.
On P9 systems with secure boot enabled there is the added problem
of the "diagostic mode" not being supported on I2C masters A,B,C and
D. Diagnostic mode allows the SCL and SDA lines to be driven directly
by software. Without this force reset is impossible to implement.
This patch removes the force reset functionality entirely since:
a) it doesn't do what it's supposed to, and
b) it's butt ugly code
Additionally, turn p8_i2c_reset_engine() into p8_i2c_reset_port().
There's no need to reset every port on a master in response to an
error that occurred on a specific port.
Signed-off-by: Oliver O'Halloran <oohall@gmail.com>
Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
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Add support for setting a default timeout for the I2C port to the
device-tree. This is consumed by skiboot.
Signed-off-by: Oliver O'Halloran <oohall@gmail.com>
Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
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Current we will attempt to start an I2C transaction until it succeeds.
In the event that the OCC does not release the lock on an I2C bus this
results in an async token being held forever and the kernel thread that
started the transaction will block forever while waiting for an async
completion message. Fix this by limiting the number of attempts to
start the transaction.
Signed-off-by: Oliver O'Halloran <oohall@gmail.com>
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
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On P9 the I2C master is shared with the OCC. Currently the watermark
values are set once at init time which is bad for two reasons:
a) We don't take the OCC master lock before setting it. Which
may cause issues if the OCC is currently using the master.
b) The OCC might change the watermark levels and we need to reset
them.
Change this so that we set the watermark value when a new transaction
is started rather than at init time.
Signed-off-by: Oliver O'Halloran <oohall@gmail.com>
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
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This patch reworks the way timeouts are set so that rather than imposing
a hard deadline based on the transaction length it uses a
kick-the-can-down-the-road approach where the timeout will be reset each
time data is written to or received from the master. This fits better
with the actual failure modes that timeouts are designed to handle, such
as unusually slow or broken devices.
Additionally this patch moves all the special case detection out of the
timeout handler. This is help to improve the robustness of the driver and
prepare for a more substantial rework of the driver as a whole later on.
Signed-off-by: Oliver O'Halloran <oohall@gmail.com>
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
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When debugging a system where Linux was taking soft lockup errors, I
noticed two CPUs were stuck in OPAL:
CPU0
lock
p8_i2c_recover
opal_handle_interrupt
CPU1
sync_timer
cancel_timer
p9_i2c_bus_owner_change
occ_p9_interrupt
xive_source_interrupt
opal_handle_interrupt
p8_i2c_recover() is a timer, and is stuck trying to take master->lock.
p9_i2c_bus_owner_change() has taken master->lock, but then is stuck waiting
for all timers to complete. We deadlock.
Fix this by using cancel_timer_async(), as suggested by Oliver.
Fixes: 201fd50f208d ("hw/p8-i2c: Fix OCC locking")
Suggested-by: Oliver O'Halloran <oohall@gmail.com>
Signed-off-by: Anton Blanchard <anton@samba.org>
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
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Currently we treat a timeout as a hard failure and will automatically
fail any transations that hit their timeout. This results in
unnecessarily failing I2C requests if interrupts are dropped, etc.
Although these are bad things that we should log we can handle them
better by checking the actual hardware status and completing the
transation if there are no real errors. This patch reworks the timeout
handling to check the status and continue the transaction if it can.
if it can while logging an error if it detects a timeout due to a
dropped interrupt.
Signed-off-by: Oliver O'Halloran <oohall@gmail.com>
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
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While waiting for the OCC to signal that it has finished using the I2C
master we put the master into the, poorly named, occache_dis state.
While in this state the transaction hasn't been started, but
p8_i2c_check_status() will only skip it's checks when the master is in
the idle state. Any action that checks that cranks the I2C state machine
(interrupt, poll, etc) will call p8_i2c_check_status() and since the
master is not idle, it will check the status register, see the
transaction complete flag set and complete the i2c request without
actually doing anything.
If the transaction was a I2C read, the resulting output will be a
zeroed data buffer.
Signed-off-by: Oliver O'Halloran <oohall@gmail.com>
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
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There's a few issues with the Host<->OCC I2C bus handshaking. First up,
skiboot is currently examining the wrong bit when checking if the OCC
is currently using the bus. Secondly, when we need to wait for the OCC
to release the bus we are scheduling a recovery timer to run zero
timebase ticks after the current moment so the recovery timeout handler
will run immediately after the bus was requested, which will in turn
re-schedule itself, etc, etc. There's also a race between the OCC
interrupt and the recovery handler which can result in an assertion
failure in the recovery thread. All of this is bad.
This patch addresses all these issues and sets the recovery timeout to
10ms.
Signed-off-by: Oliver O'Halloran <oohall@gmail.com>
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
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Fixes: c5fa0d718e9cda8999dcb83088118a7ea61814c5
Reported-by: Oliver O'Halloran <oohall@gmail.com>
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
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This patch adds support to share the I2C engines with host and OCC.
OCC uses I2C engines to read DIMM temperatures and to communicate with
GPU. OCC Flag register is used for locking between host and OCC. Host
requests for the bus by setting a bit in OCC Flag register. OCC sends
an interrupt to indicate the change in ownership.
Originally-from: Oliver O'Halloran <oohall@gmail.com>
Signed-off-by: Shilpasri G Bhat <shilpa.bhat@linux.vnet.ibm.com>
[stewart@linux.vnet.ibm.com: Pretty heavily rework logic, including
fixing bus owner change and separating out occ lock from sensor cache]
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
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When interacting with an I2C master the p8-i2c driver (common to p9)
aquires a per-master lock which it holds for the duration of it's
interaction with the master. Unfortunately, when
p8_i2c_check_initial_status() detects that the master is busy with
another transaction it drops the lock and returns OPAL_BUSY. This is
contrary to the driver's locking strategy which requires that the
caller aquire and drop the lock. This leads to a crash due to the
double unlock(), which skiboot treats as fatal.
Signed-off-by: Oliver O'Halloran <oohall@gmail.com>
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
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There's a new field in the command register to control where
to steer the interrupt. Set it always, these are unused bits
on P8 so shouldn't hurt.
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Tested-by: Oliver O'Halloran <oohall@gmail.com>
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
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This hack dates back to ancient P8 hostboots. The value
it would use if it detected the "bad" value was incorrect
anyway.
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Tested-by: Oliver O'Halloran <oohall@gmail.com>
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
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Since it's a non-trivial derivation from HDAT values,
it's useful to log it for diagnostics.
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Reviewed-by: Oliver O'Halloran <oohall@gmail.com>
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
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Log more registers, cleanup the output alignment,
and timestamp start/stop of requests
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Reviewed-by: Oliver O'Halloran <oohall@gmail.com>
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
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It appears that our reset code wasn't entirely correct, and what we're
meant to do is reset each port and wait for command complete. In the
event where that fails, we can then bitbang things to recover to a state
where at least the i2c engine isn't in a weird state.
Practically, this means that "i2cdetect -y 10; i2cdetect -y 10" (where 10
is the bus where a TPM is attached, typically p8e1p2) doesn't hard lock
the machine (things are still bad and you won't reboot successfully, but
it's *better*).
one downside to this patch is that we spend a *long* time in OPAL (tens
of ms) when doing the reset. This is something that we really need to fix,
as it's not at all nice. The full fix for this though will involve changing
a decent chunk of the p8-i2c code, as we don't want to write *any* registers
while doing this extended reset (while existing code checks status a bit
later).
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
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Otherwise we'd default to 2seconds (TIMER_POLL) during boot on
chips with a functional i2c interrupt, leading to slow i2c
during boot (or hitting timeouts instead).
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
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Doing everything asynchronously is brilliant, it's exactly what we
want to do.
Except... the tpm driver wants to do things synchronously, which isn't
so cool.
For reasons that are not yet completely known, we spend an awful lot of
time in the main thread *not* running pollers (potentially seconds), which
doesn't bode well for I2C timeouts.
Since the TPM measure is done in a secondary thread, we do *not* run pollers
there either (as of 323c8aeb54bd4e0b9004091fcbb4a9daeda2f576 - which is
roughly as of skiboot 2.1.1).
But we still need to crank the i2c state machine, so we introduce a call
to do just that. It will return how long the poll interval should be, so
that we can time_wait() for a more appropriate time for whatever i2c
implementation is sitting behind things.
Without this, it was "easy" to get to a situation where the i2c state machine
wasn't cranked at all, and you'd hit the i2c timeout (for the issued operation)
before the poller to crank i2c was ever called.
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
Tested-by: Claudio Carvalho <cclaudio@linux.vnet.ibm.com>
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
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If we had XSCOM/FSI errors accessing a centaur, we assert later
on when trying to create it's i2c bus. Don't, just file an error log
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
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Prior to PCI enumeration, the PHB slot's power state might be changed
during fundamental reset. The fundamental reset is implemented by state
machine and it's driven by a polling mechanism in predetermined interval
(A). On the other hand, PCI slot's power supply is controlled by I2C
chip on Firenze platform. It means the PCI slot's power supply state is
changed through I2C request which has a timeout timer running in variable
interval (B).
Comparing to (A), (B) is small and short. That means I2C timeout is reached
before first poll running in interval of (A). It's unexpected behaviour.
This allows to set I2C request timeout ((B)) to avoid the issue.
Signed-off-by: Gavin Shan <gwshan@linux.vnet.ibm.com>
Reviewed-by: Stewart Smith <stewart@linux.vnet.ibm.com>
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
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Removes the redundant header file fsp-elog.h from hw/fsp/fsp-codeupdate.c
and hw/p8-i2c.c
Signed-off-by: Mukesh Ojha <mukesh02@linux.vnet.ibm.com>
Acked-by: Vasant Hegde <hegdevasant@linux.vnet.ibm.com>
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
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For SMBUS_WRITE, the register offset and the following data can be
sent to I2C bus in one shoot if the FIFO has enough spare space.
It helps to gain a bit more performance obviously.
Signed-off-by: Gavin Shan <gwshan@linux.vnet.ibm.com>
Acked-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
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Some devices otherwise can leave the bus in a held state. We also clean
things up a bit by using the same path as the normal error path using
a pseudo-error status bit.
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
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Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
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The caller usually has it and it avoids additional mftb() which
can be expensive.
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
[stewart@linux.vnet.ibm.com: fix run-timer unit test]
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
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See https://github.com/lucasdemarchi/codespel
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
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There are now no users of the call_out parameter and future users should
use the log_append_msg() and log_append_data() functions, so remove all
references to call_out.
Signed-off-by: Samuel Mendoza-Jonas <sam.mj@au1.ibm.com>
Reviewed-by: Vasant Hegde <hegdevasant@linux.vnet.ibm.com>
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
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To avoid possible XSCOM collisions
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
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It may or may not already contain the right error code (it can be
used internally by the state machine to carry the error accross the
recovery state), but in case where it's not, update it.
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
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The Centaur i2c differs from the main P8 one two ways:
- It doesn't have interrupts, we need to always use polling
- There is a sensor cache for use by the OCC that regularly generates
i2c transactions in HW on that bus. It needs to be disabled before we
can perform i2c accesses and re-enabled later.
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
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The i2c and SLW code are testing for P8 chips by chip type
and missing Naples. Fix this.
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
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The cell clock is 50Mhz on P8, not 600Mhz ! Remove this when HB has
been fixed.
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Jeremy Kerr <jk@ozlabs.org>
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
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We are getting the i2c device tree data from the hostboot and it
has i2cm nodes compatible to multiple chips like p8 and centaur.
The patch further adds the OPAL properties to the i2c bus nodes
required by the kernel.
Signed-off-by: Neelesh Gupta <neelegup@linux.vnet.ibm.com>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Jeremy Kerr <jk@ozlabs.org>
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
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The last two patches updated GETFIELD() and SETFIELD() to no longer
require the user to specify the mask and shift of a field, and to
remove all _LSH defines and rename any _MASK defines. There are
some places where the masks were used directly, where the caller
needs to have the _MASK suffix removed. There are also two users
of SETFIELD() where the field name still has the _MASK suffix
because there is an existing macro with the base name.
Change users of SETFIELD() to include the _MASK suffix where needed.
Change direct users of any mask to remove the _MASK suffix.
Signed-off-by: Dan Streetman <ddstreet@ieee.org>
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
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The last patch changed the SETFIELD() and GETFIELD() macros to automatically
calculate the shift of a given mask, so manually specifying the shift is no
longer needed. Additionally, any masks should have the _MASK suffix removed
since the GETFIELD() and SETFIELD() operations expected to be passed the
mask name without the _MASK suffix (and so either the mask name or the
get/setfield call needs to have its mask name changed).
Change all _MASK masks to remove the _MASK suffix, except for any places
that leaving _MASK makes sense (e.g. already an existing define without
_MASK suffix).
Remove all _LSH defines, as they are no longer needed.
Signed-off-by: Dan Streetman <ddstreet@ieee.org>
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
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In the recovery case
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
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This is probably not the best collection of things in the world,
but it means that opal.h is much closer to being directly usable
by an OS.
This triggers a bunch of #include fixes throughout the tree.
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
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Provide the frequencies in same unit (HZ) for calculating the bit rate
divisor value.
Signed-off-by: Neelesh Gupta <neelegup@linux.vnet.ibm.com>
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
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The i2c bus frequency is now per port and we use more standard properties
this and the clock frequency of the master cell itself.
Also use "ibm,opal-i2c" as a compatible match to indicate that the DT node
is compatible with the OPAL APIs, whether it's a P8 i2c bus or something
else (we will eventually expose the centaur i2c's too for example).
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
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Define SRCs of I2C component and interface with the existing
skiboot 'errorlog' infrasturcute for commiting the logs. Add the
i2c specific OPAL error codes to differentiate various types of
errors during i2c operations.
To ease debugging, dump the i2c register contents, 'master' and
'request' structure bits in case any error occured during transfer
on the bus. Minor clean-ups as well.
Signed-off-by: Neelesh Gupta <neelegup@linux.vnet.ibm.com>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
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