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path: root/hw/npu.c
AgeCommit message (Expand)AuthorFilesLines
2020-06-30dt: Set new property length in dt_resize_property()Thiago Jung Bauermann1-1/+0
2020-03-12Re-license IBM written files as Apache 2.0 OR GPLv2+Stewart Smith1-1/+1
2019-11-11Remove dead POWER7 codeNicholas Piggin1-1/+0
2019-08-16npu: Fix device binding error messageReza Arbab1-2/+6
2019-08-16pci: Use a macro for accessing PCI BDF Bus NumberJordan Niethe1-1/+1
2019-07-26SPDX-ify all skiboot codeStewart Smith1-13/+5
2019-06-03Remove remnants of OPAL_PCI_GET_PHB_DIAG_DATAStewart Smith1-1/+0
2019-02-18opal: Deprecate reading the PHB statusAlexey Kardashevskiy1-2/+1
2019-01-18sparse: Make tree 'constant is so big' warning cleanStewart Smith1-3/+3
2018-04-11interrupts: Create an "interrupts" property in the OPAL nodeBenjamin Herrenschmidt1-1/+1
2017-10-29npu: Fix broken fast resetAlexey Kardashevskiy1-0/+3
2017-05-03npu, npu2: Describe diag data size in device treeRussell Currey1-0/+1
2017-04-27npu: Implement FLRAlexey Kardashevskiy1-1/+28
2016-12-21tree-wide: use dt_add_property_u64s() where we canOliver O'Halloran1-2/+1
2016-10-24pci: Remove obsoleted PCI slot pfreset() operationGavin Shan1-1/+0
2016-09-14hw/npu.c: Fix reserved PE#Alistair Popple1-4/+2
2016-09-06hw/npu.c: NPU bdfn allocation bugfixAlistair Popple1-3/+1
2016-09-05nvlink: Fix bad PE number checkRussell Currey1-1/+1
2016-09-02hw/npu: Use PCI virtual deviceGavin Shan1-317/+133
2016-09-02hw/npu: assert the NPU irq min is aligned.Milton Miller1-1/+3
2016-09-02hw/npu: program NPU BUID reg properlyMilton Miller1-7/+13
2016-08-30pci: Standardise on uint64_t pe_numberRussell Currey1-14/+14
2016-08-11interrupts: Add new source ->attributes callbackBenjamin Herrenschmidt1-10/+13
2016-08-10npu: reword "error" to indicate it's actually a warningStewart Smith1-6/+1
2016-07-20hw/npu: assert() on PHB device nodeGavin Shan1-11/+1
2016-07-20hw/npu: Get AT BAR from MMIO layoutGavin Shan1-18/+6
2016-07-20hw/npu: Get number of links from NPU node propertyGavin Shan1-4/+2
2016-07-20nvlink: Associate and allocate NPUs using slotsRussell Currey1-34/+25
2016-07-13interrupts: Expose irq_source and change prototypes of all opsBenjamin Herrenschmidt1-12/+9
2016-07-12interrupts: Use a #interrupt-cells of 2 for XICS interruptsBenjamin Herrenschmidt1-19/+13
2016-06-21nvlink: Print error message when NPU is fencedRussell Currey1-1/+12
2016-06-21nvlink: Enable NPU device BAR before triggering freezeRussell Currey1-1/+4
2016-06-21nvlink: Present chip ID as the NPU PHB slot locationRussell Currey1-0/+8
2016-06-20fwts: Add FWTS annotations for NPU errorsStewart Smith1-1/+28
2016-06-20Fix for typosFrederic Bonnard1-1/+1
2016-06-14hw/npu: Support PHB slotGavin Shan1-15/+42
2016-06-14core/pci: Extend pci_walk_dev() for PCI slotGavin Shan1-2/+2
2016-06-14core/pci: Fix wrong reserved PE# in enumerationGavin Shan1-0/+1
2016-05-03PCI: Introduce phb_ops->phb_final_fixup()Gavin Shan1-3/+12
2016-05-03PCI: Move PHB lock to generic layerGavin Shan1-17/+0
2016-04-27hw/npu.c: Add ibm, npu-index property to npu device treeAlistair Popple1-3/+5
2016-01-21nvlink: Add primitive EEH support for NPU devicesRussell Currey1-3/+42
2016-01-21nvlink: Add freeze and fence error injectionRussell Currey1-1/+43
2016-01-21nvlink: Add fence mode emulation for NPUsRussell Currey1-2/+13
2016-01-12nvlink: Set a bit in config space to indicate a real PCI device was boundRussell Currey1-8/+23
2015-11-17PCI: use define for wanting dynamic PHB id for pci_register_phbStewart Smith1-1/+1
2015-11-10llvm-scan-build: fix value stored during init is never read in npu.cStewart Smith1-1/+1
2015-10-26Nvlink: Add NPU PHB functionsAlistair Popple1-0/+1718
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