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path: root/hw/npu.c
AgeCommit message (Expand)AuthorFilesLines
2016-07-20hw/npu: assert() on PHB device nodeGavin Shan1-11/+1
2016-07-20hw/npu: Get AT BAR from MMIO layoutGavin Shan1-18/+6
2016-07-20hw/npu: Get number of links from NPU node propertyGavin Shan1-4/+2
2016-07-20nvlink: Associate and allocate NPUs using slotsRussell Currey1-34/+25
2016-07-13interrupts: Expose irq_source and change prototypes of all opsBenjamin Herrenschmidt1-12/+9
2016-07-12interrupts: Use a #interrupt-cells of 2 for XICS interruptsBenjamin Herrenschmidt1-19/+13
2016-06-21nvlink: Print error message when NPU is fencedRussell Currey1-1/+12
2016-06-21nvlink: Enable NPU device BAR before triggering freezeRussell Currey1-1/+4
2016-06-21nvlink: Present chip ID as the NPU PHB slot locationRussell Currey1-0/+8
2016-06-20fwts: Add FWTS annotations for NPU errorsStewart Smith1-1/+28
2016-06-20Fix for typosFrederic Bonnard1-1/+1
2016-06-14hw/npu: Support PHB slotGavin Shan1-15/+42
2016-06-14core/pci: Extend pci_walk_dev() for PCI slotGavin Shan1-2/+2
2016-06-14core/pci: Fix wrong reserved PE# in enumerationGavin Shan1-0/+1
2016-05-03PCI: Introduce phb_ops->phb_final_fixup()Gavin Shan1-3/+12
2016-05-03PCI: Move PHB lock to generic layerGavin Shan1-17/+0
2016-04-27hw/npu.c: Add ibm, npu-index property to npu device treeAlistair Popple1-3/+5
2016-01-21nvlink: Add primitive EEH support for NPU devicesRussell Currey1-3/+42
2016-01-21nvlink: Add freeze and fence error injectionRussell Currey1-1/+43
2016-01-21nvlink: Add fence mode emulation for NPUsRussell Currey1-2/+13
2016-01-12nvlink: Set a bit in config space to indicate a real PCI device was boundRussell Currey1-8/+23
2015-11-17PCI: use define for wanting dynamic PHB id for pci_register_phbStewart Smith1-1/+1
2015-11-10llvm-scan-build: fix value stored during init is never read in npu.cStewart Smith1-1/+1
2015-10-26Nvlink: Add NPU PHB functionsAlistair Popple1-0/+1718
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