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[ Upstream commit 7194e92cc700bfcc6f12f5fc12da06ef936bd2b8 ]
Artem Senichev reported[1] his P8 platform was failing to boot from
a43e9a66aae9 ("astbmc: Fail SFC init if SIO is unavailable") with the
following error:
[ 110.097168975,3] PLAT: Failed to open PNOR flash controller
I reproduced this behaviour on a Palmetto; we need to ensure the state
of the no-response error bit is clear before proceding with the presence
test.
The fix appears to resolve the failure to open the PNOR flash controller
on Palmetto and doesn't change the expected behaviour on Witherspoon.
[1] https://github.com/open-power/skiboot/issues/197
Signed-off-by: Andrew Jeffery <andrew@aj.id.au>
Tested-by: Artem Senichev <a.senichev@yadro.com>
Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
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[ Upstream commit 5684204c2d0b470de72eff563c9e0172bbdbcb18 ]
Introduce generic read and write probe functions that allow detection of
valid addresses by way of synchronous testing for the SYNC no-response
state. If the no-response state is detected the probe functions will
return an error to the caller, who can do with it what they wish.
In the process, rip out the naive mechanism for muting the equivalent
asynchronous error logging (regretfully introduced recently by yours
truly).
Signed-off-by: Andrew Jeffery <andrew@aj.id.au>
Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
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[ Upstream commit 1d8793c64b596cfdcc3cf6035a3b4cbe3c341ae9 ]
Add the ability to silence particular errors from the LPC bus when they
can be expected, particularly:
LPC[000]: Got SYNC no-response error. Error address reg: 0xd001002f
This is necessary on platform exit on some astbmc machines to avoid
unnecessary noise in the msglog.
Signed-off-by: Andrew Jeffery <andrew@aj.id.au>
Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
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Deprecate the old "opal-interrupts", it's still there, but the new
property follows the standard and allow us to specify whether an
interrupt is level or edge sensitive.
Similarly create "interrupt-names" whose content is identical to
"opal-interrupts-names".
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
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When we come in from hostboot the LPC master has the bus reset indicator
set. This error isn't handled until the host kernel unmasks interrupts,
at which point we get the following suprious error:
[ 20.053560375,3] LPC: Got LPC reset on chip 0x0 !
[ 20.053564560,3] LPC[000]: Unknown LPC error Error address reg: 0x00000000
Fix this by clearing the various error bits in the LPC status register
before we initalise the skiboot LPC bus driver.
Signed-off-by: Oliver O'Halloran <oohall@gmail.com>
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
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Signed-off-by: Joel Stanley <joel@jms.id.au>
Reviewed-by: Michael Neuling <mikey@neuling.org>
Reviewed-by: Russell Currey <ruscur@russell.cc>
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
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The file has pr_fmt set so messages come out like this:
[ 73.382366442,7] LPC: LPC: Routing irq 9, policy: 0 (r=1)
[ 73.382369213,7] LPC: LPC: SerIRQ 9 using route 0 targetted at OPAL
Signed-off-by: Joel Stanley <joel@jms.id.au>
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
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90% of what we print isn't useful to a normal user. This
dramatically reduces the amount of messages printed by
OPAL in normal circumstances.
We still need to add a way to bump the log level at boot
based on a BMC scratch register or some HDAT property.
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Michael Neuling <mikey@neuling.org>
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
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So we don't have to clear the bits on EOI manually. This
works in conjunction with the DD2 test in psi.c
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Michael Neuling <mikey@neuling.org>
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
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Each LPC interrupt can be routed to one of 4 lines to the PSI
bridge which represent 4 different system interrupts. This
allows LPC clients to request as specific target (Linux or OPAL)
and makes the LPC core pick a route and configure it appropriately.
The UART is updated to properly forward interrupts to Linux
if necessary
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
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On DD1, the LPC SerIRQ are latched to 1 in HW but never back to 0,
we need an explicit clear after running the handler. (Not before
as they are level interrupts, they will be latched again if they
are still pending).
For now we do that in lpc_dispatch_ser_irqs() but that only works
for interrupts routed to OPAL.
In order to support routing LPC interrutps to Linux, we need a custom
EOI handler that does the clearing of the latch before we do the
EOI in the ESB.
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
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We support all the OPAL calls, and it avoids bugs in existing
Linux kernels that would otherwise crash when attempting to
access devices using a direct mapping.
When Linux is fixed it will recognize that direct mapping is
supported and avoid the OPAL calls.
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
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High volume of SYNC errors onto LPC bus cause degraded system
performance and are likely due to bad hardware present onto system.
Thus once LPC SYNC errors cross a certain threshold, OPAL should log
them onto BMC as unrecoverable errors in manufacturing mode. This
will help manufacturing screen bad parts, causing such errors.
Cc: stable
Signed-off-by: Vipin K Parashar <vipin@linux.vnet.ibm.com>
[stewart@linux.vnet.ibm.com: s/mfg/manufacturing/]
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
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We keep a mask for which SerIRQ is associated with which of the 4
PSI IRQs and we only dispatch the ones that correspond to the
PSI interrupt that fired.
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
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We can route them to any of 4 PSI interrupts. We use the device-tree
to determine the default routing
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
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Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
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Take them out of struct proc_chip and into a private struct lpcm
that's local to lpc.c
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
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We currently don't exploit the new MUX that allow to spread them
around different PSI interrupts, they all go to LPC#0
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
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Whether we have Naples or not, the "interrupts" properties
of the child of the LPC node are always in the LPC interrupt
number space, and so should always have the LPC controller as
their interrupt controller.
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Acked-by: Michael Neuling <mikey@neuling.org>
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
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We still need to review interrupts handling etc...
Also update the example device-tree for SIMICS
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Acked-by: Michael Neuling <mikey@neuling.org>
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
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Use pr_fmt macro for LPC driver log messages, changed printfs to use prlog.
Signed-off-by: Vipin K Parashar <vipin@linux.vnet.ibm.com>
[stewart@linux.vnet.ibm.com: just take pr_fmt part]
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
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Found by static analysis
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
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Log LPC SYNC errors as OPAL_PLATFORM_ERR_EVT errors with generic
predictive error (OPAL_PREDICTIVE_ERR_GENERAL) severity.
Signed-off-by: Vipin K Parashar <vipin@linux.vnet.ibm.com>
[stewart@linux.vnet.ibm.com: use const char* rather than strcpy]
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
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hw/lpc.c:533:3: warning: Value stored to 'rc' is never read
rc = opb_read(chip, lpc_reg_opb_base + LPC_HC_IRQMASK, &val, 4);
^ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
hw/lpc.c:535:3: warning: Value stored to 'rc' is never read
rc = opb_read(chip, lpc_reg_opb_base + LPC_HC_IRQSER_CTRL, &val, 4);
^ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
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Copy/paste bug ... we were displaying the same message for
all error sources.
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
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There are now no users of the call_out parameter and future users should
use the log_append_msg() and log_append_data() functions, so remove all
references to call_out.
Signed-off-by: Samuel Mendoza-Jonas <sam.mj@au1.ibm.com>
Reviewed-by: Vasant Hegde <hegdevasant@linux.vnet.ibm.com>
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
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This adds support for the HW SerIRQ deserializer of the P8 LPC
bridge which is properly wired up on Naples. It also adds support
for detecting and reporting LPC error interrupts on all P8s.
On most platforms (Rhesus is the exception here due to the way it
lets Linux handle the UART interrupts directly), we modify the
device-tree to properly represent the LPC controller as a cascaded
interrupt-controller and the "interrupts" property of LPC devices
to contain the actual LPC interrupt number for the device.
We add a mechanism for drivers to register specific LPC interrupts,
and a "workaround" for pre-Naples P8 which platforms can use to call
all of them for when the external FPGA based deserializer is used.
There's also a callback on LPC resets which isn't used yet, we need
a bit more work on the general LPC error handling, but it can be
done a separate patches.
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
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Release lock before bailing out.
Signed-off-by: Ananth N Mavinakayanahalli <ananth@in.ibm.com>
V2: Handle the 2nd instance of the same issue in the file.
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
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his primarily checks whether the caller already holds the corresponding
locks to avoid re-entrancy in some of the deep error path such as when
XSCOM itself triggers an error log. It will be extended in the case of
LPC to also handle known HW error states.
We use them to avoid queuing/polling in the BT driver and to discard
characters in the UART driver.
Note: This will not normally involve a loss of log to the UART as the
UART driver is also protected by the console suspend mechanism. So
this is a safety mechanism only.
This fixes issues where the generation of error logs inside the LPC or
XSCOM drivers could cause a re-entrancy (via the BT interface)
causing deadlocks. Now, the error logs IPMI messages will be queued up
and delivered later on the next poll handler.
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
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The last patch changed the SETFIELD() and GETFIELD() macros to automatically
calculate the shift of a given mask, so manually specifying the shift is no
longer needed. Additionally, any masks should have the _MASK suffix removed
since the GETFIELD() and SETFIELD() operations expected to be passed the
mask name without the _MASK suffix (and so either the mask name or the
get/setfield call needs to have its mask name changed).
Change all _MASK masks to remove the _MASK suffix, except for any places
that leaving _MASK makes sense (e.g. already an existing define without
_MASK suffix).
Remove all _LSH defines, as they are no longer needed.
Signed-off-by: Dan Streetman <ddstreet@ieee.org>
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
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This is probably not the best collection of things in the world,
but it means that opal.h is much closer to being directly usable
by an OS.
This triggers a bunch of #include fixes throughout the tree.
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
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Commit cf6f4e8912d29fb89ce85c84834607065ad595a5 introduced a platform
independent frontend for error logging. However it failed to move the
generic parts of the fsp-elog.h header into the platform independent
one, instead relying on the fact that up until now fsp-elog.h was
included whenever a function needed to log errors.
This patch moves the platform independent defines into the frontend
header file (errorlog.h) and removes the include of the platform
specific header in generic code paths.
Signed-off-by: Alistair Popple <alistair@popple.id.au>
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
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It's a placeholder at the moment, which makes it easy to say "this never
gives a different answer". It also silences our one compiler warning:
hw/lpc.c: In function 'lpc_interrupt':
hw/lpc.c:457:6: warning: function might be candidate for attribute 'const' [-Wsuggest-attribute=const]
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
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We only poll the masters for the chip that got the interrupt
and we improve the running of the timers as well.
We user the new TIMER_POLL facility to replace the use of the
OPAL poller, which simplifies the code further.
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
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This patch adds the generic i2c driver infrastructure to handle multiple i2c
master cores present in the system and exposes structures and interfaces for
the client to perform I/O on the i2c slave devices.
The driver adds the capability to queue multiple requests from client and
let clients notified asynchronously after completion. It does that by
handling the i2c interrupt or through OPAL poller in the absence of
interrupt.
Signed-off-by: Neelesh Gupta <neelegup@linux.vnet.ibm.com>
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
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When setting the flag in a lock that indicates that it's on the console
path, we need to take and release that lock to ensure that any other
processor that might have taken it before the flag was set has released
it, otherwise the lock might still be held without the console count
properly incremented, which can cause it to go negative or cause the
deadlock that we mean to avoid by that to still occur.
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
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The LPC code is called from deep into various call stacks such as
the UART one, polling from there could cause nasty recursions, so
use a _nopoll variant of wait.
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
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Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
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